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950 Commits
multcon .. 80095ba617
Author SHA1 Message Date
René van Dorst 80095ba617 Merge pull request #354 from DrDoof/fix/isolate-cpu-port 
port: reject the CPU port in isolate instead of refusing it silently
 2026-08-17 18:31:25 +00:00
d00f 47b3ee60b6 port: reject the CPU port in isolate instead of refusing it silently 
parse_isolate() accepted a two digit port and mapped it to logical port 9,
the CPU port, while port_isolate() and port_isolation_get() both refuse
anything above machine.max_port. Setting the isolation of the CPU port was
therefore declined without a word and reading it always answered no
members, whatever the hardware held.

Bound the port to the front panel, so the command says what it does. The
digit is checked before it indexes phys_to_log_port[], which a non numeric
argument used to read past.
 2026-08-17 10:53:17 +02:00
logicog 59d20ed9b6 Merge pull request #339 from plaes/parallel-build 
Fix parallel build
 2026-08-17 08:11:25 +02:00
logicog f41ed2b943 Merge pull request #332 from DrDoof/fix/igmp-enable-gate 
igmp: only hand reports to the CPU while snooping is on
 2026-08-17 07:58:18 +02:00
d00f 56fa96c494 igmp: only hand reports to the CPU while snooping is on 
handle_rx() dispatched to igmp_packet_handler() on the destination
address alone, so an ordinary IGMPv3 report off the wire reached the
handler and could write a table entry whether or not anyone had asked
for snooping. The STP branch right above it is gated on stpEnabled;
this brings the IGMP branch in line.

Snooping state lived only in the per-port registers, and the receive
path cannot afford to read one per packet, so the flag shadows it:
igmp_enable() sets it, igmp_setup() clears it, and igmp_setup() runs
from both the boot path and "igmp off".

While here, igmp off becomes an explicit subcommand instead of the
fall-through, and an unrecognised igmp subcommand prints the usage
line rather than silently turning snooping off.

Six bytes of BANK1 and one of xdata, no internal RAM.
 2026-08-16 23:42:46 +02:00
René van Dorst 6bfcbd2f9a Merge pull request #349 from DrDoof/fix/lag-cmd-bounds 
lag: number the groups from one and bound what the command is given
 2026-08-16 06:48:28 +00:00
d00f fa7895ad62 doc: the aggregation example used group zero, which no longer parses 
The command now numbers groups the way 'lag show' prints them, so the
walkthrough would have failed at its first step.
 2026-08-16 04:10:03 +02:00
d00f 1ed8b131bc httpd: keep the send_l2 flags in bit memory 
The two flags added with the JSON fix sit in data, where internal RAM is
full enough that this branch stopped linking for some toolchains. __bit
puts them in the bit area instead and hands three bytes back to the
stack: SSEG goes from 131 to 134 on SWTGW218AS.

Patch by vDorst on the pull request.
 2026-08-16 01:23:56 +02:00
d00f 9ada6adad7 lag: number the groups from one and bound what the command is given 
lag show has always printed the groups as 1 to 4 while lag <n> took the
number literally, so typing what you saw configured the group beside it.
Both lag and lag hash count from one now, matching how ports are numbered
everywhere else, and reject anything outside 1 to 4. Subtracting '1' makes
0 wrap well past three, so one test covers both ends.

The port argument indexed machine.phys_to_log_port, which holds nine
entries, before it was checked, and a two digit argument reaches 109. It is
bounded before the table is touched rather than after.

port_lag_members_set() and port_lag_hash_set() complained about a group out
of range and then wrote the registers anyway, past the four the groups
occupy. They return instead.

lag hash also read cmd_words_b[1] without checking a word was there, and
now shares the error path parse_lag() already had.
 2026-08-16 01:08:30 +02:00
René van Dorst 719c6db228 Merge pull request #344 from DrDoof/feat/walk-l2 
html: move the L2 table walk into a shared walkL2() helper
 2026-08-15 21:38:43 +00:00
d00f a96fdfe10c html: move the L2 table walk into a shared walkL2() helper 
Both the L2 page and the ports page in #335 need to page through /l2.json
and decode the same fields, and the second copy arrived carrying the two
bugs the first one had only just been fixed for. Rather than keep two
copies in step by hand, the transport and the decoding move to main.js,
which every page already loads, and each page keeps only what is its own.

walkL2(onDone) pages through the table once, parses idx and vlan out of
hex, maps the port to a physical number or to 'CPU', and calls
onDone(entries, ok). It stops on a wrapped index, an empty page or 4096
entries, all of which set ok. A page that comes back as anything other than
200, or with a body JSON.parse rejects, is asked for again at the same
index up to three times; only once those run out does the walk end with ok
clear, so a caller can tell a finished table from a partial one. l2.js
keeps the s and l to label mapping, since that needs the page's own
translations, redraws only when ok is set, and restarts the walk from its
callback either way.

Two things change while moving:

The next request goes out from the previous reply rather than from a
setInterval that fires whether or not the last one came back. The httpd
serves one connection at a time, so a timer that outruns the responses only
queues work it cannot use.

A walk that reaches 4096 entries hands over what it collected. Before it
threw the entries away and cleared its own interval, which left the page
unable to refresh again until it was reloaded.

The retry is not a new idea, it is the old behaviour written down. The
previous code ignored anything that was not a 200 and let the interval ask
for the same index again, so a blip never disturbed the table on screen.
Dropping that on the way to a chained walk would have made every timeout
redraw the page with a truncated table, which at one connection at a time
is not a rare event.

Driven with a scripted server in node, running the helper itself rather
than a copy of it: an empty table gives 0 entries in 1 request; three pages
ending in a repeated index give 61 entries in 3 requests, asking for 0, 30
and 60; an empty page ends the walk after 2; a 500 and a malformed body are
each retried at the same index and then complete normally, asking 0, 30, 30
and 31; three failures in a row end the walk with ok clear and the 30
entries already collected; 4096 entries in one page end it with ok set; the
CPU port decodes to 'CPU'; vlan and idx come back as numbers.

main.js grows by 1331 bytes and l2.js loses 1039, so 292 bytes of flash.
Worth stating where they land: main.js is loaded by every page, so pages
that never walk the table now carry the helper too. That is the cost of
having the decoding exist exactly once, which is the point of the move.
 2026-08-15 23:16:29 +02:00
d00f 3fda9ccd86 html: handle an empty MAC table reply and fix the entry cap 
l2.js reads the last index of a reply to know where the next page starts.
With the firmware side of this branch an empty table answers [], and
s[s.length-1] then throws on undefined. It used to answer commas with
nothing between them and throw in JSON.parse instead, so this is the same
case reaching a different line rather than a new one. An empty reply now renders what
has been collected and starts the next pass from zero.

The 4096 entry cap compared the array against the number instead of its
length, so it never fired: an empty array and a 5000 element one both
compare false. Comparing the length restores what the check was for.
 2026-08-15 23:14:49 +02:00
d00f 3be6667789 httpd: emit valid JSON from send_l2 
The MAC table listing wrote its separator once per iteration rather than
once per object. An entry the table engine reports as invalid produces no
object, so it contributed a bare comma, and two in a row give ",," which
JSON.parse rejects. The whole table then fails to load, not just the row
that was missing. The separator now goes before each object and the
closing bracket after the loop, which is the shape send_vlanlist already
uses further down the file.

The next index for an invalid entry was computed as h | low + 1, and the
addition binds tighter than the or. That agrees with (h | low) + 1 except
when the low byte reads 0xff and bit 8 of the index is already set, eight
of the 4096 combinations. There the result is the start of the current
block of 256 rather than the start of the next one, so the walk repeats a
block it has already covered. Reading the index once after the branch
rather than once in each arm removes the second copy of that expression
along with the bug.

The VLAN now comes first in each object. It is taken from the same
L2_DATA_OUT_B read that decides whether the entry is valid, which saves
reading that register a second time. The page addresses the fields by
name, so the order they arrive in does not matter to it.

A bound check on the output buffer goes in for consistency with
send_vlanlist. Thirty entries of at most 74 bytes plus the brackets fit in
the 2500 byte buffer with 179 to spare, so nothing changes today, but the
margin was nowhere stated and L2_MAX_TRANSFER is a tunable.

5 bytes of BANK1, nothing in BANK2, xdata or internal RAM. Built for SWTGW218AS
and KP_9000_6XHML_X2 on sdcc 4.5.0.
 2026-08-15 23:14:48 +02:00
René van Dorst 5103d1c168 Merge pull request #338 from DrDoof/fix/lag-hash-default 
port: make the trunk hash default reachable again, and per group
 2026-08-15 21:01:09 +00:00
René van Dorst ce85576882 Merge pull request #346 from DrDoof/fix/crtstart-home 
Rename crtstart.asm to crtbank.asm
put the bank switching helpers in HOME-code location
 2026-08-15 20:33:54 +00:00
d00f 59c60504e7 crtbank: put the bank switching helpers in HOME 
__sdcc_banked_call and __sdcc_banked_ret were assembled into GSFINAL, which
sits in the startup path: GSINIT ends exactly where GSFINAL begins, so the
processor falls into it rather than being sent there. It works today only
because this object comes after every C object on the link line, so the
LJMP to __sdcc_program_startup is laid down first and the helpers land
behind it. Reordering that line, or moving main() into another module,
would put the helper body at the fallthrough address instead, and the board
would not come up out of a build that reports nothing wrong.

SDCC's own crtbank.asm declares the area order and then puts both symbols
in HOME, so the file takes that name and that preamble as well.

GSFINAL now holds the three byte jump and nothing else. Of 401 symbols 17
change address, every one in the startup region, and between the reset
vector and 0x0094 not a byte differs, so no interrupt vector is disturbed.

Run on a SWTGW218AS: it came back after about 42 seconds reporting the new
build, with its stored configuration byte identical and every link at the
speed it had before.
 2026-08-15 22:18:13 +02:00
d00f a3c586ef38 port: make the trunk hash default reachable again, and per group 
Wrapping REG_SET restored the guard in front of the hash default, and
that exposed three things about the line it guards.

The test was against zero. The register does not read zero: it comes out
of reset holding source port number plus both MAC fields, both IP fields
and the L4 source port, which the header now names LAG_HASH_RESET.
Measured on an SWTGW218AS, where all four groups read 0x3f after a cold
boot and a value written before a power cycle is gone afterwards. With
the guard working and the test unreachable, the default would never be
installed, where before it was installed on every call. Testing against
the reset value restores the intent, and zero is still accepted in case
another device does reset that way.

The write went to the base address while the read that decides it used
the group offset, so a group other than zero was tested and group zero
was written. Both ends use the offset now.

The range check printed a complaint and carried on. It returns, which
matters more now that the hash write also uses the group number to build
an address.

Thirty bytes of BANK1.
 2026-08-15 22:01:08 +02:00
René van Dorst 8bc530d3d0 Merge pull request #347 from DrDoof/feat/lag-members-get 
port: read a trunk's members through one function
 2026-08-15 19:23:50 +00:00
d00f f2c6ac01d9 port: read a trunk's members through one function 
The member mask of an aggregation group is decoded by hand in two places,
the lag command and the JSON behind the aggregation page, and every branch
that touches trunks adds another copy.

port_lag_members_get() sits next to port_lag_members_set() and both readers
call it. It answers from the hardware, so it covers a group configured with
lag and one a protocol brought up, without either having to say so.

It reads through reg_read() rather than reg_read_m(), so sfr_data is left
alone. Neither caller looked at it afterwards; both read the hash register
next.
 2026-08-15 20:55:56 +02:00
René van Dorst 94d9f2c8e8 Merge pull request #341 from DrDoof/fix/counters-port-index 
httpd: check the port index /counters.json is given
 2026-08-15 07:52:54 +00:00
d00f 0503e7952d httpd: check the port index /counters.json is given 
The handler took one raw character of the request line and passed it to
send_counters(), which uses it to index machine.phys_to_log_port. That
array has nine entries and the character is whatever the client sent, so
the read ran up to 246 entries past the end and the result went on to
STAT_GET as a port number. is_word() accepts any request whose name is
followed by a question mark, so nothing constrained the byte to a digit.

Bounding it where it is read keeps the check beside the assumption it
protects and needs nothing from the machine description. sdcc leaves
plain char unsigned and the subtraction wraps in eight bits, so a byte
below '0' comes out above 200 and one upper test covers both ends:
exactly '0' to '8' now reach send_counters. The compiled test is
add a,#0xf7 followed by jnc, which I read back out of the assembly rather
than assuming.

Out of range answers 400 by the path the other malformed requests already
take, rather than an empty array. An empty array would have been worse
than useless here, since the statistics page calls BigInt on the first
element before it looks at the length. The page asks only for index zero
to the port count minus one, so nothing that answered before stops
answering, and a non-200 reply makes its handler do nothing at all.

11 bytes of BANK1, nothing in the common segment, BANK2, xdata or
internal RAM. Built for SWTGW218AS and KP_9000_6XHML_X2 on sdcc 4.5.0.
 2026-08-15 00:49:21 +02:00
René van Dorst 787d593996 Merge pull request #337 from DrDoof/fix/igmp-dup-loop 
igmp: drop the duplicate port configuration loop
 2026-08-14 22:12:33 +00:00
René van Dorst db2a541e5f Merge pull request #331 from DrDoof/fix/reg-macros-braces 
regs: wrap REG_SET and REG_WRITE, and fix what that uncovers
 2026-08-14 21:29:03 +00:00
Priit Laes 11be13fe53 build: Fix double generation of html_data 
Make supports grouped target which runs once for all listed targets.
 2026-08-14 11:16:05 +03:00
Priit Laes 65f8afb908 build: Remove undefined html variable 
HTML target references $(html) which was never defined, which
causes find to run through the entire source tree.
 2026-08-14 11:16:05 +03:00
Priit Laes 0126b159bf build: Make create_build_dir PHONY and add order-only deps 
Mark create_build_dir as PHONY so directory creation is never skipped.
Also add html_data.h as order-only prerequisite to the .c pattern rule,
fixing another the race where httpd/httpd.c and httpd/page_impl.c are
compiled before the generated header exists.
 2026-08-14 11:14:59 +03:00
Priit Laes 31024388ba build: Fix tools dependency for parallel builds 
Replace file-path prerequisite tools/output/fileadder with order-only
dependency on the tools PHONY target.

Also add tools as order-only dependency to the final .bin target which
invokes all of the tools.
 2026-08-14 11:14:29 +03:00
Priit Laes 9f2d6b72b7 build: Fix version.h race condition in parallel builds 2026-08-14 11:13:17 +03:00
d00f 5c5dcb5209 igmp: drop the duplicate port configuration loop 
igmp_setup() writes the per-port IGMP configuration twice, once with the
value spelled out and once with the same number assembled from the
constants: IGMP_MAX_GROUP | IGMP_PROTOCOL_ENABLE | IGMP_FLOOD is exactly
0x00ff7c15. The second loop carries the comment block explaining the bit
layout, so the literal one is the one to drop.

Today the cost is one redundant register write, because REG_SET is not a
single statement and the unbraced loop body only ever reaches index
machine.max_port + 1. Once the macro is wrapped it becomes one redundant
write per port on every boot and on every "igmp off", which is what makes
this worth removing rather than leaving.

Fifty nine bytes of BANK1 on SWTGW218AS, nothing anywhere else.
 2026-08-14 07:39:24 +02:00
d00f be6d47a3ab regs: wrap REG_SET and REG_WRITE in do { } while (0) 
Both macros expand to a run of statements joined by backslashes with
nothing around them, so as the unbraced body of an if or a for only the
first assignment belongs to that body. The other three and the
reg_write() call sit after it and run once, unconditionally, with
whatever the loop counter ended on. Wrapping each macro into a single
statement is what every call site already assumes it to be.

This hands the compiler no new room around the SFR writes, which is worth
showing rather than asserting. Building the whole image before and after
and comparing the generated assembly module by module, with label
numbering, block scope suffixes and the version string normalised away,
three modules differ: rtl837x_igmp, rtl837x_port and rtl837x_leds. Ten
modules call these macros, so the other seven come out identical, and so
does everything else in the image.

Those three differ because they hold the five unbraced uses. Two of them
want a fix rather than only the brace, and that is left to the commits
that follow.

Six bytes of BANK1 on SWTGW218AS, nothing anywhere else.
 2026-08-14 07:34:42 +02:00
d00fandd00f 4ff009dbfc uip: cap TCP MSS to 1460 to survive jumbo-MTU clients (#298) 
* uip: parenthesise UIP_LLH_LEN

The macro expands to a bare sum, so wherever it is subtracted the second term
gets added instead. UIP_TCP_MSS - and with it UIP_RECEIVE_WINDOW - therefore
comes out 24 bytes above the buffer's real capacity. UIP_APPDATA_SIZE and
UIP_REASS_BUFSIZE are wrong the same way, though neither is reachable today.

The additions, uip_buf[UIP_LLH_LEN] and friends, were right by luck.

* uip: keep the advertised MSS below the buffer edge

Deriving the MSS straight from the buffer size makes the switch advertise
exactly the segment that fills uip_buf to its last byte, and a peer that takes
it literally corrupts every large upload: the firmware image arrives fully
acknowledged, with no retransmissions on the wire, yet the CRC over the
streamed body never matches and the flash write is abandoned.

Isolated by changing nothing but the segment size, same buffer and same file:
1490-byte segments fail four times out of four, 1460-byte segments succeed,
745-byte segments succeed. Linux halves its segments against a window this
small, so only macOS on a jumbo link ever produces a full-size segment - which
is why the failure hides so well.

Where exactly the full segment breaks the stream is not pinned down yet; until
it is, the advertised MSS stays a step below the edge.

* uip: size the buffer to the largest frame the CPU port accepts

UIP_TCP_MSS derives from UIP_CONF_BUFFER_SIZE, and the buffer was large enough
for frames the hardware will never deliver, so the switch advertised a segment
size no peer could usefully reach. A client on a jumbo-MTU link took it at its
word and the oversized replies went nowhere.

Size the buffer to the ingress limit instead. ICMP bypasses MSS and so probes
the hardware directly: on a SWTGW218AS a 1502-byte payload is answered and 1503
never arrives, which puts the largest frame the NIC hands us at 1556 bytes of
uip_buf. UIP_TCP_MSS then derives to 1490, the same edge measured over TCP.

Frames above the limit are dropped by the NIC rather than written to the
buffer - an 8 kB ping leaves the switch untouched - so nothing overruns it.
Frees 644 bytes of XDATA.

* uip: trim these comments, one of which had stopped being true

The note above UIP_CONF_BUFFER_SIZE claimed the MSS derives from it as 1490.
It does not: the commit that follows pins the MSS at 1460 on purpose, a step
below that ceiling, because a segment filling the buffer to its last byte
corrupts large uploads. Left as it was, the file argued with itself.

Both blocks are shorter now. What justifies the numbers stays, which is the
ICMP measurement behind 1556 and the four-out-of-four failure behind 1460.
What went is the storytelling around them, which belongs in this thread rather
than in a config header.

* uip: derive the MSS from the buffer again, minus explicit headroom

The review asked why the buffer size and the MSS are both set by hand when one
used to follow from the other. They answer different questions, but the gap
between them is a number in its own right, so it gets a name now:
UIP_CONF_BUFFER_EXTRA, and UIP_TCP_MSS goes back to being derived.

The headroom is where the measurement lives. A segment that fills uip_buf to
its last byte corrupts large uploads: with nothing but the segment size
changing, 1490 fails four times out of four and 1460 succeeds. With the buffer
sized to the frame the NIC accepts, an extra of 30 lands on 1460.

Deriving it the other way round does not work. Sizing the buffer from a 1460
byte MSS gives 1526, which is 30 bytes under the frame the NIC actually
delivers. A 1502 byte ICMP payload occupies 1556 bytes of uip_buf and is
answered today, and it would stop fitting.

The generated image is byte for byte the same as the one with 1460 written out,
so the expression lands on the value that was measured.

---------

Co-authored-by: d00f <tokyusho@chatik.pl>
 2026-08-14 06:42:36 +02:00
René van Dorst 0c339e9123 Merge pull request #328 from DrDoof/fix/httpd-get-path-walk 
httpd: stop the GET request line walk at the end of the buffer
 2026-08-12 09:28:22 +02:00
René van Dorst 75151e0b00 Merge pull request #319 from bloqaudio/pr/cmd-editor-overflow 
cmd_editor: fix cmd_buffer overflow and CLI hang on long input
 2026-08-12 09:26:17 +02:00
d00f 43845b911b httpd: stop the GET request line walk at the end of the buffer 
The POST path tests for a NUL before it looks at a byte. The GET path did not,
and is_separator() counts only space, tab, question mark and equals, so a request
line carrying none of those walks past the end of uip_buf and writes its
terminator into whatever xdata it happens to stop on.

Everything that is not a POST reaches that walk. The pointer advances past the
method before anything checks that the method was GET, so a TLS record sent to
port 80 by a browser trying https first is enough on its own, as is a port
scanner or a malformed line. The stop is wherever the first space, tab, question
mark or equals turns up in memory, which is why the symptoms are erratic.

Two bytes of BANK1. BANK2 and xdata do not move.
 2026-08-12 03:22:01 +02:00
bloqaudio 0ed45e0710 cmd_editor: fix cmd_buffer overflow and serial-ring skip on long input 
Typing or pasting a line of 128 characters or more into the CLI hangs the
editor and overruns cmd_buffer[128]: the length check did not reserve room
for the terminating NUL written on Enter, and on a full buffer the character
was retried via continue without advancing the serial-ring read pointer at
the bottom of the loop, so input processing never caught up again.

Cap the line at CMD_BUF_SIZE-1 and, when full, drop the character but fall
through to consume the ring byte instead of spinning on it. The functional
change is three lines; the rest of the diff is re-indentation of the
insert-and-echo block (git diff -w shows the minimal form).
 2026-08-11 10:26:06 -05:00
logicog 5e30f8e6c0 Merge pull request #318 from bloqaudio/pr/mac-from-flash 
machine: optionally read the factory MAC from flash
 2026-08-11 14:32:32 +02:00
logicog 7f3c91ac0c Merge pull request #321 from bloqaudio/pr/dhcp-hostname-opt12 
dhcp: announce the hostname via option 12
 2026-08-11 14:30:21 +02:00
bloqaudio 3853a2701d machine: read a factory MAC from flash via mac_flash_offset 
Adds an optional per-board mac_flash_offset. When non-zero, RTLPlayground
reads a 6-byte MAC from that flash address and uses it if it is a valid
globally-administered unicast address; otherwise it falls back to the
generated locally-administered MAC. Offset 0 (default for every board)
preserves current behaviour.

Enable it for the SWTGW218AS, whose stock firmware keeps the factory MAC
in nvcfg at 0x1FC000. RTLPlayground images and web upgrades only touch
flash below that region, so the factory MAC survives flashing.
 2026-08-11 02:32:31 -05:00
bloqaudio 00a5f81871 dhcp: announce the hostname via option 12 
Send the configured hostname on discover and request so the DHCP server
can register the device (e.g. in local DNS). Skipped while the hostname
is still empty, i.e. before set_hostname_default() has run.
 2026-08-11 02:03:11 -05:00
logicog 53d865059d Merge pull request #320 from bloqaudio/pr/reproducible-build 
makefile: derive BUILD_DATE deterministically
 2026-08-11 08:50:05 +02:00
logicog b90aedd8f2 Merge pull request #316 from bloqaudio/pr/igmp-memset-cast 
rtl837x_igmp: cast &entry to __xdata pointer in memset()
 2026-08-11 08:43:28 +02:00
bloqaudio 6b190eb9f3 makefile: derive BUILD_DATE deterministically 
Honor SOURCE_DATE_EPOCH, falling back to the HEAD commit date and then
to wall-clock when git is absent. Same-commit builds become
byte-identical (BUILD_DATE is baked into the image and covered by the
trailing CRC), which makes it possible to verify that a binary matches
a source tree.
 2026-08-10 15:55:08 -05:00
bloqaudio fae16dabf5 rtl837x_igmp: cast &entry to __xdata pointer in memset() 
SDCC rejects memset() on the generic &entry pointer (error 78,
incompatible types). The ipmc/l2mc table entries are __xdata; pass an
explicit (__xdata uint8_t *) so the call resolves.
 2026-08-10 15:54:08 -05:00
René van Dorst 52692d05b1 Merge pull request #313 from DrDoof/fix/vlan-id-range 
Reject VLAN IDs and numeric arguments the hardware cannot take
 2026-08-08 20:51:43 +00:00
René van Dorst d364bd69e4 Merge pull request #306 from DrDoof/mgmt-vlan-gui 
system: show and set the management VLAN in System Settings
 2026-08-08 20:44:07 +00:00
René van Dorst 70ab7ff769 Merge pull request #307 from DrDoof/l2-sort-filter 
l2: fix the CPU/SFP port label, add sorting and filtering
 2026-08-08 20:29:50 +00:00
d00f e30976be76 httpd: move the management VLAN into /vlanlist 
Review feedback on #306. The value used to ride in /information.json and
the picker fetched /vlanlist separately, so the page needed both requests
to mean anything. /vlanlist now answers {"mgmt":N,"vlan":[...]} and the
picker reads both from the one response. Both consumers in vlan.js were
taught the new shape, and /information.json no longer carries mgmt_vlan.

The truncation guard now reserves 141 bytes instead of 139: the closing
grew to two bytes with the wrapping object, and the comma in front of a
non-first entry was never counted, so the worst case could land one byte
past outbuf even before this change. char_to_html() does not check.

The comments added on this branch are gone as well, style.css and
system.js both, since these files are served byte for byte.

page_impl.rel stays at DSEG 5, OSEG 0, BSEG 3 and the image reports the
same 10183 bytes of XDATA before and after.
 2026-08-08 18:26:49 +02:00
d00f 1a55a134c7 system: pick the management VLAN from System Settings 
`vlan <id> mgmt` existed on the CLI, but nothing reported which VLAN
currently carries management, so the setting was invisible from the web UI -
the only way to find out was to read the startup config.

Report it in information.json and offer it where the other switch-wide
addressing settings live, between Gateway and Language, as a picker filled
from the configured VLANs. When management is untagged there is no VLAN to
select, so that state shows as a disabled entry rather than inventing an id
the switch would reject.

Confirm before applying, and say what will happen rather than echoing the
action back: the switch starts tagging its own frames, and if the port you
came in on does not carry that VLAN the page becomes unreachable and the way
back is the console. Cancelling puts the picker back where it was.
 2026-08-08 18:26:49 +02:00
d00f 23f0ba995c css: align read-only values with the input fields 
The System Settings rows all pair a label with a form control, except Model,
which is a bare span. The inputs carry padding and a left margin, so their
text starts about 32px further in than the model name did - close enough to
look like a mistake and far enough to see it.

Give read-only values a class with the same metrics instead of styling the
model specifically; any other value shown without a control gets the
alignment for free.
 2026-08-08 18:26:15 +02:00
d00f 22a09bd06a l2: drop the comments and define the column list once 
Review feedback on #307: these files are served from flash byte for byte,
so comments ride along on every page load. The three added in this branch
are gone, 357 bytes across l2.js and style.css. The column list existed in
three copies inside renderL2() and is now a single const.
 2026-08-08 17:55:27 +02:00
d00f 930a08ec52 cmd: validate the port argument of mtu and pvid 
Both handlers turned the first character of the port word into an index
with no check at all. "mtu 0 100" computes '0' - '1' = 255, reads far past
the end of phys_to_log_port[9], and writes the size to whatever register
0x1250 plus that garbage points at. "pvid 0 2" walks the same path into
port_pvid_set(). lag and vlan already validate their port arguments; these
two just did not.

The port now has to be a single digit 1 to 9, which is exactly the range
the mapping table holds. A second digit or a stray letter falls to the
usage message.

"mtu show" also gained the return it was missing: after printing the table
it fell through, derived a port from the word "show" and printed the
garbage byte before the length check stopped it.
 2026-08-08 17:46:24 +02:00
d00f 1701d4dc53 cmd: refuse a management VLAN that cannot exist 
"vlan 5000 mgmt" parked the management interface on a VLAN the table
cannot hold, which quietly cuts management off. IDs above 4094 now fall
through to the usage message. 0 still switches the management VLAN off,
which is the documented way to disable it.
 2026-08-08 17:38:10 +02:00
d00f 1e19a9abe2 cmd: bound the PVID and say something when it is refused 
"pvid 1 5000" packed 5000 into the 12-bit PVID field and truncated on the
way, so the port ended up with a PVID nobody chose. 0 and anything above
4094 are refused now, matching what the VLAN table can hold. A failed
parse used to be dropped without a word; both cases print the usage line.
 2026-08-08 17:38:10 +02:00
d00f 1098e73337 cmd: stop "mtu" from acting on a value it failed to parse 
The handler threw away atoi_short()'s return and leant on the range test
alone. The range test cannot tell a failed parse from a small number, so
"mtu 1 99999" stopped at the partial 9999 and went through as a number
nobody typed. With the parse result checked, a failure is rejected with
the same message as an out-of-range value.
 2026-08-08 17:38:10 +02:00
d00f 99b0fc4b32 cmd: give mtu a lower bound as well as an upper one 
"mtu 1 0" was accepted. The chip takes it verbatim, the port reports 0x0000
back, and it stops passing frames: on a live 2.5G LAG member the LACPDU
receives moved by 4 in fifteen seconds against 21 on the sibling port, and
the partner went expired. Restoring the size brought both back.

Nothing shorter than a minimum Ethernet frame is a usable maximum, so the
range is now 64 to 16383. The upper end is unchanged and still comes from
the width of the field the value is written into.

This also covers most of #312 by accident: "mtu 1 abc" leaves the parse
result at 0 and now gets rejected on the bound rather than reaching the
register. It does not cover all of it. The handler still ignores what
atoi_short() returns, so "mtu 1 99999" stops on a partial 9999 and goes
through as a number nobody typed.

The GUI is not affected either way, it offers a fixed list of sizes.
 2026-08-08 17:30:25 +02:00
d00f 10d472d8a6 vlan: reject VLAN IDs the table cannot hold 
vlan_create() and vlan_delete() wrote the ID straight into the table index
register. vlan_get() has refused anything >= 0xfff for a while, so reads were
guarded and writes were not: "vlan 4095 1 2" built an entry that no read path
can see, and IDs above that either miss the table or alias onto another VLAN.

Both writers now enforce the range vlan_get() already did, and parse_vlan()
rejects the same values with the usage message so the CLI says why. The check
sits after the "vlan 0 mgmt" branch, which legitimately takes 0 to switch the
management VLAN off.

Costs nothing in RAM: rtl837x_port.rel stays at DSEG 0, OSEG 5, and the image
still reports 10207 bytes of XDATA in use.
 2026-08-08 17:13:28 +02:00
d00f 6254f44001 cmd: reject out-of-range numeric arguments instead of wrapping 
atoi_short() accumulated into a uint16_t without checking, so "vlan 65540"
wrapped to 4 and edited VLAN 4 instead of failing. atoi_byte() had the same
hole with "300" landing on 44. Both now refuse the digit that would push the
value past its type, before it lands.

The partial result is deliberately left alone rather than zeroed. Zeroing
would give the function one tidy rule, every failure leaves 0, but a caller
that ignores the return would then write that 0, and 0 is not a harmless
number everywhere. Set as a port MTU it stops the port taking frames: I put
0 on a live 2.5G LAG member and its LACPDU receives moved by 4 in fifteen
seconds against 21 on the sibling port, with the partner going expired.
Putting the size back recovered both. A wrong number does less damage than
that, and the real fix belongs in the callers that ignore the return anyway.

The test sits inside the loop rather than after it, so no wider accumulator
is needed and the parser stays off the internal RAM budget.

056a30a on the branch in #303 fixes atoi_byte a different way, by widening
the accumulator. Whichever lands first, the other hunk should go.
 2026-08-08 17:13:08 +02:00
René van Dorst c435838376 Merge pull request #308 from plaes/horaco-zx-sg4t2 
docs: Add Horaco XZ-SG4T2 skeleton documentation and images
 2026-08-08 12:08:27 +00:00
René van Dorst 3f7db7e430 Merge pull request #297 from DrDoof/hostname 
system: configurable hostname + show model on the System page
 2026-08-07 18:10:34 +00:00
René van Dorst f98fe32d0c Merge pull request #309 from plaes/http-security-fixes 
httpd: Fix buffer offerflow in scan_header
 2026-08-07 10:08:11 +00:00
Priit Laes d2e8ee0e41 httpd: Fix buffer offerflow in scan_header 
Fixes #300
 2026-08-06 15:24:09 +03:00
Priit Laes a9a455e447 docs: Add Puya P25D40SH flash chip to list of known supported 2026-08-06 10:57:49 +03:00
Priit Laes 3f26bf7348 docs: Use relative paths 2026-08-06 10:57:49 +03:00
Priit Laes ac302d4a67 Add barebones docs for already supported Horaco ZX-SG4T2 / WTG024AS-A-V2.0.1_4C_2SFP 2026-08-06 10:47:35 +03:00
Priit Laes 409bc58e17 docs: Add HC-SWTGW215AS to supported devices index 2026-08-06 10:13:29 +03:00
Priit Laes fbcec2cb5a docs: Fix capitalization/typos in company names 2026-08-06 10:06:24 +03:00
d00f ccb90ed16f l2: refresh the type column when a row is reused 
The paint loop reuses existing rows and rewrites port, MAC, VLAN and the
delete button, but never the type cell - only the insert path set it. With a
fixed row order that stayed invisible, since a row usually landed back where
it was. Sorting moves rows, so every other column followed the data while
type kept the previous row's value, which made sorting by type look broken
when the sort itself was correct.
 2026-08-05 21:42:54 +02:00
d00f 4389cfcd8b l2: show which column sorts and in which direction 
Clicking a heading sorted the table but nothing said so afterwards - the
only feedback was the rows moving, which is no help when the sort key is a
column you are not looking at.

Give every sortable heading a permanent marker: a neutral double arrow when
it is not the sort key, up or down when it is. The marker sits in its own
span so the i18n pass, which replaces the heading text, does not wipe it.
 2026-08-05 21:35:54 +02:00
d00f 5e901fb5c2 l2: sort and filter the forwarding table from its header 
The table lists every learned and static entry in one flat block, which is
fine with a handful and unusable with a few hundred: finding out where one
MAC sits, or what a port has learned, meant reading the whole thing.

Make the column headings sort and give each one a filter box. Filters are
substring matches combined with AND, so "port 8 + static" is two keystrokes.
A counter above the table shows matched out of total, so a filter that hides
everything is obvious rather than looking like an empty table.

Sorting keeps the CPU entry from comparing as a number - it sorts last
instead of landing between ports 8 and 9, where a string-vs-number compare
would otherwise put it.

The filter inputs live inside the existing header cells rather than in a
second row: the paint loop addresses data rows as rows[i+1], and a second
header row would have shifted every one of them.
 2026-08-05 21:21:03 +02:00
d00f 2974e4b66a l2: stop labelling the SFP port as CPU 
The port column was mapped from logical to physical numbering first and the
CPU label applied afterwards, testing for port 9. On an 8+1 board the SFP
port maps to physical 9 as well, so every entry learned on the SFP was shown
as CPU - on this switch that was 26 of 30 entries.

Label the CPU while the number is still logical, before the mapping, so the
two cannot collide.
 2026-08-05 21:21:03 +02:00
d00f 108ac9b8fc system: derive the default hostname after the startup config 
Move the MAC-derived default name out of main() into its own function and
call it after execute_config(), returning early when the config already
set a name - a configured switch then does no work for it at all.

The body deliberately has no local variables. Locals here - counters and
pointers alike - land in the 8051's internal-RAM overlay, and on an image
with LACP and STP both enabled that overlay is exhausted: a loop makes the
linker fail with "Could not get 8 consecutive bytes in internal RAM for
area OSEG". Moving the code into its own function does not help, since the
overlay is shared across the whole image, and hoisting the locals to xdata
does not either, because itohex() is inline and brings its own frame. This
only shows up in an integrated build; the branch on its own links fine.

Suggested-by: vDorst
 2026-08-05 16:48:36 +02:00
René van Dorst de3eca26c3 Merge pull request #301 from zytstudio/MACHINE_FG_4GT_2SX_V2_0 
Add FG-4GT-2SX_V2.0
 2026-08-05 08:53:02 +00:00
ZYT 8164166465 Fix mistake in comments 2026-08-05 11:15:48 +08:00
ZYT 87fe1e77ae Merge branch 'main' into MACHINE_FG_4GT_2SX_V2_0 2026-08-05 11:09:53 +08:00
ZYT a753f6f02e Add led colors and remove an unnecessary photo 2026-08-05 11:07:51 +08:00
René van Dorst c86d4b31f2 Merge pull request #304 from plaes/makefile 
makefile: Make CC and ASM overridable via command line
 2026-08-04 19:50:31 +00:00
Priit Laes 3c89b22207 makefile: Use origin check for CC variable 
Make defines defaults for commonly used variables, therefore
we need to check first how the variable was defined. If `default`
value was used, override it with our own default.
 2026-08-04 21:55:28 +03:00
Priit Laes bebe79c4c9 makefile: Fix possible shell injections in makefile 2026-08-04 18:53:23 +03:00
Priit Laes adb0b54691 makefile: Reorder sources to immediately fail on invalid MACHINE 
Also group and reorder source files and move each of these to
separate line.
 2026-08-04 17:57:53 +03:00
Priit Laes b99436543a makefile: Make CC and ASM overridable via command line 
This makes it easier to run make without docker within
distros without editing Makefile. For example Fedora:
`ASM=sdcc-sdas8051 CC=sdcc-sdcc make`
 2026-08-04 13:17:53 +03:00
d00f 1194823cd5 system: drop the defensive checks around the System page fields 
The hostname and model fields were populated through element-existence
checks and empty-string fallbacks that the other fields on the page do
without. Assign them the same way.

Suggested-by: vDorst
 2026-08-04 05:43:05 +02:00
d00f 94716ceb5d system: derive the default hostname from the MAC address 
Every switch came up as "RTLPlayground", so several of them on one
network were indistinguishable until someone configured a name. Append
the last three MAC octets (e.g. RTLPlayground-1ef924) - unique in
practice, still recognisable, and any "hostname ..." line in the startup
config overrides it as before.

Suggested-by: plaes
 2026-08-04 05:43:05 +02:00
d00f 13120127df cmd: make "hostname" report the name and reject stray arguments 
Typing "hostname" on its own cleared the name: with no argument the copy
loop never ran and the terminating NUL landed at index 0. Report the
current name instead, accept exactly one argument to set it, and reject
anything longer - a name with spaces tokenizes into several words, and
silently keeping only the first one is worse than an error. Walk the
buffer with a pointer, which the compiler codes better than indexing.

Suggested-by: vDorst
 2026-08-04 05:43:05 +02:00
ZYT 46037cd54d Add FG-4GT-2SX_V2.0 2026-08-02 06:46:52 +08:00
d00f e6cd362a1e system: show the hardware model on the System page 
machine.machine_name is already reported in /information.json as hw_ver;
surface it read-only on the System Settings page so the exact build
target is visible in the UI, without adding a redundant JSON field.
 2026-07-25 13:21:13 +02:00
d00f f21b3a32bd system: configurable hostname (device identity) 
Add a device hostname settable from the CLI (`hostname <text>`) and the
System Settings page. The value is sanitized on ingest to JSON-safe
printable ASCII (<=23 chars), stored in a shared __xdata buffer, seeded
to "RTLPlayground" at boot, persisted through the startup-config, and
reported in /information.json. It lives in the common header so other
modules can advertise it (LLDP uses it as the System Name TLV).
 2026-07-25 13:07:09 +02:00
logicog 35941dd19f Merge pull request #291 from DrDoof/fix/webui-login-cookies 
httpd: fix browser login (cookie parsed by name, Connection: close, self-contained login page)
 2026-07-25 11:09:19 +02:00
d00f 0f257d38df httpd: shorten comments per review 
Keep only the non-obvious bits; the rationale for each change already
lives in the respective commit messages.
 2026-07-25 10:39:32 +02:00
logicog 912e68d6eb Merge pull request #295 from sempr/main 
Fix rate range for SDS_10GR return value
 2026-07-25 08:21:53 +02:00
Sempr c473646389 Fix rate range for SDS_10GR return value 
Broaden range of SFP+ rates mapped to SDS_10GR
A commonly used SFP+ form-factor 10GBASE-LR (Hisense LTF1303-BH+) reports 0x62(	BR Nominal: 9800MBd) at
power on and then switches to 0x64 after booting up.

0x62 -> 9.8gbps
0x63 -> 9.9gbps
0x64 -> 10gbps
0x6f -> 11.1gbps
0x70 -> 11.2gbps

These are outside of the previous 0x63-0x6f range which prevented the link from ever being brought up. So I changed the range to 0x62-0x6f
 2026-07-24 16:02:20 +08:00
logicog 51cf40d040 Merge pull request #290 from eraiza0816/feat/dockerfile 
add: docker use prerequisites
 2026-07-24 07:58:12 +02:00
d00f 3fd9cdfa7e httpd: parse the session cookie by name, not fixed offset 
Root cause of the "browser login always bounces back with Wrong password!
while curl works": scan_header() read the session id from a fixed offset
into the Cookie header (p + 17), assuming "session=" is the first and only
cookie. Browsers keep stale cookies for a long time - e.g. an "admin" cookie
left over from this switch's VENDOR firmware - so the header can arrive as
"Cookie: admin=..; session=..", the fixed offset then points into the admin
value, authentication silently fails and every page bounces to login although
the password had been accepted. curl sends only "session=", which is why
command-line tests passed while a real browser (with that stale cookie) failed.

- scan_header(): scan the Cookie header for the actual "session=" key
  (matched as "session" - is_word() requires a separator after the pattern
  and '=' is on its list, the first value byte is not).
- is_word_x(): accept ';' as a terminating separator so the session value
  also matches when it is not the last cookie in the header.

Verified on hardware end-to-end in a real browser WITH the stale "admin"
cookie present: login -> index.html, all pages and JSON endpoints work.
 2026-07-21 06:48:18 +02:00
d00f 3189820ba0 httpd: send Connection: close (single-connection uIP mitigation) 
Real root cause of the "web login fails from a browser but works from curl":
the uIP httpd is built with UIP_CONF_MAX_CONNECTIONS = 1 and uses global
response state (outbuf/slen/session), i.e. it serves exactly one TCP connection
at a time and closes it after each response - but never advertises that via
the Connection header. A browser's HTTP/1.1 client therefore assumes the
connection may be persistent and can park it in its keep-alive pool for reuse;
a later request sent on that pooled connection hits one the server has already
closed, and a POST (unlike a GET) is never retried by the browser, so it can
be silently lost this way.

This adds "Connection: close" to every response so the browser does not pool
and reuse a connection the server is about to drop. On its own this did not
fully explain the reported login failures - the actual authentication bug is
fixed in the next commit (the Cookie header parsed at a fixed offset) - but it
is correct behaviour for a server that only ever handles one connection, and
removes one source of dropped requests.
 2026-07-21 06:47:44 +02:00
d00f ed74ec1e97 httpd/login: complete CSP + password autocomplete hint 
Two hygiene fixes for the web UI, prompted by a login that appeared to fail
under privacy shields (Brave Shields / NoScript-family extensions):

- httpd: replace the partial "style-src 'self' 'unsafe-inline'" CSP with a
  complete, first-party policy (default-src 'self'; script-src 'self'
  'unsafe-inline'; style-src 'self' 'unsafe-inline'; img-src 'self' data:;
  connect-src 'self'; form-action 'self'). Everything the UI needs is
  same-origin; the explicit policy stops shields injecting their own
  restrictive report-only probes (the noisy script-src-elem 'none' console
  spam) and passes a strict-CSP audit. Verified: no CSP violations in-browser.
- login.html: add autocomplete="current-password" so password managers
  recognise the field (they showed "unknown password" without it).

NOTE: these do NOT bypass a browser's LAN-device protection (NoScript "lan" /
Brave Shields), which strips the POST body of requests to a LAN address and is
why the login can fail in-browser while the same credentials work over curl.
That is a deliberate browser security feature; the user must allow the site in
their shields to log in. The backend password (default 1234) is unchanged and
correct.
 2026-07-21 06:47:10 +02:00
Your Name dd95a05487 add: docker use prerequisites 2026-07-19 19:49:30 +09:00
logicog 481c02c740 Merge pull request #289 from eraiza0816/fix/httpd-sim-const-warning 
fix: httpd-sim-const-warning
 2026-07-19 09:49:08 +02:00
Your Name 0a31a65477 fix: httpd_sim 2026-07-19 16:44:21 +09:00
Lynn-Becky 2d176b7ccc add SWTG024AS-A-V2.0.1 with 5 RJ45 port (#282) 
* add MACHINE_SWTG024AS_A_2_0_1_5_RJ45

* fix(machine): update SFP port LED color descriptions for PCB-SWTG024AS V2.0

* add(doc): create a simple documentation for SWTG024AS-A-V2.0.1_5_RJ45

* refactor(machine): update machine definition
 2026-07-18 06:20:47 +02:00
logicog a1fac63710 Merge pull request #286 from eraiza0816/feature/language-settings 
add language selection to system settings
 2026-07-18 06:18:33 +02:00
logicog 5c7f82e2fe Merge pull request #285 from eraiza0816/feat/dockerfile 
feat: add Dockerfile for development environment
 2026-07-18 05:58:10 +02:00
Your Name e765d17c2b feat: add language selection to system settings 
Add a language selector to the System Settings page supporting English,
Japanese, and Chinese. The i18n dictionary already contained zh
translations but lacked the UI to switch languages.

Changes:
- html/i18n.js: add sys_language key to en/ja/zh
- html/system.html: add language selector dropdown
- html/system.js: add changeLang() and selector initialization
- tools/httpd_sim.c: fix cookie parsing for multi-cookie headers;
  fix Set-Cookie response (missing Path=/, missing \r\n\r\n);
  add SO_REUSEADDR for faster port reuse
 2026-07-15 01:35:10 +09:00
Your Name 8fb9afb955 feat: add Dockerfile for development environment 
- Debian 13 (trixie) based with sdcc 4.5.0 from apt
- Includes gcc, make, xxd, python3, libjson-c-dev, golang-go
- Add .dockerignore to exclude build artifacts
- Add Docker usage section to README (collapsible)
 2026-07-14 02:10:55 +09:00
logicog e96780fadb Merge pull request #280 from tofurky/ddm_broken_module 
Add SFP quirk for devices that misreport DDM capability
 2026-07-13 09:57:35 +02:00
Matt Merhar 2221f0fa32 Add SFP quirk for devices that misreport DDM capability 
On a QSFPTEK QT-SFP+-T (RTL8261C) 10GBase-T module, the diag type field
(92) comes back as 0x00, but there's actually some statistics available
like temperature. Other metrics may be hard-coded values.

Add a basic struct that allows matching on vendor and/or model, using a
bitfield to allow multiple quirks for a given SFP module. Only
SFP_QUIRK_DDM is implemented.

For modules matching SFP_QUIRK_DDM, attempt an I2C read of the MSB of
module voltage during probe if DDM is "unsupported" - if it's not 0xff,
override the reported options so we can pull the diagnostic data.

To allow simpler comparisons, convert the ASCII fields (vendor,
model, serial) from space-padded to standard NULL-terminated strings.

strcmp() is moved from httpd.c to rtlplayground.c alongside other string
functions and shared between them.

The __reentrant keyword is used for the new functions to avoid using up
additional OSEG space. This allocates the variables on the stack, which
is OK for this particular code path.

The JSON assembly in send_status() is slightly modified to treat the
sfp_module_* data as standard NULL-terminated strings, and a repeated
subtraction was moved into a uint8_t to declutter the code.
 2026-07-13 01:31:29 -04:00
logicog f86b8f32de Merge pull request #283 from Lynn-Becky/translate/chinese 
Translate to Chinese
 2026-07-13 07:15:52 +02:00
logicog 9389db9e9b Merge pull request #284 from eraiza0816/feature-translate 
fix: rename local variable to avoid shadowing global translation
 2026-07-13 07:15:29 +02:00
Your Name 519c3a8df3 fix: rename local variable to avoid shadowing global translation function 2026-07-10 13:09:41 +09:00
Lynn-Becky 64422367d5 feat(translate):translate to Chinese 2026-07-08 20:40:00 +08:00
logicog dc2b03e331 Merge pull request #279 from eraiza0816/translate-japanese 
Support i18n & translate japanese
 2026-07-07 19:28:19 +02:00
Your Name fcf1b3c310 Fix: Remove the language-specific display logic. 2026-07-05 02:31:37 +09:00
Your Name 1dd6156a1f add: how to support i18n 2026-07-05 01:09:50 +09:00
Your Name e75a4c2a95 support i18n & translate japanese 2026-07-05 00:51:27 +09:00
René van Dorst 05d8c36afe Merge pull request #278 from eraiza0816/update-docs-SWTG024AS 
update document: SKS3200M-4GPY2XF flash size
 2026-07-04 12:47:04 +00:00
René van Dorst b6c9eaf00f Merge pull request #275 from riker77/mokerlink-2G040210GSM 
Add Mokerlink 2G040210GSM (2M-PCB43-V1.1)
 2026-07-04 12:45:47 +00:00
Your Name ecf5f47960 update SKS3200M-4GPY2XF flash size 2026-07-04 15:52:25 +09:00
Ron ebf6ed7526 Update 2M-PCB43-V1.1.md 
Add hint to use KP_9000_6XHML_X2 as a compatible machine definition.
 2026-06-29 20:30:07 +02:00
riker77 96f2c860fc Add Mokerlink 2G040210GSM (2M-PCB43-V1.1) 2026-06-29 17:57:09 +02:00
feelfree69 b80d46955c Merge pull request #274 from Lynn-Becky/feat/PCB-SWTG024AS-V2.0 
fix(machine): move SWTG024AS-specific SDS0 setup to machine.c
 2026-06-28 21:32:53 +02:00
Lynn-Becky 0a18c64dcc fix(machine): move SWTG024AS-specific SDS0 setup to machine.c 2026-06-28 22:47:33 +08:00
René van Dorst b53c56e7f6 Merge pull request #273 from Lynn-Becky/feat/PCB-SWTG024AS-V2.0 
fix(machine): SWTG024AS V2.0 fix 5th RJ45 port
 2026-06-27 19:50:05 +00:00
Lynn-Becky 17d41b53b7 update doc 2026-06-28 00:56:50 +08:00
Lynn-Becky bd98cb0312 fix(machine): SWTG024AS V2.0 fix 5th RJ45 port 2026-06-28 00:48:05 +08:00
René van Dorst 5566d71522 Merge pull request #272 from Lynn-Becky/feat/PCB-SWTG024AS-V2.0 
fix(SWTG024AS-V2.0): correct SFP port GPIO assignments
 2026-06-27 13:33:29 +00:00
Lynn-Becky 5e1396cc42 fix(machine): correct SFP port GPIO assignments 2026-06-27 21:16:47 +08:00
René van Dorst 7fe0678c92 Merge pull request #271 from th0m4sek/main 
Add reset button gpio to SWTG018AS-A V2.0
 2026-06-25 18:33:18 +00:00
th0m4sek 7ec25a39a2 Add brands information for SWTG018AS-A V2.0 
Added brands section with details for Ampcom and Horaco.
 2026-06-25 20:23:54 +02:00
th0m4sek 98e3cde2f5 Update reset_pin on SWTG018AS-A V2.0 2026-06-25 20:16:56 +02:00
René van Dorst d90c02f951 Merge pull request #268 from th0m4sek/main 
Table with supported devices
 2026-06-23 17:40:51 +00:00
th0m4sek bbb92c86db Fix formatting issue in supported_devices.md 2026-06-23 09:16:05 +02:00
René van Dorst 1635236a05 Merge pull request #266 from hlyi/pr-tool 
Tools for detecting GPIO mapping and extracting LED configure
 2026-06-23 06:28:38 +00:00
th0m4sek 5e3a280b5c Update supported devices list with new entries 2026-06-23 07:26:35 +02:00
HL Yi a56e2a419b sleep-interval default value is reduced to 1. 
i2c-bus is required argument
replace --bus with --i2c-bus for i2c_dump_rtl_regs.py for better consistency
format lint clean up
 2026-06-22 18:02:34 -05:00
th0m4sek 9c01227572 Fix typo in device manufacturer name from 'Haraco' to 'Horaco' 2026-06-22 23:21:13 +02:00
th0m4sek 6d37a47481 Rename Horaco SWTGW215AS to HC-SWTGW218AS 2026-06-22 23:18:42 +02:00
th0m4sek 87b9e59cdb Update ZX-SWTG124AS entry with new data 2026-06-22 22:47:02 +02:00
th0m4sek 0e86b84efa Add Ports column to supported devices list 
Updated the supported devices table to include Ports column and adjusted device details.
 2026-06-22 22:45:20 +02:00
René van Dorst bd595b7f94 Merge pull request #263 from Lynn-Becky/feat/PCB-SWTG024AS-V2.0 
Add PCB-SWTG024AS V2.0 (Unmanaged)
 2026-06-22 19:27:38 +00:00
Lynn-Becky 06d4a3504a Add LED status comments,try to fix 5th rj45 2026-06-23 00:42:31 +08:00
Lynn-Becky d68534e833 update PCB-SWTG024AS-V2.0 to SWTG024AS-V2.0 2026-06-22 23:51:57 +08:00
Lynn-Becky e0356bd751 Add SWTG024AS-V2.0 doc and photo 2026-06-22 22:24:46 +08:00
HL Yi 4b770a8abc Fixed document based upon vDorst 
Expand ignore IO list to the GPIOs related to SYS_LED, UART, SMI, and SPI
 2026-06-22 07:08:19 -05:00
th0m4sek 709436ca13 Update supported devices list 
Added new device 'Keeplink KP-9000-6XH-X2' and removed duplicate 'Horaco SWTGW215AS' entry.
 2026-06-22 12:08:52 +02:00
th0m4sek 28856ef495 Revise supported devices documentation 
Updated the supported devices list with new entries and details.
 2026-06-22 12:07:30 +02:00
th0m4sek 113bb654aa Add links to PCB documentation for supported devices 
Updated device entries with links to detailed PCB documentation.
 2026-06-22 11:14:04 +02:00
th0m4sek efc1883685 Table with supported devices 
Added a table listing supported hardware devices with details.
 2026-06-22 10:38:40 +02:00
feelfree69 72921ba3be Merge pull request #267 from hlyi/pr-doc 
add SKS3200-8E1X to SWTGW218AS.md doc
 2026-06-22 08:00:46 +02:00
HL Yi 70be673fca updates based upon vDorst's feedback. 
change i2c_read_rtl_gpio sleep tiemr to 1s
update README.md
Sorted port speed
 2026-06-22 00:18:32 -05:00
HL Yi bf5205258e add SKS3200-8E1X to SWTGW218AS.md doc 2026-06-21 17:24:02 -05:00
René van Dorst 98ddb0bb29 Merge pull request #253 from Erdnusschokolade/fix/vlan-mgmt-filter 
Fix conf_overwrite filter removing vlan mgmt entries
 2026-06-21 18:52:59 +00:00
HL Yi d152f89549 remove redundant code 2026-06-21 13:22:54 -05:00
HL Yi c61e94527e add clarification for firmware requirement 2026-06-21 13:21:06 -05:00
HL Yi f76ccaf3d8 add disclaim that tool tested in linux 2026-06-21 13:08:58 -05:00
HL Yi ebc6cd06ad add utilities for led and gpio dump and detection 2026-06-21 13:04:04 -05:00
Lynn-Becky 017aaf71d6 Add PCB-SWTG024AS V2.0 machine target 2026-06-21 01:15:34 +08:00
Erdnusschokolade 4eaf16f96d Drop dead exact-match check in vlan delete filter 
A bare "vlan N" line never matches conf_cmds (a VLAN entry always carries
a member port or the mgmt/name keyword), so it is never stored. The
c !== "vlan N" comparison could therefore never match an entry; the
startsWith(prefix) check alone covers all stored vlan lines.
 2026-06-20 08:13:43 +02:00
Erdnusschokolade 718745e7b5 Reduce stale management VLAN entries on config save 
The firmware has a single management VLAN (one management_vlan variable),
so a stored config should never carry more than one "vlan N mgmt" line.
When parsing a mgmt command, drop any previously stored mgmt entry so
repeatedly changing the management VLAN no longer accumulates stale lines.
 2026-06-20 08:00:54 +02:00
Erdnusschokolade 06ee1ce38e Persist port speed settings in config parser 
parseConf() only recognized "port N name" in conf_cmds, so "port N <speed>"
lines were treated as unknown commands and dropped on save - configured port
speeds never persisted.

Add the speed command (incl. optional half/full duplex suffix) to conf_cmds,
add a "port N" entry to conf_overwrite so re-saving a speed replaces the
previous value, and guard the per-port name entry so changing a port's speed
no longer wipes its configured name.
 2026-06-18 14:49:56 +02:00
René van Dorst f122402bdd Merge pull request #259 from logicog/rtl8221b_100m_support 
Add support for 100M on RTL8221B ports
 2026-06-15 17:54:03 +00:00
logicog 842d68af97 Add support for 100M on RTL8221B ports 2026-06-15 18:40:03 +02:00
logicog bfd1ce9183 Merge pull request #209 from hlyi/pr 
Add Steamemo IG204 V1 support
 2026-06-12 17:35:17 +02:00
feelfree69 4ed6575a87 Merge branch 'main' into pr 2026-06-10 08:40:35 +02:00
feelfree69 1b1c656404 Merge pull request #215 from logicog/2x10g 
Add  ZX310S-4T2XT device support
 2026-06-10 08:21:48 +02:00
logicog 018eab9810 Also display RTL837X_REG_LED_MODE 2026-06-10 05:45:19 +02:00
logicog ec36658ab9 Add ZX310S-4T2XT device photos 2026-06-10 05:45:19 +02:00
logicog eeded0f788 Add (Horaco) ZX310S-4T2XT 
The ZX310S-4T2XT is a managed device with 2x2.5GBit and 2x10GBit Ethernet.
It is sold, among others, by Horaco as an unbranded device.

CPU: RTL8372
Flash: 2MByte Winbond W25Q16DV (U3)
PHY 2x RTL8261BE
 2026-06-10 05:45:19 +02:00
logicog 8f3b738e59 Merge pull request #257 from logicog/revert-252-main 
Revert "Don't disable flash DIO operation before flashing"
 2026-06-07 10:47:10 +02:00
TylerDurden-23 62065875e3 Revert "Don't disable flash DIO operation before flashing" 2026-06-07 10:42:39 +02:00
HL Yi e7f70a724b add doc for STEAMEMO_IG204_V1 2026-06-05 20:05:26 -05:00
HL Yi d7a7bdac7e add support of STEAMEMO_IG204_V1 2026-06-05 18:32:22 -05:00
René van Dorst 94e34a5991 Merge pull request #251 from feelfree69/make 
make: seperate output directories by MACHINE
 2026-06-05 19:16:04 +00:00
René van Dorst b58b1dfb35 Merge pull request #252 from feelfree69/main 
Don't disable flash DIO operation before flashing
 2026-06-05 19:13:30 +00:00
Erdnusschokolade 592b903305 Fix conf_overwrite filter removing vlan mgmt entries 
The vlan/mgmt lookahead split (commit dcc60c3) correctly separated the
patterns so that `vlan N mgmt` and `vlan N <members>` match different
conf_overwrite entries. But the filter that applies the overwrite still
used `item.startsWith(matchStr + " ")` with matchStr = "vlan N", which
also matches "vlan N mgmt" — so the management entry was removed whenever
the VLAN's membership definition was re-saved.

Example: with both `vlan 44 management 2t 4t 5 6t` and `vlan 44 mgmt`
in the config, changing the membership dropped `vlan 44 mgmt` entirely.

Added a `!item.endsWith(" mgmt")` guard so management entries survive the
filter. No reordering is needed: `vlan N mgmt` only sets the global
management_vlan variable (cmd_parser.c) and does not depend on the VLAN
table entry existing, so its position in the config is irrelevant.
 2026-06-02 22:52:06 +02:00
feelfree69 4ca5b4e87a Don't disable flash DIO operation before flashing - it works fine with DIO 2026-06-01 15:07:37 +02:00
logicog 5a8a8ed91b Merge pull request #237 from Erdnusschokolade/fix/config-persistence 
Fix config persistence: missing commands, delete handling, multipart upload
 2026-06-01 06:46:11 +02:00
René van Dorst ad64e450e1 Merge pull request #246 from logicog/sfp_speed 
Add support for configuring SFP modules speeds via CLI
 2026-05-31 18:33:05 +00:00
feelfree69 cfeffc434d Merge pull request #248 from zectaiga/swtg024as-a-2-0-1-fixes 
Fix SWTG024AS-A 2.0.1 port and LED mapping
 2026-05-31 10:42:01 +02:00
feelfree69 8670709b6e make: seperate output directories by MACHINE 2026-05-31 01:17:33 +02:00
logicog 1a457c29ac Add support for 100FX modules and forcing 100FX 2026-05-30 23:08:44 +02:00
logicog ce496ab25f Merge pull request #249 from vDorst/fix_led_settings 
Fix SFP led for 2.5gbit for MACHINE_SWGT024_V2_0
 2026-05-30 22:07:56 +02:00
René van Dorst 964ef2da7a Fix SFP led for 2.5gbit for MACHINE_SWGT024_V2_0 
While testing #246, I noticd that SFP did not light-up while forcing
2.5gbit link. This is because RJ45 and SFP share the same LED-settings.
But RJ45 has two leds-settings.
Solution is to add settings for SFP for both managed and unmanaged
variant.
 2026-05-30 21:02:42 +02:00
logicog 8c61010a84 Add support for configuring SFP modules speeds 2026-05-29 20:46:08 +02:00
Taiga Ogawa 053dbe286e Fix SWTG024AS-A 2.0.1 port and LED mapping 2026-05-30 03:44:15 +09:00
feelfree69 e68e5cef46 Merge pull request #244 from kekopop/main 
Add PCB-SWTG024AS-A-V2.0.1
 2026-05-26 22:15:21 +02:00
kekopop b5543b6aeb Update machine.c 2026-05-26 22:04:26 +02:00
kekopop a51fcf1478 Update machine.h 2026-05-26 22:03:42 +02:00
kekopop 247cb4dd2f Add files via upload 2026-05-26 19:44:31 +02:00
logicog 394fc99485 Merge pull request #242 from tofurky/fix_xgspon_rates 
Broaden range of SFP+ rates mapped to SDS_10GR
 2026-05-26 05:32:54 +02:00
logicog cf0707475d Merge pull request #241 from tofurky/regset_arg_count 
Correct argument count for regset command
 2026-05-26 05:25:22 +02:00
Matt Merhar 73b99b2f08 Broaden range of SFP+ rates mapped to SDS_10GR 
A commonly used SFP+ form-factor XGS-PON ONT (WAS-110) reports 0x63 at
power on and then switches to 0x64 after booting up.

0x63 -> 9.9gbps
0x64 -> 10gbps

These are outside of the previous 0x66-0x69 range which prevented the
link from ever being brought up.
 2026-05-25 21:45:42 -04:00
Matt Merhar 005eaa3248 Correct argument count for regset command 
Fixes: 2cdab5f9d9 ("parse_reg{set,get}() make use cmd_words_len.")
 2026-05-25 20:24:27 -04:00
feelfree69 98f1e9443a Merge pull request #239 from amstan/ztyuav 
doc: Describe other PCB-K0402WS-V3.0 devices
 2026-05-25 23:23:16 +02:00
feelfree69 4c2be334d5 Merge pull request #233 from Erdnusschokolade/feature/vlan-overview 
Add VLAN selector dropdown and overview table to vlan.html
 2026-05-25 12:30:30 +02:00
Alexandru M Stan 073cc1e4a4 doc: Describe other PCB-K0402WS-V3.0 devices 
I recently brought a "Ztyuav Z-QWYT0402", the insides looked identical to the
existing supported "Hisource Hi-K0402WS". Both of them have the
"PCB-K0402-V3.0" silkscreen.

I flashed the vanilla image and it seems to work great.

I changed the documentation to be more inclusive of other devices (including
adding a picture of mine). I suspect more devices might fall into this
"PCB-K0402-V3.0" bucket, for example the "YuanLey YS25-0402" with
the vlan switch also looks suspiciously identical from the outside.

I also added some details I noticed while flashing mine:
teardown, flash padding, how the selector switch actually works.
 2026-05-24 18:33:23 -07:00
Erdnusschokolade ba919280ac Address PR #233 review feedback 
- itoa16_html: add comment that the function is sufficient for VLAN
  IDs (<=4094); generalization not needed.
- send_vlanlist: replace post-write bounds check with a pre-write
  guard using worst-case entry size (138 bytes + 1 for closing
  bracket). Old comment claimed ~45 bytes per entry, which only
  held for short names. With a 117-char name (the actual bound from
  CMD_BUF_SIZE) entries can reach 138 bytes, and the post-check
  would not have prevented an overflow.
- Document the 0x02 check in sfr_data[0] as the VLAN table entry
  valid flag.
 2026-05-24 23:31:18 +02:00
Erdnusschokolade dcc60c3824 Fix conf_overwrite vlan/mgmt conflict 
The pattern /^vlan\s+\d{1,4}\b/ matched both VLAN membership entries
(vlan N <ports>) and management entries (vlan N mgmt), causing them
to overwrite each other in configuration[]. When saving, whichever
form came last in the cmd_log would dedupe the other out of the
final config — resulting in either lost membership or a stale mgmt
setting.

Split into two patterns using negative lookahead:
- /^vlan\s+\d{1,4}\s+mgmt$/      matches only mgmt entries
- /^vlan\s+\d{1,4}(?!\s+mgmt\b)/  matches everything else

Both dedup independently. Discovered via hardware test on 6XH-X
where 'vlan 44 mgmt' silently dropped 'vlan 44 management 2t 5u'
from saved config, locking out web UI on next boot.
 2026-05-24 11:26:04 +02:00
Erdnusschokolade caad366b3b Fix config persistence: missing commands, delete handling, multipart 
Multiple related bugs in the Save-to-Flash path:

1. Multipart upload was missing the required filename argument,
   causing the backend parser to fail. Added 'config.txt' to the
   form.append call. This was likely the primary reason Save-to-Flash
   was unreliable.

2. Web UI was not pausing its polling interval during flash write,
   causing CPU contention and intermittent crashes. Added isSaving
   lock and clearInterval before sendConfig.

3. conf_cmds whitelist was incomplete. Added: syslog, passwd, pvid,
   ingress, port name, lag, laghash, isolate, stp, igmp, mtu, bw,
   vlan N mgmt, vlan N d.

4. VLAN regex blocked named VLANs. New pattern allows optional name
   (starts with letter, matching CLI parser semantics).

5. vlan N d (delete) was not persisted. parseConf now removes the
   matching vlan N ... entry from configuration[] when seeing a
   delete command, without storing the delete itself. Result: the
   saved config describes the end state.

6. configuration[] was not cleared between flashSave invocations,
   leading to stale entries from prior interactions.

7. conf_overwrite boundary fix: 'pvid 1' no longer matches 'pvid 10'
   etc. Added trailing space in startsWith check.

8. All conf_cmds patterns now anchored with ^...$ for full-line
   match. parseConf normalizes whitespace before testing.

9. Port range widened to \d{1,2} so ports 11+ are accepted.

Structural fixes (1, 2, 6, 7, 8) ported from mcaptur's closed PR #219;
remaining fixes (3, 4, 5, 9) and overall regex strategy are new.
 2026-05-24 11:26:04 +02:00
Erdnusschokolade ce0ee859d6 Fix: Untagged Ports column included non-member ports 
The hardware bitmask format encodes both "untagged members" and
"non-members" in the upper 10 bits (per doc/vlan.md). The existing
fetchVLAN() correctly masks this with the membership bitmask before
display, but loadVlanTable() did not, causing non-member ports to
appear in the Untagged Ports column.

Tested on KeepLiNK KP-9000-6XH-X.
 2026-05-24 11:20:57 +02:00
Erdnusschokolade a369e46fe6 Add VLAN overview table to VLAN configuration page 
Below the configuration form, a new table lists all configured VLANs
with their port memberships: Member, Tagged, Untagged, and PVID
columns. Port ranges are formatted compactly (e.g. "1-2,5").

Port-to-bit mapping uses the existing physToLogPort[] array populated
by /status.json, so the table is consistent with the icon view in
fetchVLAN() and works on any supported machine.

Each row has a delete button that sends "vlan N d" via /cmd, with
a confirmation dialog. VLAN 1 cannot be deleted (no button shown).

Table and dropdown both refresh automatically after Update/Create
and after delete via a new refreshVlanViews() helper.

The N+1 request pattern (1x /vlanlist + Nx /vlan.json) keeps the
backend simple and avoids buffer overflow risks for systems with
many VLANs. For typical configurations (<50 VLANs), page load
remains under one second.
 2026-05-24 11:20:57 +02:00
Erdnusschokolade defb37c06a Add VLAN selector dropdown to VLAN configuration page 
A new <select> element above the VLAN ID input lets users pick an
existing VLAN by name instead of typing the ID. Options are loaded
from /vlanlist on page load and re-loaded after successful
Update/Create operations.

Selection triggers the existing fetchVLAN() flow.

Falls back gracefully if /vlanlist returns an empty list or fails:
the dropdown is hidden and the existing ID input remains functional.
 2026-05-24 11:20:57 +02:00
Erdnusschokolade a5f77e4caf Add /vlanlist HTTP endpoint 
Returns a JSON array of all configured VLANs with their IDs and names,
e.g. [{"id":1,"name":""},{"id":20,"name":"IoT"}].

The endpoint iterates VLAN IDs 1..4094 and filters by the validity bit
in sfr_data[0] (0x02), following the same pattern as vlan_create() and
vlan_setup() in rtl837x_port.c.

Also adds a small itoa16_html() helper for emitting decimal numbers
up to 4 digits (analogous to the existing 8-bit itoa_html()), used
for VLAN IDs which can reach 4094. Response builder uses the existing
vlan_name() helper for the name lookup, consistent with send_vlan().

Buffer overflow is prevented by breaking out of the iteration loop at
TCP_OUTBUF_SIZE - 60.

This endpoint is the foundation for upcoming UI improvements
(VLAN selector dropdown and overview table).
 2026-05-24 11:20:57 +02:00
logicog 1311cb9ea9 Merge pull request #232 from Erdnusschokolade/fix/vlan-name-rename 
Fix VLAN name persistence across rename and delete operations
 2026-05-23 12:47:06 +02:00
Erdnusschokoladeandlogicog 7d0d8525d2 Fix two OOB reads in parse_vlan() 
1. While loop scanning VLAN name terminated only on ' ', not '\0'.
   When the name is the last token in cmd_buffer, the loop reads past
   the buffer into adjacent XRAM.

2. Entering 'vlan' without arguments causes parse_vlan() to read
   cmd_words_b[1] which points to undefined memory, causing atoi_short()
   to interpret residual bytes from previous commands as a VLAN ID.
   Bug found and fix proposed by logicog during review of PR #232.

Co-Authored-By: logicog <logicog@users.noreply.github.com>
 2026-05-23 11:19:42 +02:00
logicog 201289990b Merge pull request #236 from Erdnusschokolade/doc/vlan-mgmt-command 
doc: document vlan <id> mgmt command
 2026-05-23 07:31:39 +02:00
Erdnusschokolade 3a93ce1786 doc: document vlan <id> mgmt command 
Adds CLI reference for the previously undocumented vlan <id> mgmt
command, including the disable case (vlan 0 mgmt), default state,
and a lockout warning.

Fixes #235
 2026-05-23 00:26:13 +02:00
René van Dorst 4b42be8cae Merge pull request #234 from logicog/fix_duplex 
Fix duplex setting on the CLI
 2026-05-22 19:38:33 +00:00
logicog 32f9b91def Fix duplex setting on the CLI 
Fixes commands such as
> port 1 duplex half
 2026-05-22 21:07:29 +02:00
Erdnusschokolade 21f33abfa7 Fix VLAN name persistence across rename and delete operations 
Previously, renaming a VLAN or deleting and recreating it with a
different name did not update the displayed name. The vlan_names[]
array is an append-only buffer where vlan_name() returns the first
matching entry, so stale entries kept winning.

This commit adds vlan_name_remove(), which locates an entry by
VLAN ID and removes it via array compaction. The function is called
in two places:

  - parse_vlan() in cmd_parser.c, before appending a new name entry,
    to remove any pre-existing entry for the same VLAN ID
  - vlan_delete() in rtl837x_port.c, to clean up the name when a
    VLAN is removed

The implementation reuses the existing vlan_name() lookup, scans for
the trailing space of the matched entry, then shifts remaining bytes
left. Locals are declared as static __xdata to avoid the SDCC
overlay segment limit on banked functions.

Tested on KeepLiNK KP-9000-6XH-X:
  - vlan 99 AAA p1u; vlan 99 BBB -> name updated to BBB
  - vlan 99 d; vlan 99 CCC p1u   -> name correctly CCC, not stale AAA

Note: This fix addresses the runtime XMEM state. Persistence of
renamed VLAN names across reboot requires the user to download and
re-upload /config, as is the existing pattern for all configuration
changes in this firmware.
 2026-05-21 17:39:29 +02:00
René van Dorst d253c9feee Merge pull request #231 from xristos-sk/fix-rtl837x_stp-bug,-cmpMac-always-0-when-checking-for-new-root 
fix: rtl837x_stp bug, cmpMac always 0 when checking for new root
 2026-05-19 19:57:45 +00:00
sk_thes 2552f586d8 fix: rtl837x_stp bug, cmpMac always 0 when checking for new root 
When checking for a new root, a root_bridge with the same priority as STP_I will never be adopted as cmpMAC always returns 0.

This PR fixes this bug by changing the comparison of MACs to what was intended
 2026-05-18 22:47:31 +00:00
logicog f113b2c0e5 Merge pull request #230 from vDorst/refactor_is_word 
Refactor is_word() and is_word_x()
 2026-05-18 18:31:17 +02:00
logicog 2d912d80c9 Merge pull request #229 from vDorst/fix_login 
Fix and refactor is_url_word_x()
 2026-05-18 18:30:28 +02:00
logicog 0682df3027 Merge pull request #226 from UAb5eSMn/execute_commands 
Support for executing multiple commands via /cmd
 2026-05-18 18:29:55 +02:00
René van Dorst 4b40efafbb Fix and refactor is_url_word_x(). 
With content_type = "application/x-www-form-urlencoded", "+" means space.
This case was not handled.

Also refactor the code to make a loop to process the hex digits.
 2026-05-17 21:23:35 +02:00
René van Dorst 02992771ad change is_word_x() return type from char to bool. 
Saves 10 bytes.
 2026-05-17 21:15:39 +02:00
René van Dorst f81c497728 refactor is_word_x() 
Saved 22 bytes.
 2026-05-17 21:13:07 +02:00
René van Dorst b46cc2087f change is_word() return type from char to bool. 
Saves 52 bytes.
 2026-05-17 21:12:57 +02:00
René van Dorst 3904daced7 refactor is_word() 
Saved 23 bytes.
 2026-05-17 19:14:27 +02:00
René van Dorst 623247da4f httpd: Added extra content_type check for login. 
Ensure login content_type is "application/x-www-form-urlencoded".
 2026-05-17 17:17:15 +02:00
René van Dorst aa5368cf34 Merge pull request #228 from zectaiga/add-fns1200p 
Add support for FOXNEO FNS-1200P (RTL8372, 4x2.5G PoE+ + 2x SFP+)
 2026-05-17 11:58:18 +00:00
René van Dorst 2b39d723c7 Merge pull request #225 from orbisai0security/fix-v010-firmware-upload-auth-integrity 
fix: authenticate config upload before flash erase and abort failed firmware CRC
 2026-05-17 11:52:22 +00:00
Taiga Ogawa f6cb1152f9 Add support for FOXNEO FNS-1200P (RTL8372, 4x2.5G PoE+ + 2x SFP+) 
- machine.c/h: add MACHINE_FNS1200P with verified GPIO assignments for
  both SFP ports, LED SET0 (amber 2.5G / green 1G-100M-10M) and SET1
  (SFP all-speeds), led_mux from original firmware register dump, and
  machine_custom_init() enabling LED_GLB_IO_EN bit 6
- doc/devices/FNS-1200P.md: device overview, port layout, serial
  console (S1 three through-holes = UART0 115200 8N1 3.3V),
  LED and SFP GPIO tables
- doc/devices/photos/FNS-1200P/: chassis front panel and PCB top photos
- doc/supported_devices.md: add FNS-1200P to the list

GPIO assignments and LED register values were cross-checked between
live GPIO observation (RTLPlayground gpio command) and an original
firmware register dump.
 2026-05-16 17:53:32 +09:00
René van Dorst bf9fa35338 Merge pull request #224 from logicog/fix_passwd 
Add URL decoding for password comparison.
 2026-05-15 20:04:15 +00:00
logicog 8ab2a6a9da Add URL decoding for password comparison. 2026-05-15 16:04:48 +02:00
UAb5eSMn 2316ffd493 Support for executing multiple commands via /cmd 2026-05-15 13:27:09 +02:00
orbisai0security a71eb57702 fix: V-010 security vulnerability 
Automated security fix generated by Orbis Security AI
 2026-05-15 02:46:09 +00:00
René van Dorst a2b2dbcfbf Merge pull request #221 from feelfree69/kp9000 
Adding Keeplink KP-9000-6XH-X2
 2026-05-15 02:08:42 +00:00
feelfree69 8cee16e96b add documentation for KP-9000-6XH-X2.md 2026-05-10 12:20:04 +02:00
feelfree69 a1135863bb add MACHINE_KP_9000_6XH_X2 2026-05-10 12:16:48 +02:00
dobodu ede4137101 Revise compiling section and add cautionary notes since #193 (#211) 
* Revise compiling section and add cautionary notes

Updated compiling instructions and added warnings about flashing procedures.

* Refactor caution messages in README.md

Updated caution messages to use new formatting for emphasis.

* Revise caution and reminder notes in README

Updated caution and reminder sections for clarity and consistency.

* Fix typos in README regarding firmware update

Corrected typo errors in the README.

* Add image for advanced settings

Add advanced_seetings.png

* Add advanced settings configuration details to README

Added advanced settings section with configuration instructions.

* Fix image source in README for advanced settings

Corrected the image source filename for advanced settings.

* Revise IP and port command descriptions in README

Updated command descriptions in README for clarity.

* Revise README.md for clarity and updated instructions

Updated sections in README.md for clarity and accuracy, including compiling requirements, installation instructions, and cautionary notes.

* Revise README for clarity and emphasis

Updated formatting and emphasized important notes in the README.

* Correct image file name and compilation output in README

Updated README to reflect changes in image file names and compilation output.
 2026-05-08 08:32:07 +02:00
logicog 0106f99ee0 Merge pull request #214 from feelfree69/flash_erase 
Erase flash before writing upload image
 2026-05-08 08:30:45 +02:00
logicog 733348059d Merge pull request #217 from mcaptur/main 
Hi-Source HI-k0801WS - deleted a line by mistake
 2026-05-08 08:27:12 +02:00
Mark Captur 950b763d69 Hi-Source HI-k0801WS - deleted a line by mistake 2026-05-08 07:38:43 +02:00
feelfree69 22aaa9fbfe Renamed and moved FLASH_PAGE_SIZE; added compile-time check 2026-05-08 07:13:41 +02:00
logicog 89e22f0893 Merge pull request #216 from mcaptur/main 
Add hardware profile and LED fix for Hi-Source HI-k0801WS
 2026-05-08 06:40:29 +02:00
Mark Captur 809efaa8d8 Hi-Source HI-k0801WS 2026-05-08 06:11:43 +02:00
Mark Captur 271878a62f Hi-Source HI-k0801WS 2026-05-08 06:09:17 +02:00
Mark Captur 299b54f2a3 Add pics for Hi-Source HI-k0801WS 2026-05-08 06:03:15 +02:00
Mark Captur f47fec7098 Add pics for Hi-Source HI-k0801WS 2026-05-08 06:02:21 +02:00
Mark Captur 04ce2cb8a1 Add doc for Hi-Source HI-k0801WS 2026-05-08 05:53:04 +02:00
Mark Captur 96eddf5a0c Add hardware profile and LED fix for Hi-Source HI-k0801WS 2026-05-07 16:06:00 +02:00
logicog 2cd6f5d782 Merge pull request #212 from feelfree69/make 
Makefile: Improve filenames of images
 2026-05-04 07:55:54 +02:00
feelfree69 c6dc5cc21c Don't delete *.bin files on 'make clean' - 'make distclean' does this 2026-05-04 07:11:44 +02:00
feelfree69 502033590e untracked files don't mark a build as -dirty 2026-05-04 06:55:11 +02:00
feelfree69 f81529bd07 Merge pull request #210 from logicog/fix_chrome_uploads 
Fix chrome uploads
 2026-05-03 16:53:48 +02:00
feelfree69 9714818b1f Erase flash before writing upload image 2026-05-03 15:55:36 +02:00
logicog 9c668969d4 Fix POST upload request handling for Chrome browser 
Chrome sends upload requests using POST with multipart/form-data
content type in multiple packets for the header part of the form-data.

Introduce a TSTATE_MULTIPART for the httpd server states that denotes
that so far only a part of the multipart header has been transmitted.
Once the full header has been transmitted, we change to TSTATE_POST
as for Firefox which sends all the multipart header in one piece.

The main further change required then is to make sure that the parsing
of the initial part of the multipart request is only parsed once and initially
to distinguish between configuration and firmware uploads.
 2026-05-03 08:16:55 +02:00
feelfree69 241bcb273f rename output of installer-Makefile to rtlplayground_oem_upgrade.bin 2026-05-02 21:45:39 +02:00
feelfree69 10367d0cdb Use a revision- and MACHINE-dependent output-filename 2026-05-02 21:44:44 +02:00
René van Dorst 09d90d6d97 Merge pull request #175 from logicog/ZX310S-4T2XH 
10GBit Ethernet Switch support (Horaco ZX310S-4T2XH)
 2026-05-02 17:22:52 +00:00
logicog 12c98ba6bd Merge pull request #148 from feelfree69/syslog 
Syslog: Duplicates console output to remote syslog server; Web-Interface: Send console commands to device
 2026-04-27 20:30:39 +02:00
feelfree69 3f66a18104 Merge branch 'main' into syslog 2026-04-24 12:01:30 +02:00
logicog 8abbececd1 Add device description for ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog d6dbf4e4dd Add photos of ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog e2b3201c9f Add machine name for ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog a7f4543698 Add support for (Horaco) ZX310S-4T2XH 
Add support for the ZX310S-4T2XH switch, which is a 4x2.5GBit + 1x10GBit + SFP
device. The device does not have any branding and is sold under different
brand names, in particular by Horaco. There is no branding on either label
nor PCB.

CPU: RTL8372
Flash: 2MByte Winbond W25Q16DV
10GBit PHY: RTL8261BE

UART header present, but solder holes are filled with solder that needs
removal, first, e.g with a 1.2mm drill.

The original firmware uses 57600baud 8N1
 2026-04-24 10:53:05 +02:00
logicog 2e0e55967c Do not send SFP info if no SFP port present 2026-04-24 10:53:05 +02:00
logicog 7877ce60f3 Add support for 5G link speeds, make 5G/10G LED blue 2026-04-24 10:53:05 +02:00
logicog a3dd25e0fe Add SDS parameter for RTL8261 setup 2026-04-24 10:53:05 +02:00
logicog 441340a4d4 Add SMI configuration support for dual 10G Ethernet 2026-04-24 10:53:05 +02:00
logicog 9a3f8c359d Enable 10g EEE on init 2026-04-24 10:53:05 +02:00
logicog 63ab6500c0 Add 10G/5G speed configuration/display 2026-04-24 10:53:05 +02:00
logicog ec5f74bbed Add is10g_port field in phy_settings 2026-04-24 10:53:05 +02:00
logicog a597d2d08b Fix EEE control register address and add 5G/10G EEE defines 
Register RTL8373_EEE_CTRL_BASE did not actually exist at 0x606c,
instead RTL837X_EEE_STATUS is actually not only a status, but also
a control register for EEE enable/disable at the MAC.

The defines are not actually register bits, but port EEE settings,
so move them to rtl837x_port.h while adding 5G/10G flags.
 2026-04-24 10:53:05 +02:00
logicog abc9cb7afd Add 5G speed display support and 5/10G EEE display/settings 2026-04-24 10:53:05 +02:00
logicog 6d579c4f00 Add speed bits for 5G/10G EEE 2026-04-24 10:53:05 +02:00
logicog c342964327 Add SDS init for RTL8261BE connection 2026-04-24 10:53:05 +02:00
logicog fd3a272255 Add RTL8261BE PHY configuration 
Add configuration of the RTL8261BE PHY on startup.
 2026-04-24 10:52:24 +02:00
logicog 4f4f69ecc1 Handle RTL8261BE SerDes configuration 
The RTL8261BE uses a 10GBit QSGMII connection. Add handler for initial
configuration of the SerDes speed and upon link changes.
 2026-04-24 10:52:24 +02:00
logicog c8e21b394b Add forgotten register RTL837X_REG_LED3_2_SET3 
The register had been forgotten in the LED configuration registers,
add the register definition and print out the content in leds_dump().
 2026-04-24 10:50:53 +02:00
logicog c34249b90a Add n_10g property in machine structure 
This uint8_t field corresponds to the n_sfp field and gives the number
of 10G ports for the machine. The values can be 0, 1, 2 for known machines,
all currently supported machines do not have any 10G ports, so no
need to change any entries in machine.c
 2026-04-24 10:50:53 +02:00
René van Dorst 042f4324a4 Merge pull request #166 from logicog/frame_header 
Cleanup Frame header structures and fix management VLAN
 2026-04-24 06:53:07 +00:00
logicog e280ccd2f9 Use RTL descriptor definition 2026-04-24 08:42:00 +02:00
logicog baa4e5e142 Use header structures of TX and RX, add dot1q for management VLAN TX 2026-04-22 22:36:26 +02:00
logicog b53e7e1a06 Add NOTHS macro 2026-04-22 22:36:26 +02:00
logicog 14b45735e2 Cleanup STP, use new frame descriptor definitions 2026-04-22 22:36:26 +02:00
logicog 946e80cebe Add frame descriptor structure 2026-04-22 22:36:26 +02:00
logicog e2df95ba90 Cleanup DHCP client code 2026-04-22 22:36:26 +02:00
logicog 570ee6c995 Move initialization routines to BANK2 2026-04-22 22:36:26 +02:00
feelfree69 e849af4a70 adapted syslog cmd_parsing to new method 2026-04-21 21:38:41 +02:00
feelfree69 812bf3bb67 Move code of rtl837x_pins.c to BANK2 due to BANK0 overflow 2026-04-21 21:37:25 +02:00
feelfree69 da8ec8fe88 Merge branch 'logicog:main' into syslog 2026-04-21 21:26:45 +02:00
logicog 01fa43510e Merge pull request #206 from vDorst/fix_cmd_parsing 
Fix cmd parsing
 2026-04-21 21:24:22 +02:00
René van Dorst d2e79d4d80 Fix: In commit 8cbafaa cmd_tokenize() has changed. Missed that it also used 
outside cmd_parser.c.
Fix the other location and headerfile.
 2026-04-21 21:17:22 +02:00
René van Dorst 016061d8db cmd: Fix 8324edc atoi_short() commit. 
vlan initialization was removed while trying out an other version.
But was not restored back.
 2026-04-21 21:16:03 +02:00
feelfree69 f7989cc737 Merge branch 'logicog:main' into syslog 2026-04-21 14:29:44 +02:00
logicog 5035366551 Merge pull request #204 from vDorst/remove___gptrxxx_calls 
Remove `__gptrput()` and `__gptrget()` calls
 2026-04-21 05:38:33 +02:00
logicog 2a8f183e6a Merge pull request #203 from vDorst/refactor_cmd_parsing 
Refactor cmd parsing
 2026-04-19 22:51:04 +02:00
René van Dorst 18225f5d22 uip: more fix. 2026-04-19 22:18:39 +02:00
René van Dorst 224471d676 uip: move second argument to __xdata free up 4 sram bytes. 2026-04-19 22:18:39 +02:00
René van Dorst 50d06c61bc change prototype uip_udp_new(), saves 1 sram. 2026-04-19 22:18:39 +02:00
René van Dorst d5709bcaf3 fix atoi 2026-04-19 22:18:39 +02:00
René van Dorst 52d943d5e4 rtlplayground: de-__gptrput()-call in read_reg_timer() 2026-04-19 22:18:39 +02:00
René van Dorst e79e90dd35 cmd_parser: de-__gptrput()-call in vlan_ingress_mode_parse() 2026-04-19 22:18:36 +02:00
René van Dorst da768171a5 change cmd_tokenize(). 
Remove the return argument because `err_status` is also reflecting the result.
Fix the error message when too many arguments are found.

refactor `execute_config()`, error out when err_status is not OK.
 2026-04-19 22:00:31 +02:00
René van Dorst 94bf4425ba uip: de-__gptrput()-call access to struct uip_udp_conn 2026-04-18 22:38:42 +02:00
René van Dorst 3e599f0e06 dhcp: de-__gptrput()-call in ip_opt() 2026-04-18 22:27:55 +02:00
René van Dorst 6c6d11ab33 dhcp: de-__gptrget()-call in dhcp_print_ip() 2026-04-18 22:20:46 +02:00
René van Dorst 791f68582d httpd: de-__gptrget()-call in string_to_html() 2026-04-18 22:20:46 +02:00
René van Dorst facc4afe40 uip: de-__gptrget()-call in timer_{set,reset,restart,exprired}() 2026-04-18 22:20:46 +02:00
René van Dorst 8134ca7ec7 uip: de-__gptrget()-call in uip_ipaddr_copy() 2026-04-18 22:20:46 +02:00
René van Dorst 642030c7b2 uip: de-__gptrget()-call in uip_add32() 2026-04-18 22:20:46 +02:00
René van Dorst 8324edc5f7 cmd_parser: Improve atoi_byte() and atoi_short(). 
Because no memory type is specified to the reference location, sdcc is
using a helper function to access the location. But sdcc is using a
register to tell the helper function which memory-type is used.
This registers must also be preseved until all access to that location is done.
 2026-04-18 22:19:35 +02:00
René van Dorst f2ff7d7737 parse_ee() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst a24b63a81f parse_mtu() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst abe3513bc6 parse_port() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 49c43082a3 parse_mirror() make use of cmd_words_len, refactor small parts 2026-04-18 19:35:51 +02:00
René van Dorst f71e869b97 parse_ingress() make use of cmd_words_len, refactor small parts 2026-04-18 19:35:51 +02:00
René van Dorst 1fe236246a parse_isolate() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 2acf2499d1 parse_lag_hash() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 56e0d0a5d1 parse_lag() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 7380aeb10d parse_bw() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 0d698dc572 parse_passwd() make use of cmd_words_len, change password memcpy. 2026-04-18 19:35:51 +02:00
René van Dorst c7fb354f08 parse_sds{get,set}() and parse_phy{get,set}() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 2cdab5f9d9 parse_reg{set,get}() make use cmd_words_len. 2026-04-18 19:35:51 +02:00
René van Dorst 301577efc8 parse_vlan() make use of cmd_words_len. 2026-04-18 19:35:51 +02:00
René van Dorst 1156f00f95 cmd_parser() make use of cmd_words_len 2026-04-18 19:35:51 +02:00
René van Dorst 8cbafaa347 Change cmd_tokenize() it only stores valid locations and use a length field. 2026-04-18 19:35:48 +02:00
René van Dorst 80ff1b25c9 Improve: cmd_compare(). 
Because `cmd` is guaranteed by the compiler to be NULL-terminated, we can make use of that to ensure the loop always ends.
So we don't need to know when the next words starts.
 2026-04-18 19:15:25 +02:00
René van Dorst 1a5208110c Merge pull request #195 from logicog/fix_config_reading 
Fix reading configuration over flash block boundaries
 2026-04-17 11:46:03 +02:00
logicog e2717ef7ca Count pages instead of bytes reading config in execute_config() 2026-04-17 11:37:15 +02:00
logicog 1769528420 Introduce global error variable, check during config execution 2026-04-16 22:01:51 +02:00
logicog 9d4c06d752 Merge pull request #200 from feelfree69/port_names 
Port names
 2026-04-14 18:51:43 +02:00
feelfree69 2565aeadf4 Do no show empty names in tooltips 2026-04-14 18:28:13 +02:00
logicog c3530aaafc Handle error when configuration file cmd too long 2026-04-14 18:00:29 +02:00
TylerDurden-23 6af19e1e6b Merge pull request #197 from logicog/isolation 
Port Isolation CLI command
 2026-04-14 08:02:16 +02:00
logicog 1683eef94b Fix bug where cmd_words[] is not properly initialized 2026-04-14 05:16:45 +02:00
logicog 036d9ca229 Add port isolation cmd 2026-04-13 20:13:28 +02:00
feelfree69 b31179acbe move extern declaration for port_names to trl837x_common.h 2026-04-13 19:14:24 +02:00
logicog b7ad67d336 Make port isolation API available 2026-04-13 18:15:01 +02:00
feelfree69 e130777b24 serial console cosmetic change 2026-04-13 14:55:50 +02:00
feelfree69 41f0dad49d Add ability to assign a name to a port 2026-04-13 14:55:10 +02:00
feelfree69 2e48415c95 fix after rebase: added udp_apps.c 2026-04-12 13:46:53 +02:00
feelfree69 22f8b9a287 rebase minor change in syslog cmd parsing 2026-04-12 13:08:05 +02:00
feelfree69 c91177d992 Web-If: Add Console-Cmd input 2026-04-12 13:02:42 +02:00
feelfree69 c1a414833d Various refactorings 2026-04-12 13:02:42 +02:00
feelfree69 2a9c7d2828 restart syslog when changing ip 2026-04-12 13:02:42 +02:00
feelfree69 d776118815 Revert unneeded changes 2026-04-12 13:02:42 +02:00
feelfree69 f7b8aed2f7 first working(?) version 2026-04-12 13:02:42 +02:00
feelfree69 7eb3676aaf remove log command 2026-04-12 13:02:42 +02:00
feelfree69 eaa21d5975 rebase First try to make use of uIP for sending syslog 2026-04-12 13:02:37 +02:00
feelfree69 193eacf51b rebase add syslog-addr to web-interface 2026-04-12 13:00:12 +02:00
feelfree69 b60811b984 initialize all vars; remove unused code 2026-04-12 12:58:02 +02:00
feelfree69 b85861347b Added setting for syslog IP 2026-04-12 12:58:02 +02:00
feelfree69 b21bfac917 rebase first prototype 2026-04-12 12:57:49 +02:00
logicog d4d12fe3b4 Merge pull request #192 from janh/cmd-sds-phy 
Add commands to read/write SerDes and PHY registers
 2026-04-10 15:37:01 +02:00
logicog 4440bcc43a Fix reading configuration over flash block boundaries 2026-04-09 22:34:32 +02:00
Jan Hoffmann f6a5163f33 Add commands to access PHY registers 2026-04-06 18:25:40 +02:00
Jan Hoffmann e210f31f0e Add commands to access SerDes registers 2026-04-06 18:25:35 +02:00
Jan Hoffmann 9eecdd071a Add atoi_byte function 
Similar to atoi_short, but reads into a uint8_t instead of a uint16_t.
 2026-04-06 18:25:30 +02:00
René van Dorst c4368c68be Merge pull request #189 from bstreiff/pcb23_v2_2 
Add support for keepLink KP-9000-9XHML-X (2M-PCB23-V2.2 version)
Rename machine keepLink KP-9000-9XHML-X (2M-PCB23-V3.1 version)
 2026-04-05 14:04:10 +00:00
ranma 1b02f303b2 Merge pull request #190 from ranma/fix-bit-linking 
Fix declaration of tx_buf_empty bit var

__sbit is for SFRs, for regular data __bit should be used. Otherwise the variables is not correctly declared in the BSEG section, leading to bit temporaries being allocated in the same location.

When this causes the tx_buf_empty to be overwritten to 0, then the next write_char will hang forever.

With this change the bit is properly declared in BSEG for the linker, which in my testing resolves the overlap issue:
```
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
        .area BSEG    (BIT)
_tx_buf_empty::
        .ds 1
```

Only the vlan and mtu commands call atoi_short, which has a local bit _atoi_short_sloc0_1_0 which is the first bit in the BSEG, and assigning to that one corrupted the tx_buf_empty bit.
Though this is also a compiler optimization-failure, the _atoi_short_sloc0_1_0 value isn't even used after assignment, AFAICS it is a dead store.

Its from the isnumber inline:
```
[...]
;--------------------------------------------------------
; bit data
;--------------------------------------------------------
        .area BSEG    (BIT)
_atoi_short_sloc0_1_0:
        .ds 1
_parse_ip_sloc0_1_0:
        .ds 1
[...]
;       cmd_parser.c:85: l -= '0';
        mov     r3,a  
        add     a,#0xd0
;       cmd_parser.c:86: return (l <= ('9'-'0'));
        add     a,#0xff - 0x09
        cpl     c
;       cmd_parser.c:172: while (isnumber(cmd_buffer[idx])) {
        mov     _atoi_short_sloc0_1_0,c
        jnc     00103$
[...]
```
 2026-04-05 11:05:10 +02:00
Tobias Diedrich fd9a7717ce Fix declaration of tx_buf_empty bit var 
__sbit is for SFRs, for regular data __bit should be used.
Otherwise the variables is not correctly declared in the BSEG
section, leading to bit temporaries being allocated in the same
location.

When this causes the tx_buf_empty to be overwritten to 0, then
the next write_char will hang forever.
 2026-04-04 22:02:45 +02:00
Brenda Streiff 29ce05b70e Add keepLink KP-9000-9XHML-X V2.2 version 
This splits the current MACHINE_KP_9000_9XHML_X definition into "V2_2"
and "V3_1" versions for the two known versions of this hardware.

Confirmed to work:
- LED configuration matches stock firmware
- Port ordering matches label
- A SFP can be detected and EEPROM read (I don't have a fiber cable to test link)
- Reset button presses are detected
 2026-04-04 11:40:03 -05:00
Brenda Streiff 97ae6bf1d3 Document the '2M-PCB23-V2.2' PCB 
Sold as "keepLINK KP-9000-9XHML-X". This is different from the other, "V3.1"
version of the "keepLINK KP-9000-9XHML-X".
 2026-04-04 11:40:03 -05:00
TylerDurden-23 4ccb988d70 Merge pull request #188 from UAb5eSMn/machine_check 
Check if machine.c can be compiled for all machines
 2026-03-31 19:36:57 +02:00
UAb5eSMn 075d7e43f7 Check if machine.c can be compiled for all machines 2026-03-30 22:28:36 +02:00
René van Dorst 97e73d95aa Merge pull request #183 from janh/fix-i2c-and-sfp-ddm 
Fix I2C access and SFP diagnostic monitoring in web interface
 2026-03-30 17:21:51 +00:00
René van Dorst 2eb6bac4a5 Merge pull request #186 from UAb5eSMn/machine_fix 
Fix compilation issue for machine HG0402XG_V1_1
 2026-03-29 18:16:17 +00:00
UAb5eSMn 7d4ccf8f23 Remove machine HORACO_ZX_SG4T2 from comment 2026-03-29 20:10:56 +02:00
UAb5eSMn c0f6b8a1a6 Fix compilation error for machine HG0402XG_V1_1 2026-03-29 20:10:56 +02:00
TylerDurden-23 f3b6c16161 Merge pull request #185 from vDorst/fix_swgt024_v2_0 
Fix swgt024 v2.0
 2026-03-29 18:29:18 +02:00
René van Dorst 73f92f2e12 Add SWGT024_V2_0 Unmanaged pinout and machine type. 2026-03-29 16:35:31 +02:00
René van Dorst bfab8cbba3 Rename MACHINE_SWGT024_V2_0 to MACHINE_SWGT024_V2_0_MANAGED. 
So we can support other versions too.
 2026-03-29 16:13:38 +02:00
René van Dorst eedb0dec01 SWGT024 v2.0: Fix LED and RESET defines for managed version 
Original firmware used for RJ45:
* Amber leds only for 2.5GBit link/act.
* Green leds only for other speeds.
 2026-03-29 16:13:36 +02:00
logicog 08ad843c56 Merge pull request #184 from vDorst/rename_led_28 
Rename LED_28 to LED_28_SYS.
 2026-03-29 07:50:27 +02:00
Jan Hoffmann 05693f5171 Also show SFP TX/RX power in dBm 2026-03-29 00:33:48 +01:00
Jan Hoffmann 6eaa1985aa Fix SFP diagnostic monitoring data in web interface 
If the module is not internally calibrated, it is necessary to apply
calibration values to get meaningful results.
 2026-03-29 00:33:48 +01:00
Jan Hoffmann 45ba32f65d Fix scaling for power values in SFP diagnostics 2026-03-29 00:33:48 +01:00
Jan Hoffmann 0b4f59483b Don't write SFP options value twice in status JSON 2026-03-29 00:33:48 +01:00
René van Dorst 385c850d2f add comments 2026-03-28 21:40:43 +01:00
René van Dorst cdbc48f2c2 Rename LED_28 to LED_28_SYS. 
So it clear that led 28 is the SYSTEM LED.
 2026-03-28 19:29:49 +01:00
Jan Hoffmann efe0c282ba Fix I2C access code 
While the current implementation works for what it is actually used, it
is broken when trying to do larger transfers.

The length field in the control register has a size of 4 bits. In every
transfer, length+1 bytes are read. Thus, each transfer is limited to a
maximum of 16 bytes. Add a check for the length, and write the correct
value to the register.

Also update the loop in "sfp_send_data" to properly increment the output
register. Remove the unused special case for a length of 128 bytes.
 2026-03-28 18:14:15 +01:00
René van Dorst 54fced05b0 Merge pull request #178 from bennydiamond/Support_ZX_SWTGW215AS 
Add support for PCB-SWTG115AS-V2.0
 2026-03-28 13:16:07 +00:00
bennydiamond b64dfd8c25 Correction on IO mappings 
Add further clarification on mapping assumptions
 2026-03-27 20:56:09 -04:00
bennydiamond 5f1cd4cce0 Update documentation 2026-03-27 19:34:39 -04:00
bennydiamond 7ffd0c25c2 Support for PCB-SWTG115AS-V2.0 
Marketed as Lianguo ZX-SWTGW215AS
 2026-03-27 19:34:39 -04:00
René van Dorst 8b4e09ad69 Merge pull request #181 from janh/improve-1g-sfp-compat 
Improve compatibility with 1G SFP modules
 2026-03-27 22:58:30 +00:00
René van Dorst 34d53dddf2 Merge pull request #179 from bennydiamond/Early_boot_wipe_config 
Wipe config if button held at boot
 2026-03-27 20:05:55 +00:00
René van Dorst ec5f655bba Merge pull request #180 from janh/k0501w-rename-version 
Rename K0501W to include PCB version
 2026-03-27 19:52:29 +00:00
René van Dorst 7291f38e46 Merge pull request #182 from janh/commands-newline 
Make sure that the output of all commands ends with a newline
 2026-03-27 19:05:29 +00:00
Jan Hoffmann c3b99fdcdf Make sure that the output of all commands ends with a newline 2026-03-27 19:36:14 +01:00
Jan Hoffmann 9f800bae01 Improve compatibility with 1G SFP modules 
Some modules report a nominal signaling rate of 1200 MBd.
 2026-03-27 17:56:40 +01:00
logicog df498b0879 Merge pull request #173 from diijkstra/vlan_console 
Console: Add Ingress type & VLAN show table
 2026-03-26 21:02:33 +01:00
Jan Hoffmann 03422463e4 Rename K0501W to include PCB version 
It seems very likely that other versions are not compatible, so make it
clear by including it in the machine type and name. Also update the
documentation.
 2026-03-26 19:59:06 +01:00
bennydiamond 2bfbe5358b LED pattern definition on early boot reset 
LED Double blink while button is held

FAST blink for 3 seconds when config is reset
 2026-03-26 12:31:20 -04:00
TylerDurden-23 3bb89bfb80 Merge pull request #177 from janh/k0501w 
Add support for K0501W boards
 2026-03-26 10:12:32 +01:00
bennydiamond dba3679e2f Wipe config if button held at boot 
Blocking by design to prevent loading config

Button must be held between 10 and 30 seconds to trigger reset.

If held more than 30 seconds, boot normally. This is to prevent lock-up in case of weird hardware variants.
 2026-03-25 23:15:04 -04:00
Jan Hoffmann f331a6129a Add support for K0501W boards 
This board appears for example in the Davuaz Da-K6501W switch, and is
designed similarly to Hi-K0402WS.

However, it only has one SFP port and another 2.5G copper port using
RTL8221B 2.5G PHY instead. Also, some components on the board, like
additional LEDs, mode switch, and second flash chip are not populated.

Like earlier revisions of the K0402W(S) board, there is no UART, so
debugging is limited.

As this is an unmanaged switch, installation needs a flash programmer.
 2026-03-25 19:31:14 +01:00
logicog 877e5a68fb Merge pull request #176 from janh/improve-2500m-sfp-compat 
Improve compatibility with 2.5G SFP modules
 2026-03-24 18:13:27 +01:00
Jan Hoffmann ed6c95e522 Improve compatibility with 2.5G SFP modules 
Some modules might report a nominal bitrate of 2500 Mbd or 3200 Mbd
instead of 3100 Mbd. Accept the entire range to make them work.
 2026-03-24 15:26:29 +01:00
diijkstra cb8d0e45bb Review: Move w initialization 2026-03-23 19:31:06 +01:00
TylerDurden-23 877b16e837 Merge pull request #174 from logicog/fix_vlan_display 
Fix display of VLANs for ports
 2026-03-22 18:20:33 +01:00
logicog fce64ac368 Fix display of VLANs for ports 2026-03-22 13:45:42 +01:00
logicog dd9e5c8ff8 Merge pull request #172 from diijkstra/trendnet 
Document firmware upload via CLI
 2026-03-22 05:26:45 +01:00
diijkstra f7fcf0eda7 Console: Add Ingress type & VLAN show table 
Added new `vlan show` command to dump current VLAN settings.
Supports printing PVID & ingress filtering per port.

Added new `ingress [p]<mode>` command to setup ingress filtering.
Added wrappers for enabling/disabling vlan filtering. Currently
not configurable, but state in console is read via ASIC registers.

Full VLAN dump & web support of new commands will be added later.
 2026-03-21 12:29:26 +01:00
diijkstra 905cf38f1f Trendnet: Another mapping fix 
Physical to logical mapping was reverted for SFP ports.
 2026-03-21 12:22:36 +01:00
diijkstra b0370f7bb3 Doc: Describe how to upload firmware via CLI & HTTP 
Rough explanation how to upload a new firmware. Probably, we should
support basic auth on upload for easier use, but lets document
what we have.
 2026-03-21 12:22:36 +01:00
logicog d21d269d49 Merge pull request #152 from mmmspatz/mspatz/fix_vlan_page 
Fix "Get Configuration" on vlan.html
 2026-03-19 11:36:59 +01:00
feelfree69 cb81f82cf6 Merge pull request #170 from logicog/fix_bank0 
Fix missing assignment of bank when html_data.c code is generated
 2026-03-19 11:23:07 +01:00
logicog 59e7a21955 Merge pull request #159 from diijkstra/web_sfp_state 
Web: Add SFP state/pin status
 2026-03-19 05:22:24 +01:00
logicog c530ec4ae3 Fix missing assignment of bank when html_data.c code is generated 2026-03-18 08:34:26 +01:00
TylerDurden-23 8e2b48ef25 Merge pull request #167 from logicog/browsser_trouble 
Fix browser issues with Chrome and latest Firefox
 2026-03-17 10:29:02 +01:00
logicog 65f094c1d1 Merge pull request #163 from feelfree69/parser_fix 
fix crash
 2026-03-16 17:51:24 +01:00
logicog 090283d538 Add retry mechanism for xhttp requests to make Chrome happy 2026-03-16 17:32:50 +01:00
logicog 7e3a0f5d8f Allow javascript to modify svg styles for Firefox version >140 2026-03-16 17:32:15 +01:00
feelfree69 4706f6232a simplify parsing code 2026-03-15 15:43:34 +01:00
diijkstra b47a868db3 Web: Handle missing LOS pin 
When device has no LOS pin and module has no extended status, the
RX LOS value will not be shown. When both are present, the equality
check is performed. When only one is present, the present value
will be shown.

json from the switch, will still contain the field, but can be
null for when pin is not available.
 2026-03-15 12:18:02 +01:00
feelfree69 454eb28bce Merge branch 'logicog:main' into parser_fix 2026-03-15 08:58:15 +01:00
logicog dc283bc724 Merge pull request #165 from feelfree69/bank0_overflow 
Fail building image on BANK0 overflow
 2026-03-15 07:39:38 +01:00
feelfree69 a001cd3da7 Fail also on BANK0 overflow 2026-03-14 22:15:33 +01:00
feelfree69 e92b4a2358 Don't allow partial commands 2026-03-14 19:47:56 +01:00
René van Dorst 47c5443f0e Merge pull request #164 from TylerDurden-23/fix-1gbaset-sfp 
Fix 1GBase-T SFP module not working on serdes port 1.
 2026-03-14 17:03:05 +00:00
chriz baa3e7edb7 Fix 1GBase-T SFP module not working on serdes port 1. 2026-03-14 16:33:54 +01:00
feelfree69 34d46aa29a fix crash 2026-03-14 13:59:14 +01:00
diijkstra 6b64534f40 WEB: Display single RX LOS 
As sugested, lets display single value, and raise alarm when pin
is different than module.
 2026-03-14 13:15:01 +01:00
logicog b18ed62042 Merge pull request #161 from diijkstra/backspace 
Console: Handle ^H as backspace
 2026-03-14 13:14:39 +01:00
diijkstra 16edc6b421 Console: Handle ^H as backspace 
Currently only ASCII DEL (key code 127) is handled as backspace, but some terminal
emulators are sending ^H which is ASCII BS (key code 8). Looks like we can
safely treat both in the same matter.
 2026-03-14 12:35:16 +01:00
logicog f1e5b7e31a Merge pull request #92 from vDorst/doc_gpio 
doc: gpio overview and mux settings
 2026-03-14 12:17:06 +01:00
diijkstra 1f6e07a1af Web: Add SFP state/pin status 
The state of the SFP module is being already send in status.json,
but was not parsed via Web UI. When debuging SFP LOS/Signal detection
it is usefull to see what module is reporting back.

Extended the SFP mouse-over information with:
 - RX LOS as reported in 0x02 bit of register 238
 - External TX Disabled from 0x80 bit of register 238
 - TX fault from 0x04 of the same register
 - The last state of RX LOS pin (available also when there is no 0x40
   option on the module)

This should help identify missing/incorrect setup of TX disabled pin.
 2026-03-13 23:56:43 +01:00
logicog 0952676504 Merge pull request #158 from diijkstra/trendnet 
TEG-S562: Port LEDs
 2026-03-13 23:46:22 +01:00
diijkstra 95cbc1a2e0 TEG-S562: Correctly assign SFP 
Looks like the SFP numbers are reversed, since GPIOs were mapped
to SFP numbers, the need to be reversed too. This fixes swapped
display of SFP stats on the webpage.
 2026-03-13 23:36:29 +01:00
diijkstra d5fdaf28e8 Light description for led-set 
Very light description for port_led_set and led_sets, which was
helpfull when bringing up the trendnet device.
 2026-03-13 21:43:22 +01:00
diijkstra 511d35f63d TEG-S562: Port LEDs 
Added support for all leds on the device.

Stock port sets are slightly differently configured, where additional
LED0 on SET_0 and LED1&LED2 where configured for link/collisions/duplex.
This has not been reproduced as those lines are probably not connected
anywhere.
 2026-03-13 21:40:34 +01:00
logicog 96484bc62a Merge pull request #156 from feelfree69/make-cleanup 
Cleanup Makefile
 2026-03-11 20:54:47 +01:00
feelfree69 765000ce4f fixed html dependencies 2026-03-11 19:08:32 +01:00
feelfree69 dc9b211924 BUILDDIR without slash 2026-03-11 19:01:21 +01:00
feelfree69 b559c3b868 avoid doubled generation of html_data.* 2026-03-11 07:34:18 +01:00
feelfree69 13fe354da7 add dependency file generation 2026-03-11 07:26:15 +01:00
feelfree69 fc4b12725c Cleanup Makefile 2026-03-10 21:57:16 +01:00
logicog 0a52386e60 Merge pull request #155 from feelfree69/fix-bank-overflow 
fix bank overflow
 2026-03-10 21:47:46 +01:00
feelfree69 4b167151a5 fix bank overflow 2026-03-10 21:35:25 +01:00
René van Dorst f474b5822b Merge pull request #151 from logicog/concurrency 
Web request concurrency management
 2026-03-10 18:49:18 +00:00
logicog fa37940075 Control xhttp concurrency 2026-03-10 06:16:18 +01:00
René van Dorst c2f5a91763 Merge pull request #150 from logicog/bandwidth_web 
Bandwidth web
 2026-03-09 19:54:31 +00:00
logicog ed8dc0f43c Fix bug in atoi_hex when uneven number of digits parsed 
We fix a bug in atoi_hex when parsing an unneven number of digits
by rotating the entire number 4 bits right as would have been
done if the number had been preceded by a 0 to make the number
of digits even.
 2026-03-09 06:48:24 +01:00
Mark H. Spatz 893dcd8fcf update vlan.md 2026-03-08 19:49:37 -04:00
Mark H. Spatz 16f4e2a1c6 Fix range check in vlan_get() 2026-03-08 17:52:39 -04:00
Mark H. Spatz 364d538abd Fix "VLAN ID" field max value on vlan.html 2026-03-08 17:50:54 -04:00
logicog 7949975191 Add backend support for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 1374272db6 Add simulation support for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 20fb626cc1 Make bandwidth control page accessible 2026-03-08 20:55:50 +01:00
logicog 31a488e4e9 Add web page for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 14bc823024 Add reg_bit_test function 2026-03-08 20:55:50 +01:00
René van Dorst 87c161dc70 Merge pull request #147 from logicog/bandwidth 
Bandwidth control
 2026-03-08 19:46:51 +00:00
logicog 04ab083652 Add documentation for bandwidth control 2026-03-08 19:04:48 +01:00
logicog 1836c7dcb6 Add Bandwidth control for ingress/egreess at port 2026-03-08 19:04:48 +01:00
Mark H. Spatz 4cef63200f Fix "Get Configuration" on vlan.html 
I noticed that entering some vlan config, clicking "Update/Create", then
clicking "Get Configuration" resulted in Tagged/Untagged/PVID displaying
completely wrong data. It looks like the parisng in fetchVLAN() in
vlan.js was just completely disconnected from the layout of the
registers read by vlan_get() in rtl837x_port.c. Who knows how that
happened.

1. Fix fetchVLAN() member/untag parsing: the old code read bits [9:0]
   as untagged and bits [10:19] as tagged, but the VLAN table register
   layout is members in [9:0] and untag in [19:10]. Now correctly
   derives tagged (member && !untag) and untagged (member && untag).

2. Add PVID to vlan.json response: PVID is stored per-port in separate
   PVID registers (RTL837x_PVID_BASE_REG), not in the VLAN table entry.
   The old code nonsensically tried to read it from bits [20:29] of the
   VLAN table. Add port_pvid_get() and build a pvid bitmask in
   send_vlan() so the JS can parse it correctly.

3. Remove auto-PVID logic from setC(): setC() is called by fetchVLAN()
   while it's loading existing config, and so this logic mangled the
   display of the existing config. Also, it doesn't make sense to
   auto-set the PVID for tagged members (PVID relates to untagged
   ingress.)
 2026-03-07 15:18:06 -05:00
René van Dorst e33cd9d0c5 Merge pull request #143 from feelfree69/flashsize_web 
Show flash_size to web interface and console
 2026-03-06 18:22:48 +00:00
feelfree69 71880a95f5 optimization as suggested by review comment 2026-03-06 08:55:59 +01:00
feelfree69 494320b191 Resolve review comments 2026-03-05 08:55:51 +01:00
logicog eb13d4ab04 Add iniital implementation of bandwidth control 2026-03-05 07:43:11 +01:00
René van Dorst a15500c493 Merge pull request #146 from ranma/printopt 
Optimize printing functions
 2026-03-02 20:59:26 +00:00
logicog a89467febc Merge pull request #144 from ranma/xpage 
Add DW8051 MPAGE SFR
 2026-03-01 18:55:43 +01:00
logicog 706abcf78d Merge pull request #145 from ranma/libc-main-vectors 
Rename bootloader to main
 2026-03-01 17:53:56 +01:00
Tobias Diedrich c868482669 Rename bootloader to main 
The presence of the main function is a hardcoded trigger in sdcc that causes
the interrupt vectors and atomic rollback helpers to be generated as part of
compilation of the file containing the main function.

This makes sure the runtime library is correctly initialized and reduces
crtstart.asm to contain only the banked call helpers.

To ensure that the __interrupt_vect in area HOME is located at the beginning
of the firmware, the linker flags are updated to set the HOME start to
0x00000 and the linker object order is modified to have rtlplayground.rel
first.

Generated code in rtlplayground.asm:
```
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
	.area HOME    (CODE)
__interrupt_vect:
	ljmp	__sdcc_gsinit_startup
	ljmp	_isr_ext0
	.ds	5
	ljmp	_isr_timer0
	.ds	5
	ljmp	_isr_ext1
	.ds	5
	reti
	.ds	7
	ljmp	_isr_serial
	.ds	5
	ljmp	_isr_timer2
	.ds	5
	reti
	.ds	7
	reti
	.ds	7
	ljmp	_isr_ext2
	.ds	5
	ljmp	_isr_ext3
; restartable atomic support routines
	.ds	2
sdcc_atomic_exchange_rollback_start::
	nop
	nop
sdcc_atomic_exchange_pdata_impl:
	movx	a, @r0
	mov	r3, a
	mov	a, r2
	movx	@r0, a
	sjmp	sdcc_atomic_exchange_exit
	nop
	nop
sdcc_atomic_exchange_xdata_impl:
	movx	a, @dptr
	mov	r3, a
	mov	a, r2
	movx	@dptr, a
	sjmp	sdcc_atomic_exchange_exit
sdcc_atomic_compare_exchange_idata_impl:
	mov	a, @r0
	cjne	a, ar2, .+#5
	mov	a, r3
	mov	@r0, a
	ret
	nop
sdcc_atomic_compare_exchange_pdata_impl:
	movx	a, @r0
	cjne	a, ar2, .+#5
	mov	a, r3
	movx	@r0, a
	ret
	nop
sdcc_atomic_compare_exchange_xdata_impl:
	movx	a, @dptr
	cjne	a, ar2, .+#5
	mov	a, r3
	movx	@dptr, a
	ret
sdcc_atomic_exchange_rollback_end::

sdcc_atomic_exchange_gptr_impl::
	jnb	b.6, sdcc_atomic_exchange_xdata_impl
	mov	r0, dpl
	jb	b.5, sdcc_atomic_exchange_pdata_impl
sdcc_atomic_exchange_idata_impl:
	mov	a, r2
	xch	a, @r0
	mov	dpl, a
	ret
sdcc_atomic_exchange_exit:
	mov	dpl, r3
	ret
sdcc_atomic_compare_exchange_gptr_impl::
	jnb	b.6, sdcc_atomic_compare_exchange_xdata_impl
	mov	r0, dpl
	jb	b.5, sdcc_atomic_compare_exchange_pdata_impl
	sjmp	sdcc_atomic_compare_exchange_idata_impl
```
 2026-03-01 17:35:13 +01:00
Tobias Diedrich 9bd2d446d7 Optimize printing functions 
This saves 508 bytes in the HOME area by:
- Getting rid of the expensive hex array indexing
- Having print_short and print_long delegate to print_byte

This is at the expense of increasing the stack depth a tiny bit.
Stack usage isn't an issue so far since I see ~96 bytes of
untouched stack memory.
 2026-03-01 12:45:31 +01:00
Tobias Diedrich c3a6a46852 Add DW8051 MPAGE SFR 
This adds the MPAGE (sdcc _XPAGE) SFR, which is used by sdcc in `--xstack`
mode to provide the upper byte of the address for `MOVX A, @Ri` and
`MOVX @Ri, A` instructions.

Classic 8051 uses the P2 SFR value for this, but the RTL IP block does not
seem to be using the "Port 2 module".

From the databook:
```
To replace the function of the Port 2 latch in designs that do not use a
Port 2 module, the DW8051 provides an additional special function register,
MPAGE, at SFR address 92h. During MOVX A, @Ri and MOVX @Ri, A instructions,
the DW8051 places the contents of the MPAGE register on the upper 8 address
bits (mem_addr[15:8]). This provides the paging function that is normally
provided by the Port 2 latch. The MPAGE register has no function when a
Port 2 module is used to connect external RAM.
```
 2026-03-01 09:32:13 +01:00
feelfree69 7a0f248424 Add flash_size to web interface 2026-02-28 19:56:18 +01:00
logicog 23e2f5a99e Merge pull request #140 from feelfree69/flashsize 
Check for sufficient flashsize before applying an update
 2026-02-28 11:48:38 +01:00
René van Dorst 81a7393a81 Merge pull request #141 from logicog/SWTG018AS_A_V_2_0 
Add support for the SWTG018AS-A V2.0 8+1 unmanged switch
 2026-02-27 19:30:25 +00:00
logicog dc16b25d62 Add support for the SWTG018AS-A V2.0 8+1 unmanged switch 
The SWTG018AS-A V2.0 is an 8x2.5GBit/s port + 1 SFP+ port unmanged device
It is sold in an unbranded casing e.g. by Ampcom.
Hardware:
SoC: RTL8373N
Additional PHY: RTL8224
Flash: Puya P25D40SH (4MBit, slimmer, not standard SOP-8 package!)
LEDs: 1 Green + 1 Orange per Ethernet port (green designates 2.5GBit)
      1 Green LED for the SFP+ port

The photos already show a modified PCB: Unpopulated resistors R52 and R53
have been bridged in order to enable the serial console. The smaller flash
memory chip at U2 has been replaced with a Windbond 128MBit standard-sized
SOIC-8 chip in order to easily use SOIC clamps to flash the device. Also
the serial header has been populated.
 2026-02-27 20:11:53 +01:00
feelfree69 ffbd2c512d Check for sifficient flashsize before applying an update 2026-02-25 18:51:00 +01:00
René van Dorst ba18fa19b0 Merge pull request #138 from logicog/kp_9000_x6hml_x2 
Add device photos of KeepLink KP-9000-6XHML-X2
 2026-02-25 17:45:53 +00:00
logicog 70127018da Add device photos of KeepLink KP-9000-6XHML-X2 2026-02-25 18:07:54 +01:00
feelfree69 e26a9e3db9 Merge pull request #93 from logicog/cmdbuf 
Add support for command line editing
 2026-02-25 15:55:41 +01:00
René van Dorst d29d7dcf98 Merge pull request #139 from logicog/fix_6xhml_reset 
Fix reset button GPIO-Number for MACHINE_KP_9000_6XHML_X2
 2026-02-25 08:28:28 +01:00
logicog 734cce381a Fix reset button GPIO-Number for MACHINE_KP_9000_6XHML_X2 2026-02-25 06:28:49 +01:00
logicog dfc96761b3 Add support for history editing 2026-02-24 19:57:22 +01:00
logicog 94d4ace88b Add support for command line editing 
The current code for entering commands via the serial CLI is completely
refactored and moved out of rtlplayground.c into a separate file cmd_edit.c
putting code into BANK2.
The serial ring buffer sbuf[] is now exclusively used for receiving
keys, including escape sequences (DEL will generate a 4-byte escape
sequence). The command is now held in cmd_buffer. This reduces
XMEM use, because the serial buffer can be much smaller.

Supported is only editing the current command line via backspace, del,
cursor left and right.

Because the code cannot distinguish escape sequences which are not yet
complete (because the serial isr has not yet put all characters into
the serial buffer) from the dozens of unsupported ones (F-keys/home,
Page up/down, cursor up/down...) they are ignored and remain in the
serial buffer until the ring-pointer overwrites them. This is standard
behaviour for consoles, which will print out garbage for unsupported
characters. In this implementation, the command line buffer and the
visible command line in the terminal are always synced, so garbage
can be removed again by ediing the line.

The code makes several redundant checks in order to prevent race-conditions
between the serial ISR and the comand-editing code.
 2026-02-24 19:57:22 +01:00
logicog 284b2b003d Merge pull request #127 from feelfree69/resetbutton 
Add button handling with the possibility to revert to default settings
 2026-02-23 21:01:14 +01:00
logicog 68a8a9ee92 Merge pull request #128 from vDorst/doc_mods_fix 
docs: mods: Fix MiB numbers.
 2026-02-23 07:46:54 +01:00
logicog 0045a74df0 Merge pull request #102 from TylerDurden-23/opt-system-settings 
Add startup config editor to system settings menu
 2026-02-16 20:53:52 +01:00
feelfree69 0bdb238c0a Check fir button presses once a second 2026-02-15 16:42:18 +01:00
René van Dorst 033616ef63 Merge pull request #130 from MaDill/patch-1 
Update README.md how to compile
 2026-02-15 15:38:45 +00:00
René van Dorst a57aeda053 Merge pull request #132 from feelfree69/default_machine 
fix `make MACHINE=DEFAULT_8C_1SFP`
 2026-02-15 15:22:12 +00:00
feelfree69 556899d346 fix make MACHINE=DEFAULT_8C_1SFP 2026-02-15 14:05:49 +01:00
MaDill cc734ecac2 Update README.md 
changed as requested
 2026-02-15 14:02:37 +01:00
feelfree69 e5d23f11de Demagic FLASH_BUF_SIZE 2026-02-15 13:28:31 +01:00
feelfree69 3c648d5936 Fix messed up merge commit; add button user feedback via sysled 2026-02-15 13:01:22 +01:00
feelfree69 4658667459 fix compiler warning 2026-02-15 13:00:02 +01:00
feelfree69 e966b153af Merge branch 'main' into resetbutton 2026-02-15 12:34:46 +01:00
feelfree69 5ecd0e6a32 revert changing machine.h 2026-02-15 12:15:06 +01:00
René van Dorst d8b52d50de Merge pull request #131 from vDorst/fix_github_action 
Fix GitHub actions build and select machine-type via variable.
 2026-02-15 11:08:18 +00:00
René van Dorst 1f6f7fbcd4 Fix GITHUB action build. 
PR #119 made that no machine-type is selected, so the build will fail.
commit 2f787fee enables us select a machine via a variable, use this to
select a machine-type `KP_9000_6XHML_X2` to build.
 2026-02-15 11:25:47 +01:00
René van Dorst c7ea28393a machine: Fix missing MACHINE_KP_9000_9XHML_X, fixes #120 2026-02-15 11:24:40 +01:00
René van Dorst 2f787feebf Makefile: Select MACHINE via a variable 2026-02-15 11:12:26 +01:00
René van Dorst 4c1266dca9 Merge pull request #119 from feelfree69/swtgw218as 
Add MACHINE_SWTGW218AS Managed Switch.
Deselect all MACHINE type so the use always have to select a machine type.
 2026-02-15 09:21:33 +00:00
MaDill 4d11d70356 Update README.md how to compile 
Updte the "compiling" chapter
 2026-02-15 09:13:53 +01:00
René van Dorst ff94e383aa docs: mods: Fix MiB numbers. 2026-02-14 19:35:18 +01:00
feelfree69 9f7e10fe7c Merge branch 'main' into swtgw218as 2026-02-14 19:22:17 +01:00
René van Dorst b67e3eb602 Merge pull request #122 from logicog/fix_6xhml_x2_new 
Fix MACHINE_KP_9000_6XHML_X2: swap SFP-ports remove unnecessary LED-MUX
 2026-02-14 17:44:31 +00:00
chriz 5d731393f1 Delay reset, to allow TCP reset to be transmitted. 2026-02-14 11:17:42 +01:00
chriz 0e2a5fb7bc Reload startup config after save. 2026-02-14 11:02:05 +01:00
feelfree69 79c9d0deab Add button handling with the possibility to revert to default settings 2026-02-14 10:55:35 +01:00
logicog 73c56ecfe5 Merge pull request #126 from TylerDurden-23/add-kp-pics 
Add photos keeplink KP-9000-6XH-X2 unmanaged
 2026-02-14 06:01:26 +01:00
chriz 5e9f3324d5 Add photos keeplink KP-9000-6XH-X2 unmanaged. 2026-02-13 19:01:53 +01:00
René van Dorst 94739644b7 Merge pull request #124 from TylerDurden-23/hs-add-fix 
Fix SFP numbering for HI-K0402WS
 2026-02-13 16:04:54 +01:00
chriz 257d8aac4f Fix SFP numbering. 2026-02-13 14:54:35 +01:00
chriz d5019b41df Add warning for advanced safe. 2026-02-13 10:32:23 +01:00
chriz eae7f10d7a Make Advanced configuration tabbed. 2026-02-13 08:43:48 +01:00
logicog 1b43addb11 Fix MACHINE_KP_9000_6XHML_X2: swap SFP-ports remove unnecessary LED-MUX 
The left and right SFP ports were swapped in the machine structure. They
are now correctly identified a comment is added. The custo LED-mux
is removed again, as this was accidentally added for demonstration
purposes. It is not necessary, as the device uses the default.
 2026-02-13 07:53:29 +01:00
feelfree69 f8c1ab4198 Add .md and photos 2026-02-12 21:56:37 +01:00
feelfree69 11a5feb49d Add GPIO for reset button 2026-02-12 19:55:04 +01:00
feelfree69 1e7e1f42cc respect max length of machine_name 2026-02-12 19:30:50 +01:00
chriz ea37126e87 New apporach: Make startup config independent. 2026-02-12 14:17:22 +01:00
TylerDurden-23 670e0f02ec Merge branch 'logicog:main' into opt-system-settings 2026-02-11 23:02:20 +01:00
feelfree69 b4e7865bb7 Merge branch 'main' into swtgw218as 2026-02-11 23:00:07 +01:00
René van Dorst 15b0bf9664 Merge pull request #97 from TylerDurden-23/hs-add-clean 
Add support for HiSource K0402WS-V3.0.
 2026-02-11 21:37:11 +00:00
TylerDurden-23 8bd07ee649 Correct device name from Hi-KO4022WS to Hi-K0402WS 2026-02-11 22:34:55 +01:00
TylerDurden-23 3e1031b0f0 Highlight efficiency with 5V power supply 
Emphasize the efficiency improvement with 5V power supply.
 2026-02-11 22:33:59 +01:00
TylerDurden-23 9918a6267c Update documentation for Hi-KO4022WS switch 
Added information about UART baud rate and installation method.
 2026-02-11 22:33:02 +01:00
TylerDurden-23 bea162962e Correct model name in HI-K0402WS documentation 2026-02-11 22:32:37 +01:00
chriz a2ce5550fc Add documentation file. 2026-02-11 22:30:40 +01:00
TylerDurden-23 1d91c1bf2c Merge branch 'logicog:main' into opt-system-settings 2026-02-11 21:15:56 +01:00
feelfree69 9d8d6f03cc Adding more speeds to SFP link LED 2026-02-11 20:12:16 +01:00
chriz 98f3f15e7e Fix sfp marker. 2026-02-11 20:03:38 +01:00
TylerDurden-23 6f223d3f66 Merge branch 'logicog:main' into hs-add-clean 2026-02-11 20:00:45 +01:00
logicog fe1df83a88 Merge pull request #120 from vDorst/dev_keeplink_kp-9000-9xhml-x_3 
Add Keeplink KP-9000-9XHML-X (RTL8373N + RTL8224N) to machine file.
 2026-02-11 19:57:48 +01:00
logicog e7b7cb0253 Merge pull request #118 from TylerDurden-23/fix-link-speed 
Fix no 10Mbit link speed shown
 2026-02-11 19:55:25 +01:00
René van Dorst 4a3cd7b73c Update Keeplink KP-9000-9XHML-X docs. 2026-02-11 19:19:38 +01:00
René van Dorst f538a9344b Add Keeplink KP-9000-9XHML-X to machine-file. 2026-02-11 19:18:24 +01:00
feelfree69 f2b81af702 Do not set default machine in machine.h to force the user to choose one 2026-02-11 19:01:53 +01:00
feelfree69 651bdb6489 Add MACHINE_SWTGW218AS; do not set a default MACHINE, but force the user the choose one 2026-02-11 18:51:06 +01:00
feelfree69 841e1bf95e set sysled to slow blinking directly after leds have been configured 2026-02-11 18:21:19 +01:00
TylerDurden-23 7e652f3fb7 Merge branch 'logicog:main' into opt-system-settings 2026-02-11 12:31:00 +01:00
TylerDurden-23 90be2f47a3 Merge branch 'logicog:main' into fix-link-speed 2026-02-11 12:30:26 +01:00
chriz 859a50bd82 fix-link-speed 2026-02-10 23:17:04 +01:00
chriz 75b06ac90a Add support for HiSource K0402WS-V3.0 2026-02-10 22:52:03 +01:00
René van Dorst d2edb92ddf Merge pull request #107 from logicog/hg0502xg 
Generic Port LED configuration based on machine-configuration
 2026-02-10 16:58:42 +00:00
chriz 0099c2a03a Fix no 10Mbit link speed shown. Determine link state and speed seperately. Additional handling for port > 8. 2026-02-09 20:16:57 +01:00
logicog d29adafe3c Use generic led configuration 2026-02-08 20:25:01 +01:00
logicog 59894e68cb Add LED-pad mapping 2026-02-08 20:24:58 +01:00
logicog 6af072eb2c Add LED configuration in machine profile 2026-02-08 20:24:05 +01:00
logicog 8cae3f1212 Add generic LED configuration support 2026-02-08 20:23:30 +01:00
logicog 9aaddcd9b9 Reduce DSEG usage as we need 1 OSEG byte 2026-02-08 20:23:30 +01:00
logicog 196e430ec6 Remove debug output 2026-02-08 20:23:30 +01:00
logicog 9424aa3a3b LED configuration support 2026-02-08 20:23:30 +01:00
logicog 7a57416e4c Add MACHINE_HG0402XG_V1_1 2026-02-08 20:23:29 +01:00
René van Dorst fc53003022 Merge pull request #116 from logicog/speed_fixes 
Fix Speed Setting using Auton-Neg
 2026-02-08 18:26:43 +00:00
logicog 47878ac580 Add more printout 2026-02-08 16:46:56 +01:00
logicog d83f91f9e8 Fix Auto-negotiation 
Commit 7f4c276 used the wrong MMD device
for use with the auto-negotiation page:
- phy_write(port, PHY_MMD_AN, 0x00, 0x3200);	// Restart AN
+ phy_write(port, PHY_MMD31, PHY_ANEG_CTRL, 0x3200);	// Restart AN

Fix this.
 2026-02-08 16:46:56 +01:00
logicog 708b6b7f28 Use new signatures for vlan_create and phy-settings 2026-02-08 16:46:56 +01:00
logicog 9d07416641 Convert phy_set_duplex phy_set_speed to use struct phy_settings 2026-02-08 16:46:56 +01:00
logicog 4747eac9bf Reduce DSEG usage for parameters used in port/vlan configuration 
Currently 5 Bytes are used by the port and vlan configuration:
--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_port_ingress_filter_PARM_2:
	.ds 1
_vlan_create_PARM_2:
	.ds 2
_vlan_create_PARM_3:
	.ds 2

They are used for passing parameters. Use __xdata to pass the
parameters instead.
 2026-02-08 16:03:37 +01:00
logicog ecf152990f Fix MACHINE_KP_9000_6XHML_X2: the SDS ids were swapped 2026-02-08 16:03:37 +01:00
René van Dorst d4ed753715 Merge pull request #117 from logicog/uuid_mac 
Generate a random stable locally administered addresses (LAA) MAC address based on the SoC's UUID + LOT number.
 2026-02-08 14:58:36 +00:00
logicog ea230615f9 Use a MAC address based on the SoC's UUID 
We use the SoC's UUID to generate a fixed MAC for a particular
switch device. The MAC generated uses a Realtek prefix and then
is followed by 3 bytes genertaed from the first 3 bytes of the
UUID xored with the last byte in order to prevent being able
to deduce the UUID from the public MAC.
 2026-02-08 15:49:49 +01:00
TylerDurden-23 8f3cabdaff Merge branch 'logicog:main' into opt-system-settings 2026-02-07 18:57:32 +01:00
logicog eafe2e96e8 Merge pull request #113 from diijkstra/trendnet_limited 
Partial TRENDNET TEG-S562 support
 2026-02-07 16:58:32 +01:00
logicog c4dc930ca8 Merge pull request #114 from TylerDurden-23/eee-on-boot 
Add EEE speed option and enable EEE with 2g5 as default at boot
 2026-02-07 16:49:49 +01:00
TylerDurden-23 180de32060 Merge branch 'logicog:main' into opt-system-settings 2026-02-07 14:22:20 +01:00
chriz 68fd5d41a7 Add additional output. 2026-02-07 14:06:06 +01:00
logicog 6263b7e4c6 Merge pull request #112 from diijkstra/enable_sfp_setup 
Enable SFP GPIO pins setup
 2026-02-06 19:56:07 +01:00
logicog ee190a86a1 Merge pull request #88 from TylerDurden-23/main 
Add Hisource HI-K0402WS pictures
 2026-02-06 18:31:17 +01:00
TylerDurden-23 97b46071e0 Merge branch 'logicog:main' into opt-system-settings 2026-02-06 10:50:46 +01:00
chriz ed37d75aba Enable EEE on boot, do not reset interfaces immediately to save boot time. 2026-02-05 17:23:50 +01:00
chriz 3496d12111 Extend command parser. 2026-02-05 16:47:58 +01:00
TylerDurden-23 cfb7a589a8 Merge branch 'logicog:main' into eee-on-boot 2026-02-05 16:12:43 +01:00
diijkstra 5391d3ec32 Partial TRENDNET TEG-S562 support 
Mostly working, lacking LED initialization changes.
LEDs will be added later once #107 is merged.

Closes #76.
 2026-02-04 18:25:07 +01:00
diijkstra f6e4f13ebd Enable SFP GPIO pins 
Previous changes addded initialization rotine, which was never called.
 2026-02-04 18:17:25 +01:00
René van Dorst dbb8fe1249 Merge pull request #104 from diijkstra/i2c_gpio 
Advanced I2C SFP pins definition
 2026-02-01 20:48:34 +00:00
diijkstra 620edc1ba3 Initialize GPIOs with PIN defines 
+ Support in MUX setup (not used thou)
 2026-02-01 14:32:54 +01:00
diijkstra 48455a57b2 PIN module 
Added GPIO defines, moved GPIO MUX initialization to new module.
Converted if/else to switch in GPIO initialization.
 2026-02-01 14:32:50 +01:00
diijkstra 7d62b24a42 Advanced I2C pin definition 
RTL has up to 3 SCL pins and up to 4 SDA pins. Lets allow configuring
I2C with individual BUS numbers instead of 0/1 I2C.

This enables support for devices where SCL line is not shared between
SFP modules. MUX registry is now initialized depending on needed
pin function.

More over, some SFP pins require special MUX settings, lets initialize
those depending on SFP configuration. This adds TX Disable pin,
which right now is set to low at startup.

Caveats:
 - We may still override MUX registry later
 - Not sure how to handle invalid bus definitions
 - Without SFP is it fine to *not* initialize anything?
 - Do to RAM limitation we do inititalize output GPIO to low
 2026-02-01 12:58:16 +01:00
logicog 2c200417b5 Merge pull request #98 from vDorst/fix_soc_init 
Fix soc init
 2026-01-30 23:29:32 +01:00
René van Dorst 2a5f1de8f7 Merge pull request #105 from logicog/mgmt_vlan 
Add support for pin switch management features to a VLAN.
 2026-01-29 19:31:32 +00:00
logicog 9d4eef2dd6 Add support for management vlan 
This adds support for the verification of a mangement vlan.
When enabled, then the switch's CPU will not listen to any packets
that are not tagged with the respective VLAN tag.
On the command line this is enabled by setting:
> vlan <vlan> mgmt

Setting the vlan ID of the management VLAN to 0 or 1 disables
the mangement VLAN function.
 2026-01-29 19:56:01 +01:00
chriz 55fd2d5fb6 Add speed option to EEE function. 2026-01-28 09:21:03 +01:00
logicog aae055123e Merge pull request #99 from TylerDurden-23/vlan-pvid-clean 
Add ability to configure PVID on VLAN page.
 2026-01-28 06:18:37 +01:00
chriz 5a11515c36 Improve firefox compatibility. 2026-01-27 14:59:57 +01:00
chriz 934014c68c Label rename. 2026-01-26 23:42:36 +01:00
chriz 5662285a3e Clear command log after saving. 2026-01-26 23:29:23 +01:00
René van Dorst 1d94e99612 Demagic 0x7, 0x3e to PHY_MMD_AN, PHY_EEE_ADV2 2026-01-26 23:00:29 +01:00
René van Dorst a134335308 Demagic PHY_MMD31, 0xa432 to PHY_MMD31, PHY_MMD31_PHYCR2 2026-01-26 22:58:57 +01:00
René van Dorst 6495310ba9 Demagic PHY_MMD31, 0xa434 to PHY_MMD31, PHY_MMD31_PHYSR 2026-01-26 22:48:04 +01:00
René van Dorst 5962c3a8a6 Demagic PHY_MMD31, 0xa414 to PHY_MMD31, PHY_MMD31_GANLPAR 2026-01-26 22:45:44 +01:00
René van Dorst a6e452e638 Demagic PHY_MMD_AN, 33 to PHY_MMD_AN, PHY_ANEG_MGBASE_ADV 2026-01-26 22:42:54 +01:00
René van Dorst 7f4c276285 Demagic PHY_MMD_AN, 0x00 to PHY_MMD_AN, PHY_ANEG_CTRL 2026-01-26 22:41:49 +01:00
René van Dorst f9fdc6b81d Demagic PHY_MMD_AN, 0x13 to PHY_MMD_AN, PHY_ANEG_LP_ABILITY 2026-01-26 22:39:16 +01:00
René van Dorst d9185b3505 Demagic PHY_MMD31, 0xa400 to PHY_MMD31, PHY_MMD31_FEDCR 2026-01-26 22:37:16 +01:00
René van Dorst 3d7ef55ced Demagic PHY_MMD31, 0xa412 to PHY_MMD31, PHY_MMD31_GBCR 2026-01-26 22:35:03 +01:00
René van Dorst 44779404df Demagic PHY_MMD_AN, 0x20 to PHY_MMD_AN, PHY_ANEG_MGBASE_CTRL 2026-01-26 22:31:44 +01:00
René van Dorst 1997d7379b Demagic PHY_MMD_AN, 0x10 to PHY_MMD_AN, PHY_ANEG_ADV 2026-01-26 22:28:33 +01:00
chriz b5c249995f Add startup config editor. 2026-01-26 20:40:30 +01:00
René van Dorst c61fb6d2fe Forgot to replace so machine.isRTL8373 to machine_detected.isRTL8373 2026-01-26 20:39:42 +01:00
René van Dorst c11099b9ec Rename PHY_SDS_CTRL and RTL8224_DEV_ID to PHY_MMD30. 
So demagic the `phy_(, 0x1e, )` to `phy_(, PHY_MMD30, )`.
Use `rg -tc phy | rg -i 0x1e` to find to most locations.
 2026-01-25 23:44:03 +01:00
René van Dorst 13d0781455 Rename PHY_MMD_CTRL to PHY_MMD31. 
So demagic the `phy_(, 0x1f, )` to `phy_(, PHY_MMD31, )`.
 2026-01-25 23:38:04 +01:00
chriz b2514bf176 Rename and auto select. 2026-01-25 22:04:59 +01:00
chriz c36136047c Add support for configuring PVID on VLAN page. 2026-01-25 22:04:05 +01:00
René van Dorst fc327810ed Add more comments about the SDS-settings for RTL8224. 
Remove the unused array `rtl8224_cb`.
Rename `rtl8224_ca` to `rtl8224_sds0_setttings`.
 2026-01-25 20:24:40 +01:00
René van Dorst b7b4594406 N-type SOC need to swap some Serdes lines to make it work. 
Without this fix N-type SOC devices like RTL8372N, RTL8383N and also the
4-port PHY RTL8224N, don't have a functional Serdes. Although the SOC
sees a link, there is no packet flow on both SFP-port nor RTL8224 ports.

Added helper functions to read/write to the RTL8224.
RTL8224 has the same register layout so we can use the same register
defines as for the main SOC.
 2026-01-25 17:22:51 +01:00
René van Dorst aa750d8ff1 Detect SOC type and use detected SOC type to init the hardware. 
Detect the SOC type and variant. RTL8372 vs RTL8373 and also is it as
non-N/N variant of the SOC.
Even if the machine profile is wrong the hardware will be initilised on
the detected type.
 2026-01-25 16:55:43 +01:00
logicog 17b428a603 Merge pull request #90 from feelfree69/fix-FW-Upload 
make fw upload working; nicer debug outputs for console
 2026-01-24 09:54:07 +01:00
René van Dorst a0313eab87 doc: gpio overview and mux settings 2026-01-22 23:04:07 +01:00
feelfree69 0345bf7bf2 Use DIO mode for normal operation; disable DIO before flashing. Use SYS_LED for indicating booting (slow), flashing (fast) and normal operation (on) 2026-01-22 19:38:17 +01:00
feelfree69 1e8382bd56 Add output of build time stamp 2026-01-22 10:24:07 +01:00
feelfree69 8dc914eb07 make fw upload working; nicer debug outputs for console 2026-01-22 08:17:07 +01:00
chriz a528436572 Add HiSource HI-K0402WS pictures 2026-01-21 14:43:04 +01:00
René van Dorst 2cdeda3bc9 Merge pull request #87 from feelfree69/patch-1 
Move SW version print after flash initialization
 2026-01-20 18:55:27 +00:00
logicog a72528b724 Merge pull request #84 from vDorst/feat_version_hardware 
version: Also show the hardware profile.
 2026-01-20 18:37:17 +01:00
feelfree69 1e073b20b6 do flash_init() earlier 
As suggested in review comment
 2026-01-20 08:13:22 +01:00
feelfree69 efcbc8b4a8 Move SW version print after flash initialization 
The code of print_sw_version() is in BANK1 and needs a proper configured flash controller.
 2026-01-19 20:32:20 +01:00
René van Dorst 13e9dbbc7b Merge pull request #68 from logicog/dhcp 
Add a DHCP client implementation and validate BANKS code size.
 2026-01-18 11:08:17 +00:00
logicog f48c84b18e Document checksum calculation offload in hardware 2026-01-18 07:50:38 +01:00
logicog 3bfcabbb99 Add main directory for includes 2026-01-18 07:50:38 +01:00
logicog 5eecab4844 Move SYS_TICK_HZ to rtl837x_common.h 
The definition is needed everywhere in the code where the ticks
need to be related to seconds.
 2026-01-18 07:50:38 +01:00
logicog fd1d14a3e7 Use main directory for includes in httpd 2026-01-18 07:50:38 +01:00
logicog 34cebe5971 Enable UDP for DHCP in uIP 2026-01-18 07:50:38 +01:00
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog af3be9a067 Initial DHCP implementation 2026-01-18 07:39:49 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
René van Dorst e74c4f148a version: Also show the hardware profile. 2026-01-17 21:02:25 +01:00
logicog d1d5d5e18f Consistently use banked externally visible functions 2026-01-17 17:54:31 +01:00
logicog 892920a627 Mover phy code to bank 2 as bank 1 already overflows 2026-01-17 17:54:31 +01:00
logicog eb0e90df5c Enable bank 2 in Makefile 2026-01-17 17:54:31 +01:00
logicog 2ce168883b Add support for banks > 1 2026-01-17 17:54:31 +01:00
René van Dorst e54313eded Merge pull request #83 from logicog/l2 
Add support for L2 entry display and deletion in the web interface
 2026-01-17 16:00:37 +00:00
logicog 300f599551 Fix output of l2 command 2026-01-17 12:56:43 +01:00
logicog 73a355cff5 Add L2-table access method defintions 2026-01-17 12:56:43 +01:00
logicog e53f5e7134 Add L2 entry deletion support via web 2026-01-17 12:56:43 +01:00
logicog 3509f7da04 Add web functionality to delete L2 entries 2026-01-16 18:04:22 +01:00
logicog 55d10ae3fc Make L2 information page available in navigation menu 2026-01-16 18:04:22 +01:00
logicog 88e706c295 Add simulation support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e59158e006 Add backend support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e0c9338357 Add support in web-interface for displaying L2 entries 2026-01-16 18:04:22 +01:00
logicog e7df748b6a Fix error in calculating VLAN for L2 entries 2026-01-16 18:04:22 +01:00
logicog 5cb1acfc15 Merge pull request #82 from vDorst/fix_SWTG024AS_sfp_port_mapping 
SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped.
 2026-01-15 19:58:48 +01:00
René van Dorst 46864ca9a7 SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped. 
On SWGT024_V2_0, the SFP ports are arranged differently.
The port mapping should also reflect this.
 2026-01-15 19:46:04 +01:00
René van Dorst 00b42db5da Merge pull request #78 from logicog/nic_demagic 
MIB Counter fixes and Detailed Display
 2026-01-15 18:45:38 +00:00
logicog 84fe44cc9a Add httpd backend implementation for MIB counter requests 2026-01-15 18:07:56 +01:00
logicog 6326428406 Add simulation of MIB counters 2026-01-15 18:07:56 +01:00
logicog f33c4e3dc9 Add display of MIB counters to Web-Interface 2026-01-15 18:07:56 +01:00
logicog 4a615cb4bd Merge pull request #71 from vDorst/doc_mods 
DOCS: Add modification page and flash replacement.
 2026-01-15 07:43:33 +01:00
René van Dorst 030772f1ef Merge pull request #75 from vDorst/fix_serial_timer1 
Fix: Serial Timer1: GATE bit should be off.
 2026-01-13 19:10:22 +00:00
René van Dorst 4ce8adf954 Merge pull request #80 from logicog/fix_rldp_register 
Fix typo in register address for RLDP Leds
 2026-01-13 19:09:58 +00:00
logicog 66c58a50df Fix typo in register address for RLDP Leds 2026-01-13 18:02:21 +01:00
logicog 48c12fa0bb Correct TX and RX good MIB counter 
The counters for good TX and RX packages were swapped. Fix this
and also use propper names for the counters.
 2026-01-11 07:51:18 +01:00
logicog d2d7ab7ff1 De-magic NIC rx and tx registers, cleanup 2026-01-11 07:51:18 +01:00
René van Dorst f43bb4eac4 Fix: Serial Timer1: GATE bit should be off. 
Fixes PR#66, commit c5c6b97 and 4e8eb6d.

The GATE-bit should not be used. Timer1 must always be activated to
generate the baudrate clock for serial 0.
 2026-01-10 11:01:17 +01:00
logicog 4e8eb6d766 Merge pull request #66 from vDorst/fix_systick_asm 
Move SYS_TICK to Timer2 and SERIAL baudrate gen to Timer1.
 2026-01-09 08:22:30 +01:00
René van Dorst c5c6b97ad1 installer: SERIAL: Use Timer1 instead of Timer2 
Same as in the main code.

Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Only differance is that the serial is transmit only and poll-based so no
interrupts are used to transmit data.
 2026-01-09 07:52:35 +01:00
René van Dorst 229fad3809 Merge pull request #73 from logicog/dio 
Enable Flash Dual I/O command by default.
Speed up data transfers up to 2x.
 2026-01-08 21:52:52 +00:00
logicog 52522968c7 Restore SPI read registers after Jedec/Security Register reads 2026-01-08 22:42:50 +01:00
René van Dorst 7d04ea1980 doc: mods: Add note about command BBh. 
All the listed parts, support `BBh` command.
 2026-01-08 21:45:58 +01:00
René van Dorst 34d6024eeb DOCS: Add modification page and flash replacement. 
Document modifications like flash replacement.
 2026-01-08 21:35:40 +01:00
René van Dorst d52aeca609 Merge pull request #74 from logicog/dbg 
Convert unconditional prints to debug prints in httpd
 2026-01-08 20:12:21 +00:00
logicog e085fc9cc9 Convert unconditional prints to debug prints in httpd 2026-01-08 09:56:43 +01:00
logicog f621563479 Enable DIO by default 2026-01-08 06:44:38 +01:00
logicog 0fe70f6b62 Merge pull request #72 from vDorst/fix_flash_read 
Flash: fix: Don't use READ 0x03 flash command.
 2026-01-07 18:44:08 +01:00
René van Dorst 745c170f0a Flash: fix: Don't use READ 0x03 flash command. 
In commit 884bc18, `Fast Read 0x0b` was exchanged for `Read 0x03` command.
This was done because I did not see the difference between the commands
and the extra dummycycles looks like wasted time. But I overlooked that
many flash devices, the `Read 0x03` command can't run at the maximum
SPI-clock speed, but only half or less of the maximum SPI-clock speed.
This can cause in-transit data corruption while reading the device.

So change it back to `Fast Read 0x0b` command, so the SPI device is used
within the device specification.
 2026-01-06 19:45:33 +01:00
René van Dorst 5b4b0efb16 installer: remove unused sys_tick timer code. 2026-01-05 21:46:05 +01:00
René van Dorst b818a94202 SERIAL: Wrong use of TI-flag causes IRQ-storm. 
TI-interrupt flag is used in the code, this is only
fine when SERIAL-interrupt is not enabled/used but
when is it used, it generates an interrupt which is
not handled, so it keeps generating interrupts and
trashing the performance and caused starvation on
lower priority interrupts like TIMER 2.

Use an extra flag to signal to the code that the
TX-buffer is empty.
 2026-01-04 14:16:28 +01:00
René van Dorst bbd4656810 SERIAL: Use Timer1 instead of Timer2 
Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Timer2 16-bit auto-reload can now be used for other tasks like SYS_TICK.
 2026-01-04 14:15:30 +01:00
René van Dorst 8b061d5fb9 SYS_TICK: Use Timer2 instead of Timer0. 
Downside of Timer0 is, we have to manually reload
the timer value. Timer2 can do that automaticly.
This saves a lot of time in the interrupt-handler
of the Timer.

Currently Timer2 is used for baudrate-generation
but in a separete commit this is moved to Timer1.
 2026-01-04 14:14:52 +01:00
René van Dorst 5ed4d7afc7 Merge pull request #67 from logicog/docs 
Update Readme
 2025-12-29 21:05:05 +00:00
logicog e73d82ec33 Update Readme 2025-12-29 18:21:16 +01:00
logicog 52832ff299 Merge pull request #56 from vDorst/doc_SWTG024AS_update 
Doc swtg024 as update
 2025-12-27 19:25:43 +01:00
logicog 787a82e846 Create LICENSE 
Adding MIT license as discussed elsewhere
 2025-12-27 07:01:25 +01:00
logicog 3653f90356 Merge pull request #64 from vDorst/fix_systick_calc 
Fix systick 16-bit writing to timer0 registers.
 2025-12-26 10:42:13 +01:00
René van Dorst 9ff114d234 SYSTICK: Fix writing value to TMR0 registers. 
A `%` modulo operator was used instead of a
`&` and-operator, to split a 16 bit value into two
8 bit values.
This causes that the SYSTICKs were 0.1% too fast.

Replace the manual split with a sfr16 type, so the
compiler does the split for us.
 2025-12-26 10:07:13 +01:00
René van Dorst 0abe83e3e5 sfr: add 16 bit SFR for the timer0. 
So we don't have to manual split 16-bit value into
for bytes.
Let the compiler do the work.
 2025-12-26 10:07:11 +01:00
René van Dorst 2a7b8f9838 Merge pull request #59 from logicog/timer_fixes 
Fix internal timer tick counter for housekeeping.
Because of the high F_CPU and low SYS_TICK.
Timer0 can easy overflow.
Now this is known and fixed.
 2025-12-25 09:54:58 +00:00
logicog 7fdf9ca86d Add time command to show system time 2025-12-25 10:27:37 +01:00
logicog 2b364943c2 Fix system clock 2025-12-25 10:27:37 +01:00
René van Dorst a8227f1855 Merge pull request #54 from logicog/speeds 
Add a Port Speed and MTU configuration Web-Page
 2025-12-25 09:11:31 +00:00
logicog 34a0e2d338 Right align speed option selection 2025-12-25 09:46:59 +01:00
logicog 4878a36638 Use changed signatures in parse_port for PHY speed setting 2025-12-25 09:46:59 +01:00
logicog dd7a5ebb95 Merge pull request #62 from vDorst/fix_SWTG024AS_port_mapping 
SWGT024_V2_0: Fix port mapping. Port 2 & 3 were swapped.
 2025-12-24 09:33:19 +01:00
René van Dorst 3ef7e45649 SWGT024_V2_0: Fix port mapping. Port 2 & 3 were swapped. 2025-12-23 14:30:27 +01:00
logicog 2a7bfdc119 Add duplex setting in PHY speed configuration 2025-12-23 13:04:34 +01:00
logicog 367bef2b2f Add defines for duplex modes 2025-12-23 13:04:34 +01:00
logicog cad74017a9 Remove white space in machine.h 2025-12-23 13:04:34 +01:00
logicog 3af63af4a4 Add MTU setting in web-page 2025-12-23 13:04:34 +01:00
logicog b7cfc73752 Add support in simulator for mtus 2025-12-22 23:28:50 +01:00
logicog 51345a07e6 Add mtu support in http server 2025-12-22 23:28:50 +01:00
logicog 67fbad38ce Add mtu command 2025-12-22 23:28:50 +01:00
logicog 67439efd2b Correctly display 9-port machines 2025-12-22 23:28:50 +01:00
logicog b4b8ad5738 Simulate 9-port machines 2025-12-22 23:28:50 +01:00
logicog eb0106d9f4 Correct bits in advertised PHY speeds 2025-12-22 23:28:50 +01:00
logicog f0537d759f Correct PHY registers for speed selection 2025-12-22 23:28:50 +01:00
logicog 36d5ee3ddd Add port speed page 2025-12-22 23:28:50 +01:00
Tobias Diedrich 6441e85752 Add rounding to baud rate calculation 
Without rounding:
- Divisor: 33 = (125000000 / 115200 / 32)
- RCAP2 value: 65503
- Actual baud rate: 118371 = (125000000 / 32 / 33)
- Error: 2.75%

With rounding:
- Divisor: 34 = ((125000000 / 115200 + 16) / 32)
- RCAP2 value: 65502
- Actual baud rate: 114889 = (125000000 / 32 / 34)
- Error: 0.27%

Should fix https://github.com/logicog/RTLPlayground/issues/48
 2025-12-22 23:28:50 +01:00
René van Dorst 053c16b84e SWTG024AS: Document Slave Interface 2025-12-22 14:32:23 +01:00
René van Dorst 4e9fb19e05 SWTG024AS: more small changes 2025-12-20 20:36:41 +01:00
René van Dorst 0a0e1856ae SWTG024AS: Link to photo 2025-12-20 14:50:25 +01:00
René van Dorst cedd81cf00 SWTG024AS: Fix and use unit KiB, add missing managed flag. 2025-12-20 14:44:38 +01:00
René van Dorst bf00f9aa2c Merge pull request #57 from ranma/baudrate-rounding 
Add rounding to baud rate calculation
 2025-12-20 11:55:42 +00:00
Tobias Diedrich f46cb02828 Add rounding to baud rate calculation 
Without rounding:
- Divisor: 33 = (125000000 / 115200 / 32)
- RCAP2 value: 65503
- Actual baud rate: 118371 = (125000000 / 32 / 33)
- Error: 2.75%

With rounding:
- Divisor: 34 = ((125000000 / 115200 + 16) / 32)
- RCAP2 value: 65502
- Actual baud rate: 114889 = (125000000 / 32 / 34)
- Error: 0.27%

Should fix https://github.com/logicog/RTLPlayground/issues/48
 2025-12-20 08:37:28 +01:00
René van Dorst 0779222194 SWTG024AS: Add Sodola SL-SWTG124AS-D 
Info from #55.
 2025-12-19 21:07:11 +01:00
René van Dorst 44ce073869 SWTG024AS: Add port overview, rename SDS to SerDes 2025-12-19 21:03:47 +01:00
logicog c20ec6b081 Merge pull request #53 from sergewar/main 
Add github actions
 2025-12-18 10:17:10 +01:00
sergewar ed62e46790 Add github actions 2025-12-18 10:23:52 +02:00
René van Dorst 12595f806a Merge pull request #50 from logicog/sfp_readings 
Show SFP + DOM info while hovering over the port.
 2025-12-17 06:50:41 +00:00
logicog 58c9af242d Cleanup code in rtl837x_phy.c 2025-12-17 06:44:11 +01:00
logicog dc9bc5ec7d Add SFP data to send_basic_info 2025-12-17 06:44:09 +01:00
logicog 44792699bf Add sfr_mask_data function header 2025-12-17 06:43:31 +01:00
logicog 12db61faf7 Add tooltips 2025-12-17 06:43:28 +01:00
logicog 519c224dd2 Use charset=UTF-8 in http header 
This allows us to use the degree sign for the temperatur
readings of the SFP modules.
 2025-12-16 20:08:47 +01:00
logicog b442417a8a Add tooltips for ports 2025-12-16 20:08:47 +01:00
logicog 87717a0790 Move drawing of ports into main.js 
This reduces the number of .js which are pulled by the browser
when loading a http page, which should reduce the loading time.
Also prepare for device-dependent logical to physical port
mappings.
 2025-12-16 20:08:47 +01:00
logicog 81fdb14213 Fix http_sim.c 2025-12-16 20:08:47 +01:00
logicog 6fd32d290c Printout of dynamic SFP information 2025-12-16 20:06:27 +01:00
logicog 6272d949cd Add readout of SFF-8472 A2h info from SFPs 2025-12-16 20:06:27 +01:00
René van Dorst 9c4d49bc8c Merge pull request #49 from logicog/igmp 
Add basic IGMP support.
 2025-12-15 06:45:20 +00:00
logicog 95fae8bad2 Display actual link speed 2025-12-15 06:54:41 +01:00
logicog 6dfad825c0 Add IGMP documentation 2025-12-15 06:54:41 +01:00
logicog c8c524b71f Add an implementation for IGMP 
This adds an implementation for trapping IGMP packets to the CPU
which will identify IGMPv1/2/3 packets, but handle only v3.
The implementation then inserts/updates/deletes L3 MC entries
in the L3 lookup table. The entries consist of an Ipv4
Destination IP (the IPv4 MC address), a Source IP (0.0.0.0) and
a Portmask. Note that this implementation is not VLAN aware,
as there is no hardware support in the device.

An alternative strategy is to control switching of the L2-MC packets
in which the IPv4-MC packets are transported (dst-MaC is
01:00:5e:xx:yy:zz, with xx:yy:zz corresponding to bits in the Ipv4-MC
address). This will allow to use VLAN-aware packet switching. While
code support is there for table insert/update/deletes, some further
L2 configuration is missing.

There is no support for IPv6 MC, yet.
 2025-12-15 06:54:41 +01:00
logicog 96977b5d88 Move rtl_tag structure definition to common inlude 2025-12-14 20:35:17 +01:00
logicog a84c5dcd0c IGMP refactoring 2025-12-14 20:35:17 +01:00
logicog b1d5352214 Update LAG configuration registers 2025-12-14 20:35:17 +01:00
René van Dorst 677e01fa18 Merge pull request #39 from logicog/sfp_work 
Put all the device information in one struct `machine`.
So all the device information is defined in one place.
Also easier to add new devices.
Show device name also on website.
Fix SFP status information, some devices have a different SFP layout.
Reworks GPIO handling
Able to set manual port speed, duplex for the RJ45 ports.
 2025-12-14 11:53:23 +00:00
logicog b41452026f Make sure port is not called for an SFP module 2025-12-14 12:17:53 +01:00
René van Dorst 0197c9b6cf Fixed to make SWGT024 V2.0 work 2025-12-14 11:49:38 +01:00
logicog 2ed9974c04 Add more options to Link configuration and status display 2025-12-14 11:41:50 +01:00
René van Dorst 11d2c843e5 Fixed to make SWGT024 V2.0 work 2025-12-13 22:22:40 +01:00
logicog 28f832a24d Fix PHY issues 2025-12-13 22:22:40 +01:00
logicog d71a303f6c Move RTL8372 SMI address configuration 2025-12-13 22:22:40 +01:00
logicog 74364ed7e8 Add machine name in send_basic_info() 2025-12-13 22:22:40 +01:00
logicog e6cf97b895 Support keeplink 5+1 device 2025-12-13 22:22:40 +01:00
logicog 1cdc8d2cf7 De-Magic switch init 2025-12-13 09:25:58 +01:00
logicog a453ec72dc Use cached GPIO state 2025-12-13 09:25:58 +01:00
logicog edfb86bff4 Use SFP pin definitions and I2C ports for SFP modules 2025-12-13 09:25:58 +01:00
logicog 45d4fc19c4 Add machine definitions 2025-12-12 18:31:42 +01:00
logicog d75ad636f9 Use machine structure 2025-12-12 09:06:52 +01:00
logicog 6b96c3b70b Merge pull request #47 from sergewar/update_doc 
Update requisites for compiling
 2025-12-11 09:35:23 +01:00
sergewar 35ab8cc5e0 Update requisites for compiling 2025-12-10 01:43:10 +02:00
logicog 06fbf85bce Add SFP information in send_basic_info() 2025-12-08 12:24:20 +01:00
logicog 3c869e927a Add support for 10G 500M and 5G speed display 
This adds the speed status display of other link speeds:
100M 500M 1000M: Green 2nd LED
2.5G, 5G, 10G: Orange 2nd LED
 2025-12-08 08:39:54 +01:00
logicog ab6a66a223 Add support for 2nd SFP port in stats 2025-12-08 08:39:54 +01:00
logicog 636981c3b8 Detect 2nd SFP-slot RX-Los on KP-9000-6XHML-2X 2025-12-08 08:39:54 +01:00
logicog 101b4937e1 Fix link change handling 
The RTL8272/3 use 2 32 bit registers to indicate the MAC link speed, the
second register is used for ports 8 and 9, where 9 is the CPU port.
Use both registers.
 2025-12-08 08:39:54 +01:00
logicog e9b8ab5b79 Correct handling of SFP ports in stat command 
This fixes handling of the SFP ports in the stat command.
The output of the command now is for physical ports, which however are
not shown in sequence.
 2025-12-08 08:39:54 +01:00
logicog 32b5539670 Do not show non-ascii Transceiver field in SFP module description 2025-12-07 10:59:39 +01:00
René van Dorst fccafe8059 Merge pull request #43 from logicog/lags 
feature LAGs support.
 2025-12-07 09:12:21 +00:00
logicog 68405f70d2 Add lag show command 2025-12-06 23:38:41 +01:00
logicog e7301dc39f Add send_lag for page_impl.h 2025-12-06 18:01:12 +01:00
logicog 94b6688e57 Correctly use physical port in mirror configuration 2025-12-05 07:38:16 +01:00
logicog 3679b46ff2 Add LAG implementation in httpd 2025-12-05 07:38:16 +01:00
logicog 52fe23570c Add simulator for LAGs 2025-12-05 07:38:16 +01:00
logicog 6557fc53e5 Add LAG configuration web-page 2025-12-05 07:38:16 +01:00
logicog 4b2d7002dc Add physical/logical mapping of ports 2025-12-05 07:38:16 +01:00
logicog b82b957750 Add LAG documentation 2025-12-05 07:38:16 +01:00
logicog 8284554f69 Add LAG configuration commands 2025-12-05 07:38:16 +01:00
logicog 47aa6ab7bf Improve LAG configuration 2025-12-05 07:38:16 +01:00
logicog 42ea80a480 Update LAG configuration registers 2025-12-05 07:38:16 +01:00
logicog e63d1bf577 Merge pull request #27 from vDorst/doc_2M-PCB23-V3_1-managed 
Add docs: 2M-PCB23-V3.1-managed
 2025-12-01 22:30:06 +01:00
René van Dorst 1c78d32493 Merge pull request #36 from logicog/config 
System settings and configuration management
 2025-12-01 19:22:03 +00:00
logicog b910692caf Use random session ID in httpd.c 2025-12-01 18:26:46 +01:00
logicog 9c21d94b65 Add read_reg_timer function 2025-12-01 18:26:46 +01:00
logicog 7f715e9218 Move inline itohex() into header file to allow external access 2025-12-01 18:26:46 +01:00
logicog ad27566030 Use current password in httpd.c 2025-12-01 18:26:46 +01:00
logicog 0722b147fe Add cache control to make sure new pages are served on session timeout 2025-12-01 18:26:46 +01:00
logicog 4e4e6a55ba Redirect to login page when status request not authorized 2025-12-01 18:26:46 +01:00
logicog dc6734236c Add rnd and passwd commands 2025-12-01 18:26:46 +01:00
logicog 70c14fb23e Add get_random_32() 2025-12-01 18:26:46 +01:00
logicog 73a81ec031 Add initial implementation for authentication 2025-12-01 18:26:46 +01:00
logicog cac7fbe080 Add simulator support for session management 2025-12-01 09:22:46 +01:00
logicog 6e0e907afb Add register definitions for random number generation 2025-11-29 12:44:23 +01:00
logicog a8a770f27f Add login page and style 2025-11-29 12:44:23 +01:00
logicog 69110531b7 Add support for reading configuration and command history 2025-11-29 12:44:23 +01:00
logicog 00a415c755 Add filtering logic for configuration commands 2025-11-29 12:44:23 +01:00
logicog f485102d26 Add fetching of configuration file and current cmd history 2025-11-29 12:44:23 +01:00
logicog 4d915a0d80 Add support for command history 
This adds a command history, both for the CLI as well as for
commands sent by the web-interface. They are written to a ring buffer
in order to work safely with a relatively small amount of RAM
The buffer is used to read the current in-RAM configuration
from the switch by the web-interface. It could also be used
to implement cmd history via cursor up/down in the CLI.
 2025-11-29 12:44:23 +01:00
logicog 9d4ba57cd0 Add support for chunking of served files 
This removes the limitation that a file served from FLASH memory
needs to be smaller than the TCP buffer size. Now we serve up to
the TCP buffer size in the first go and then remember what parts
still need to be sent. As soon as the previous package has been
acked, the next chunk of data is copied from flash into the
TCP transmit buffer and gets sent. We take care only to send
the current TCP window size so no further fragmentation needs to
happen, thus optimizing transmission of the remainder.
 2025-11-29 12:44:23 +01:00
logicog ba9bc2e845 Initial web-files for system settings and configuration management 2025-11-29 12:44:23 +01:00
logicog 76344e172c Merge pull request #42 from vDorst/cmd_version 
Added software version + git short hash string to firmware.
 2025-11-27 20:05:47 +01:00
René van Dorst f59be9cf2b Added software version + git short hash string to firmware. 
The Makefile has the version number and generates a version.h which
has VERSION_SW define that looks like "v<VERSION>-g<GIT_SHORT_HASH>".

Software version shows at boot in the serial console.
And shown with command: `version`.

It can also be requested via `information.json`.
```
{
    "ip_address": "192.168.10.247",
    "ip_gateway": "192.168.10.1",
    "ip_netmask": "255.255.255.0",
    "mac_address": "1c:2a:a3:23:00:02",
    "sw_ver": "v0.1.0-gd48235f",
    "hw_ver": "SWGT024-V2.0"
}
```
 2025-11-26 23:08:23 +01:00
René van Dorst d48235f652 Merge pull request #37 from logicog/sfp_demagic 
De-Magic I2C configuration for SFP-EEPROM reads
 2025-11-03 21:07:15 +00:00
logicog 9c7572b289 De-Magic I2C configuration for SFP-EEPROM reads 2025-11-02 09:49:13 +01:00
logicog 0989b227c0 Merge pull request #34 from vDorst/feat_html_firmware_select 
html: firmware selection: limit extension only to .bin
 2025-10-31 11:48:37 +01:00
René van Dorst aa406e1d98 html: firmware selection: limit extension only to .bin 
This makes it quicker to select firmware image from the output directory.

You can still select at File type "All Files" if the extention is diffrent.
 2025-10-30 21:30:37 +01:00
René van Dorst 1d6f0a2163 Merge pull request #33 from logicog/mirror 
Mirror
 2025-10-30 20:03:22 +00:00
logicog f93cfd467f Use better css elsewhere 2025-10-29 15:39:47 +01:00
logicog 51c5bd75eb Add mirroring web-calls 2025-10-29 15:39:47 +01:00
logicog 2008d490a9 Add support for mirror status and mirror deletion via CLI 2025-10-29 15:39:47 +01:00
logicog 5622f1c843 Add Mirroring web-pages 2025-10-29 15:39:47 +01:00
logicog aa99921ea2 Merge pull request #32 from vDorst/gen_json 
Improve JSON response.
 2025-10-29 15:39:23 +01:00
René van Dorst 7d94f3d328 Improve JSON response. 
Remove all the extra spaces from the json.
Also simplify the generation of the json.
Codespace is cheap so duplicated strings is not an issue.
But generating strings from different parts is more expensive in clock cycles.

Add a helper funcion `bool_to_html()` to generate bool value for html output.
 2025-10-28 21:10:26 +01:00
René van Dorst d0b6a73bf2 Merge pull request #30 from logicog/crc16 
CRC-16 Calculation and verification
 2025-10-26 21:59:50 +00:00
logicog eb0e4df5ea Fix reset after image upload 2025-10-26 14:20:30 +01:00
logicog 9c062edc75 Fix CRC calculation during upload 2025-10-26 14:20:07 +01:00
René van Dorst 9929fcc169 Merge pull request #31 from logicog/eee_status 
Eee status display
 2025-10-22 09:12:02 +02:00
logicog e5f5955f71 Add timeouts to XhttpGet requests 2025-10-22 08:05:44 +02:00
logicog ba902a68d4 Defer cmd execution for console and via http POST 2025-10-21 18:05:33 +02:00
logicog 03fb3fe6b4 Reduce PHY reset time to 20ms 2025-10-21 17:47:38 +02:00
logicog 726b421824 Add EEE httpd support 2025-10-21 17:46:18 +02:00
logicog df1cd62518 Add EEE style and navigation 2025-10-20 18:35:35 +02:00
logicog aab4d334e5 Formatting fix 2025-10-20 18:35:35 +02:00
logicog 73b8335bef Add EEE html page 2025-10-20 18:35:35 +02:00
logicog 0d64efacb3 Add EEE status query 2025-10-20 18:35:35 +02:00
logicog f3ff8eed42 Make use of CRC checksum calculation when building image 2025-10-20 07:29:39 +02:00
logicog 4d17d9ff00 Add CRC verification 2025-10-20 07:29:39 +02:00
logicog 8499e9e464 Add CRC-16 calculator for a firmware image 2025-10-20 07:29:39 +02:00
logicog ac4f0d410f Add CRC16 initial code 2025-10-20 07:29:39 +02:00
René van Dorst adc4bfc9a0 Merge pull request #29 from logicog/constseg 
Fix bug in usage of CONST segment in banked code. Use #pragma constseg
 2025-10-15 18:34:54 +00:00
logicog 7546d0c685 Fix bug in usage of CONST segment in banked code. Use #pragma constseg 2025-10-14 18:41:52 +02:00
René van Dorst 58c21a1986 Merge pull request #28 from logicog/eee 
Support EEE via CLI
 2025-10-11 18:34:39 +00:00
logicog 8efb9fb305 Fix counter GET 2025-10-11 13:09:47 +02:00
logicog 717247bc0e Add MAC-EEE functionality 2025-10-11 13:09:47 +02:00
logicog 31c61faa60 Use PHY page definitions, add PHY reset routine 2025-10-11 11:32:23 +02:00
logicog 2ff450edd4 Add generic PHY definitions file for C45 PHYs 2025-10-11 11:29:28 +02:00
René van Dorst 17fdbf39f0 Add docs: 2M-PCB23-V3.1-managed 2025-10-11 00:11:38 +02:00
logicog 1a0ad07367 Remove superfluous head tag and move final script tag into body 2025-10-10 20:06:45 +02:00
René van Dorst 0f48a773d9 Merge pull request #26 from logicog/navbar 
Navbar
 2025-10-10 18:02:04 +00:00
logicog 09ba7859b6 Add navigation.js sidebar 2025-10-10 18:27:24 +02:00
logicog 39a22fd926 Use consistent navbar for all pages, save space used in HTML for this 2025-10-10 18:18:42 +02:00
logicog 5cc90841ea Merge pull request #25 from vDorst/installer_typo 
installer: fix left over typo SFR_FLASH_DUMMYCICLES
 2025-10-10 17:46:57 +02:00
René van Dorst e5ee4594ef installer: fix left over typo SFR_FLASH_DUMMYCICLES 2025-10-09 20:03:08 +02:00
logicog 0835d52fec Merge pull request #21 from logicog/updater 
WIP: Add a web-updater
 2025-10-08 08:57:58 +02:00
René van Dorst 928cf1cf58 http: upload: make sure we don't cross flash page boundaries. 
This causes the address pointer to wrap back to the front of the page.
Which results in that the beginnen of the page can have data for the next page.
 2025-10-07 21:19:36 +02:00
René van Dorst a59f92a648 Also use struct flash_region in flash_read_security(), flash_sector_erase(). 2025-10-05 16:53:46 +02:00
René van Dorst 52fa41760c Don't pass the first 16-bit argument via xdata. 
Calling confention already uses the DPTR registers as the first two byte arguments.
So adds a lot of code to put the 16-bit value on xdata, still passes the 16-bit xdata ptr in DPTR registers, then read the xdata value.
So it doesn't save any sram bytes.
 2025-10-05 16:22:23 +02:00
René van Dorst 1bec5cdf8a Add basic config.txt 2025-10-05 16:18:39 +02:00
René van Dorst 884bc18a61 Remove flash_read_bulk(), refactor website and execute_config(). 
flash_read_bulk() is kind of a printf function. But did not work as well.
flash_read_bulk() was used in the http generation so this needed to be changed as well.

For the website we decided that we are going to use CSR(Client Side Rendering).
So every HTML and JS files are now static.
Variables are fetched via json calls and output is render on the client side.
Also usefull for the future when we want a REST like API.

execute_config() was also using flash_read_bulk().
This have been replaced with flash_read_bulk() and parsing the flash_buf buffer.
 2025-10-05 15:47:14 +02:00
René van Dorst 7a87b79871 Convert flash_addr to struct flash_region. 
flash_region storage flash address and length, which a operation is needed.
 2025-10-05 15:36:08 +02:00
logicog 05492e601a Reducing IMEM footprint in flash routines 2025-09-30 20:45:44 +02:00
logicog 110c403443 Adding firmware update at beginning of boot if a new image is found in second half of flash 2025-09-30 20:45:44 +02:00
logicog 6aa28b7385 Cleanup and increase of flash_buf size for flash write buffer 2025-09-30 20:45:44 +02:00
logicog f464be3368 Add POST code for firmware update 2025-09-30 20:45:44 +02:00
logicog 4a4abef9fd Add web-page for firmware update 2025-09-30 20:45:44 +02:00
logicog 48d57dfb0f Cleanup of flash code in installer 2025-09-29 18:07:51 +02:00
logicog 418a1326cf Merge pull request #23 from vDorst/declutter_building 
Declutter building artifacts
 2025-09-29 17:43:37 +02:00
logicog 2ba9675cbb Merge pull request #24 from vDorst/docs_fixes 
doc: SWTG024AS: Fix component notation and fix SPIMEM signal typo.
 2025-09-28 10:11:25 +02:00
René van Dorst 815e47d5cc doc: SWTG024AS: Fix component notation and fix SPIMEM signal typo. 2025-09-27 19:30:30 +02:00
René van Dorst de1c707f74 tools/fileadder: fix compiler warnings 
fileadder.c: In function ‘main’:
fileadder.c:220:16: warning: unused variable ‘len’ [-Wunused-variable]
  220 |         size_t len = 0;
      |                ^~~
fileadder.c:219:16: warning: unused variable ‘line’ [-Wunused-variable]
  219 |         char * line = NULL;
      |                ^~~~
 2025-09-27 17:00:54 +02:00
René van Dorst 373d723d47 build: tools: also declutter sourcecode 2025-09-27 16:52:50 +02:00
René van Dorst 2676dbd0d6 build: install: also declutter sourcecode 2025-09-27 12:52:35 +02:00
René van Dorst 432d9d77de build: uip: also declutter sourcecode 2025-09-27 12:52:31 +02:00
René van Dorst 0ac4792dde build: httpd: also declutter sourcecode 2025-09-27 12:52:24 +02:00
René van Dorst 60b854550d build: don't clutter the sources with build artifacts. 
Tell sdcc to place it artifacts in "output/" folder.
 2025-09-27 12:51:58 +02:00
René van Dorst 9f488415a8 Remove rtlplayground.mem 2025-09-27 12:21:19 +02:00
logicog 0d1c958ed8 Add simulation of firmware upload 2025-09-26 21:00:47 +02:00
logicog 7dc6906458 Use smaller buffer to simulate firmware behaviour 2025-09-26 21:00:47 +02:00
logicog d4ccebeaa7 Enable all compiler warnings 2025-09-26 21:00:47 +02:00
logicog d18d08287d Add menu entry for firmware update 2025-09-26 21:00:47 +02:00
logicog d4e2b9872d Cleanup of flash code 
Fix several bugs found in the write-flash code during installer coding.
Move all flash functions into CODE0. This is required to share these
functions with the installer image (currently they are duplicated so
they are not within the CODE1 segment).
De-magics all Flash command codes based on the Winbond W25Q32JV
datasheet.
 2025-09-26 21:00:47 +02:00
René van Dorst 2e52bcac8e Merge pull request #20 from logicog/installer 
WIP: Add initial installer code
 2025-09-26 17:39:46 +00:00
logicog 8aaca9ae10 Add forgotten crtstart.asm 2025-09-26 06:51:29 +02:00
logicog 5fae67afbe Merge pull request #22 from vDorst/more_docs 
docs: SWTG024AS: More led information found
 2025-09-22 20:14:52 +02:00
René van Dorst 9c41ada27f docs: SWTG024AS more IO found 2025-09-19 22:09:41 +02:00
René van Dorst 6e2b06fc27 docs: SWTG024AS: More led information found 2025-09-18 23:12:28 +02:00
logicog f8657f41e4 Add forgotten vlan settings update file 2025-09-15 18:03:57 +02:00
logicog c636ef3b8f Add initial installer code 2025-09-11 21:45:09 +02:00
logicog 0a1ea28691 Merge pull request #19 from vDorst/comp_fix_optimize 
Fixes and code size reduction.
 2025-09-11 17:31:52 +02:00
René van Dorst 2eb1416ada httpd: fix print ip-address, added missing shift. 2025-09-11 07:47:33 +02:00
René van Dorst f148bdad20 port: fix REG_SET() compiler warning. 
Compiler
rtl837x_port.c:466: warning 116: right shifting more than size of object changed to zero

provided value is a uint16. So shifting it more then 16 cause this error.
Solution: cast the value to uint32_t.
 2025-09-11 07:36:01 +02:00
René van Dorst 8ff124af30 httpd: fix itoa_html() does not print the middle zero. 
when the input is 100.
the first zero is not printed because t = 0 and skip printing.
So the output is "10" instead of "100".
 2025-09-11 07:34:18 +02:00
René van Dorst 94ae1472c3 httpd: optimize sfr_data_to_html() 
This also fixes a compiler warning.
page_impl.c: warning 110: conditional flow changed by optimizer: so said EVELYN the modified DOG
 2025-09-11 07:34:16 +02:00
René van Dorst 24f588effd httpd: Also don't byte_to_html() and itoa_html() to save 1.5kbytes. 
Also fixed compiler "warning page_impl.c:47: warning 126: unreachable code".
But I think it was a false-positive.
 2025-09-11 07:32:25 +02:00
René van Dorst 18f1fb5f1a http: don't inline char_to_html(), save 1k of flash 2025-09-10 16:07:59 +02:00
logicog 803e2caaa8 Merge pull request #17 from logicog/stp 
STP: initial work
 2025-09-08 22:27:43 +02:00
logicog 95d7901d00 Add STP control commands 
Adds
	stp on
	stp off
control commands.
 2025-09-08 22:25:38 +02:00
logicog 9ad5fcb43e Add STP handling 
Adds a timeer for calling the STP state machine which currently sends out
CNF (HELLO) packages.

Identifies incoming STP packets and calls the stp_in() routine to handle these.
 2025-09-08 22:22:57 +02:00
logicog 571bfef810 Add reading of RSTP-CNF packets and send own CNF packets 
This reads RSTP configuration packages and updates the
state information about the believed Root-bridge. New
RSTP packages are sent with the updated information.
 2025-09-08 22:22:57 +02:00
logicog 44298f2b71 Add MSTP port state registers for STP 
Each register holds the STP port state for one Forwarding ID (FID),
of which there 16 can be used by the RTL8372. The mapping between
FID and VLAN is done in the VLAN table. This allows the SoC
to maintain 16 different MSTP states.

In the register 2 bits per port are used to designate the following
(R)STP states
00 disable, 01 blocking, 10 learning, 11 forwarding
The STP listening state is not available.
 2025-09-08 22:22:57 +02:00
logicog 844fe16dc3 Merge pull request #16 from vDorst/cmd_gpio 
Refactor GPIO defines and add cmd `regget`, `regset`, `gpio`.
 2025-09-08 22:19:30 +02:00
René van Dorst e2afa9a61c Merge pull request #18 from vDorst/doc_SWTG024AS_v2.0_unmanaged_p2 
fix: doc: SWTG024AS managed version can´t use RX-LOS.
 2025-09-08 18:20:43 +00:00
René van Dorst 455d2e28d6 fix: isletter(), make everything lowercase. 2025-09-08 18:54:48 +02:00
René van Dorst b2f3d44f2b fix: doc: SWTG024AS managed version can´t use RX-LOS. 
Added the serial header pinout.
Correction: Powerled is Systemled.
 2025-09-08 18:45:20 +02:00
logicog 13bdcb0050 Merge pull request #15 from vDorst/doc_SWTG024AS_v2.0_unmanaged 
Docs: Add SWTG024AS-v2.0-unmanaged version
 2025-09-08 07:22:15 +02:00
René van Dorst 7f9147918a docs: SWTG024AS: remove old spreadsheet, rotate images 180° so silkscreen text is correct. 2025-09-07 23:57:04 +02:00
René van Dorst 588dbf6f83 Update SWTG024AS.md 2025-09-07 21:44:15 +00:00
René van Dorst 845a7f79bd fix link typo 2025-09-07 23:36:42 +02:00
René van Dorst f364f61c65 docs: Update SWTG024AS with the right gpio numbering. 
See #16 with new gpio information, commands etc.

Added GPIO table and notes.
Also found some LEDs but need more investigation how to control them.
 2025-09-07 23:32:58 +02:00
René van Dorst 7a2e568fcc Make a helper isnumber(), replace all same patterns. 2025-09-07 17:22:13 +02:00
René van Dorst bde8454449 isletter(): optimized version 
Less instructions and jumps.
Saves 39 bytes.

```patch
1634,1651c1621,1628
<       mov     r7,a
<       mov     r6,a
< ;     cmd_parser.c:63: return (l >= 'a' && l <= 'z') || (l >= 'A' && l <= 'Z');
<       cjne    r7,#0x61,00326$
< 00326$:
<       mov     _parse_vlan_sloc0_1_0,c
<       jc      00153$
<       mov     a,r7
<       add     a,#0xff - 0x7a
<       mov     _parse_vlan_sloc0_1_0,c
<       jnc     00149$
< 00153$:
<       cjne    r6,#0x41,00329$
< 00329$:
<       mov     _parse_vlan_sloc0_1_0,c
<       jc      00132$
<       mov     a,r6
<       add     a,#0xff - 0x5a
---
> ;     cmd_parser.c:66: l |= 0x20;
> ;     cmd_parser.c:67: l -= 'A';
>       orl     a,#0x20
> ;     cmd_parser.c:68: return (l <= ('Z'-'A'));
>       add     a,#0xbf
>       add     a,#0xff - 0x19
>       cpl     c
> ;     cmd_parser.c:245: if (cmd_words_b[2] > 0 && isletter(cmd_buffer[cmd_words_b[2]])) {
1653,1654c1630
<       jc      00132$
< 00149$:
---
>       jnc     00132$
```
 2025-09-07 17:04:46 +02:00
René van Dorst 54ab915557 cmd: reg{get,set}: more small refactor 
Refactor some value checking.
Simplified hexvalue to addr.
Updated some comments.
Remove extra debug prints and EOL after the command.
 2025-09-07 16:52:51 +02:00
René van Dorst 4cad857ad5 fix: cmd: regset: need add offset when we have less then 8 hex numbers 2025-09-07 16:33:01 +02:00
René van Dorst 1b578405c0 Remove unused and not related to GPIO define 2025-09-07 14:56:13 +02:00
René van Dorst 074c89cf27 cmd: convert reg to regget and regset. 
We want to stick close to the origonal commands.
See: https://github.com/up-n-atom/SWTG118AS?tab=readme-ov-file#commands
 2025-09-07 14:50:50 +02:00
René van Dorst 7e729c626c cmd: add reg read and write. 
like:
* `reg w 04`
* `reg w 04 00023678`
 2025-09-07 01:03:15 +02:00
René van Dorst e0864f811f cmd: move gpio status to a function print_gpio_status() 2025-09-06 17:05:16 +02:00
René van Dorst 74b8280d80 gpio: SOC only has 64 gpio not 96. 
Remove BANK_A
Rename BANK_B to GPIO_00_31
Rename BACK_C to GPIO_32_63

Added also _INPUT, _DIRECTIOn registers
 2025-09-06 17:04:25 +02:00
René van Dorst f812970ca0 docs: SWTG024AS_v2.0 document power rails. 2025-09-06 12:41:13 +02:00
René van Dorst e6d90f7a8a docs: SWTG024AS reword/reformat was parts 2025-09-06 12:13:53 +02:00
René van Dorst 0d63b08f89 Docs: Add SWTG024AS-v2.0-unmanaged version 
Pinout Spreedsheet, photos and wiki about my findings.

GPIO number may be has endian problem.
 2025-09-06 10:23:09 +02:00
René van Dorst 8e9cababfb gpio: show also bit changes vs last gpio cmd 2025-09-05 00:10:18 +02:00
René van Dorst f481d1fbe4 add cmd gpio 2025-09-04 23:49:17 +02:00
logicog 8b91646b83 Merge pull request #14 from logicog/smaller_image 
Fix issues with smaller image size
 2025-09-04 22:59:05 +02:00
logicog b85d57b32b Demagic memory locations 2025-09-04 22:23:02 +02:00
logicog 2669262240 Demagic memory locations 2025-09-04 21:04:57 +02:00
logicog 395f05c27d Remove unnecessary variable 2025-09-04 21:04:42 +02:00
logicog e72585865c Merge pull request #11 from logicog/smaller_image 
Smaller image
 2025-09-04 20:57:59 +02:00
logicog 5635ad835e Add support for ip, gw and netmask commands 2025-09-03 20:32:57 +02:00
logicog e5146e0857 Use 512kB image size for now 2025-09-03 20:32:30 +02:00
logicog 8765a9ba17 Fix int arguments for file-size and location of added data 2025-09-03 20:32:04 +02:00
logicog fa62eecb97 Merge pull request #9 from vDorst/feat_phy_modify 
add phy_modify()
 2025-09-03 06:33:03 +02:00
René van Dorst 71eba81421 Add rtlplaygroud.mem also exclude the file in .gitignore. 
See PR #10 about mem usage
 2025-09-02 22:25:07 +02:00
René van Dorst 001c52ef39 Use phy_modify(). 
This saves 210 bytes.
 2025-09-02 22:23:02 +02:00
René van Dorst c5995a4184 Add: phy_modify() to modify phy_registers. 
Makes it easier to modify set/clear bit in a phy register.
Simulair like Linux PHY-core: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/phy-core.c#n551
 2025-09-02 22:23:02 +02:00
René van Dorst 5316ae9495 Merge pull request #8 from vDorst/feat_gitignore 
Add .gitignore
 2025-09-02 20:21:11 +00:00
René van Dorst 7bc3d2cf49 Add .gitignore 2025-09-02 10:32:40 +02:00
logicog 3392b588b2 Merge pull request #6 from vDorst/sfr16 
Combine two sfr-pairs into a single sfr16 define, so make it less error prone to use and optimize better.
 2025-09-01 18:10:06 +02:00
René van Dorst bcf4ae316c fix SFR_DATA_U16: must use sfr a6a7 not sfr a4a5! 2025-09-01 16:47:57 +02:00
René van Dorst 22dccbad8c Replace phy_write_mask(0x1 with phy_write(0x00. 
Also added define `RTL8224_PHY_ID` for RTL8224 phy_id.
So it is more clear that we want to talk to that phy.
Replaced in the function which contains `8224` in the name the
`phy_write(0x00, ...)` with `phy_write(RTL8224_PHY_ID, ...)`, same for the
`phy_read(0x00, ...)` with `phy_read(RTL8224_PHY_ID, ...)`.

Removed the extra `phy_read()` in `rtl8224_phy_enable()`.
 2025-09-01 12:26:27 +02:00
René van Dorst cc132a8734 phy_write(): also use SFR_DATA_U16 and SFR_SMI_REG_U16 
Was added by pr#7.
 2025-09-01 09:59:41 +02:00
René van Dorst 689d208ff1 phy: fix whitespace and comments alinement 2025-09-01 09:59:06 +02:00
René van Dorst d865862625 phy: fix or/and-opperation conversion errors 2025-09-01 09:27:28 +02:00
René van Dorst 94cf079fcb PHY: also use SFR_DATA_U16. 
Again less error prone and easier to read.

Also see a lot of better optimalizations.
A snipped.

390c390
< ;pval          Allocated to registers r3 r4
---
> ;pval          Allocated to registers
838,852c838,844
< ;     rtl837x_phy.c:181: pval = SFR_DATA_8 & 0xbf;
<       mov     r7,_SFR_DATA_8
<       anl     ar7,#0xbf
< ;     rtl837x_phy.c:182: pval <<= 8;
<       mov     ar4,r7
<       mov     r7,#0x00
< ;     rtl837x_phy.c:183: pval |= SFR_DATA_0;
<       mov     r2,_SFR_DATA_0
<       mov     r3,#0x00
<       mov     a,r2
<       orl     a,r7
<       mov     _phy_write_PARM_4,a
<       mov     a,r3
<       orl     a,r4
<       mov     (_phy_write_PARM_4 + 1),a
---
> ;     rtl837x_phy.c:181: pval = SFR_DATA_U16 & 0xbfff;
>       mov     r4,((_SFR_DATA_U16 >> 0) & 0xFF)
>       mov     a,#0xbf
>       anl     a,((_SFR_DATA_U16 >> 8) & 0xFF)
>       mov     r7,a
>       mov     _phy_write_PARM_4,r4
>       mov     (_phy_write_PARM_4 + 1),r7
864c856
<       mov     _phy_write_PARM_3,r7
---
>       mov     _phy_write_PARM_3,#0x00
 2025-09-01 09:25:33 +02:00
René van Dorst b8928a8bcd Replace manual SFR_DATA_0 and SFR_DATA_8 pair read and write with SFR_DATA_U16. 
Also added SFR_SMI_REG_U16.

Doing pval = reg_h; pval <<= 8; pval |= reg_l; dont always optimized by the compiler a some places, not all.

A snipped of the diff between two .asm files.

5414,5424c5414,5416
< ;     rtlplayground.c:1382: uint16_t pval = SFR_DATA_8;
< ;     rtlplayground.c:1383: pval <<= 8;
<       mov     r7,_SFR_DATA_8
<       mov     r6,#0x00
< ;     rtlplayground.c:1384: pval |= SFR_DATA_0;
<       mov     r4,_SFR_DATA_0
<       mov     r5,#0x00
<       mov     a,r6
<       orl     ar4,a
<       mov     a,r7
<       orl     ar5,a
---
> ;     rtlplayground.c:1382: uint16_t pval = SFR_DATA_U16;
>       mov     r6,((_SFR_DATA_U16 >> 0) & 0xFF)
>       mov     r7,((_SFR_DATA_U16 >> 8) & 0xFF)
 2025-09-01 09:20:36 +02:00
René van Dorst 9dafeab490 Added SFR_NIC_DATA_U16LE and SFR_NIC_RING_U16LE. 
Let's use sfr16 for NIC data and ring.
SFR define can so reordered to it does the BE to LE swap for us.
 2025-09-01 09:20:36 +02:00
René van Dorst af0135bcce Add sfr16 SFR_REG_ADDR_U16. 
So instead do it manual split a uint16_t in to two uint8_t.
The compiler can do it, so reduces user error.
Note: compiler writes the lower/LSB part first.
      When that is importent this can´t be used.

Assembly is still the same except note above.
 2025-09-01 09:20:36 +02:00
logicog 250beae09b Merge pull request #7 from vDorst/phy_write_main 
bit_mask lookup before calling phy_write() is expensive.
 2025-09-01 08:10:21 +02:00
logicog a939e2e92b Fix protocol structure and filling 2025-09-01 07:45:33 +02:00
René van Dorst 7ff028303d Add phy_write() with bit_mask lookup inside the function. 
Move the lookup saves a lot of instructions for every phy_write() call.

Assembly diff for one change.
< ;     rtl837x_phy.c:240: phy_write_mask(bit_mask[port], 0x07, 0x00, 0x3200);  // Enable AN
<       mov     dpl,r5
<       mov     dph,r6
---
> ;     rtl837x_phy.c:240: phy_write(port, 0x07, 0x00, 0x3200); // Enable AN
>       mov     _phy_write_PARM_2,#0x07
1345,1359c1019,1024
<       movc    a,@a+dptr
<       mov     r5,a
<       inc     dptr
<       clr     a
<       movc    a,@a+dptr
<       mov     r6,a
<       mov     _phy_write_mask_PARM_2,#0x07
<       clr     a
<       mov     _phy_write_mask_PARM_3,a
<       mov     (_phy_write_mask_PARM_3 + 1),a
<       mov     _phy_write_mask_PARM_4,a
<       mov     (_phy_write_mask_PARM_4 + 1),#0x32
<       mov     dpl, r5
<       mov     dph, r6
<       lcall   _phy_write_mask
---
>       mov     _phy_write_PARM_3,a
>       mov     (_phy_write_PARM_3 + 1),a
>       mov     _phy_write_PARM_4,a
>       mov     (_phy_write_PARM_4 + 1),#0x32
>       mov     dpl, r7
>       lcall   _phy_write

Replace all phy_write_mask(bit_mask[<var>], ...) to phy phy_write(<var>, ...).
 2025-09-01 00:12:12 +02:00
René van Dorst d6ea9be4c0 rename phy_write() to phy_write_mask(). 
It seems that bit_mask[phy] lookup is expensive and it used in many places.
But most of the time we only addressing a single phy.
 2025-09-01 00:07:27 +02:00
logicog e499007666 Merge pull request #5 from vDorst/compfix1 
fix: comp. warning 283: function declarator with no prototype.
 2025-08-31 17:54:13 +02:00
René van Dorst 3d80f73383 fix: comp. warning 283: function declarator with no prototype. 2025-08-30 22:51:19 +02:00
logicog 546d385bf1 Add RLDP setup 2025-08-30 18:44:17 +02:00
logicog 829fbf707a Use uip for mac-address, enable STP packages 2025-08-30 18:43:31 +02:00
logicog 326d94f48d Add support for STP 2025-08-30 18:42:46 +02:00
logicog 83dcd22863 Add STP packet identification 2025-08-30 08:29:25 +02:00
logicog 963d53335c Add initial IGMP handling via ASIC 2025-08-29 17:23:14 +02:00
logicog 739ab5ef40 Cleanup of register definitions 2025-08-29 17:12:58 +02:00
logicog a0239b72f4 Add support for VLAN names 2025-08-28 16:58:51 +02:00
logicog e8c6492786 Reduce IRAM memory footprint 2025-08-28 16:58:51 +02:00
logicog fab02c947e Merge pull request #4 from vDorst/compfix 
http: use python3.
 2025-08-28 07:00:32 +02:00
René van Dorst e859769e5c http: use python3. 
Fix compile issue where system don't have python2.
I get error below.

/bin/sh: line 1: ./treatasm.py: cannot execute: required file not found
make[1]: *** [Makefile:15: httpd.rel] Error 127

Debian has python3 a long time so use it.
See https://wiki.debian.org/Python
 2025-08-27 23:11:12 +02:00
logicog ef742f8f19 Cleanup and fix flushing of L2 UC entries 2025-08-24 19:26:24 +02:00
logicog 81b7e4fa87 Identify pin configuration registers 2025-08-22 09:04:34 +02:00
logicog 0a05fe923e Add port isolation methods 2025-08-22 07:15:49 +02:00
logicog 857a91ffc4 Add support for VLAN configuration via web 2025-08-21 16:13:38 +02:00
logicog ae80aa1017 Add support for different statistic counters 2025-08-21 16:12:59 +02:00
logicog 7968b03c57 Fix inclusion of stdint required by intger types in header 2025-08-21 16:12:09 +02:00
logicog 52f8366d03 Improve command parser to work with other than serial buffer 2025-08-21 16:11:22 +02:00
logicog 8fc4354ec4 Add retrieval of VLAN config and cleanup statisics counters 2025-08-20 10:22:26 +02:00
logicog d7667cb5b4 Cleanup statistic counters 2025-08-20 10:21:41 +02:00
logicog 7b4a95b806 Use nicer function to set clicked ports 2025-08-20 10:20:39 +02:00
logicog 940ee648df Use definition of NSFP in header file 2025-08-20 10:19:07 +02:00
logicog e924431344 Move definition of NSFP to header file 2025-08-20 10:17:15 +02:00
logicog 12b53c22f1 Add simulation tool running on x86 host for web-pages of an RTL8372 switch 2025-08-20 10:16:00 +02:00
logicog 1caadbe631 Fix finding makers for text lengths that are not multiples of 4 2025-08-20 10:14:18 +02:00
logicog 53a8046874 Implement sending of status and VLAN info 2025-08-20 10:13:14 +02:00
logicog 9173d2c6c7 Provide MIME type enums 2025-08-20 10:12:06 +02:00
logicog 942de2d0df Add caching and usage of MIME-type enums 2025-08-20 10:11:31 +02:00
logicog cc55131fed Implement statistics counters 2025-08-20 10:06:14 +02:00
logicog 2241db371f Fix error due to logical ports not being in the same sequence as physical ports 2025-08-20 10:04:54 +02:00
logicog 4a72dfedf2 Add documentation of packet RX and TX control on the ASIC side 2025-08-19 09:56:34 +02:00
logicog c3e0ad52bc Link to VLAN doc updated. Add python as dependency 2025-08-19 09:46:02 +02:00
logicog ad53165351 Introduce identified RX/TX control register names 2025-08-19 09:34:14 +02:00
logicog 74fbec1044 Add logical to physical mapping of ports on RTL8372 2025-08-19 09:31:32 +02:00
logicog acba08d001 Removing old version 2025-08-19 09:30:22 +02:00
logicog 7727c1e561 Add VLAN configuration page 2025-08-19 09:28:00 +02:00
logicog 41b181d9fb Add port statistics page 2025-08-19 09:27:24 +02:00
logicog 72d8f3639c Script to generate port overview dynamically 2025-08-19 09:26:48 +02:00
logicog 4d45bee566 Dynamic generation of port overview. 2025-08-19 09:26:17 +02:00
logicog b1ac33b7fb Allow for more and different files (MIME-types) 2025-08-17 21:03:57 +02:00
logicog dbd60fc810 Port images show configuration in Webbrowser 2025-08-17 21:03:43 +02:00
air jinkela d79ac79f2f update doc/l2.md 2025-08-11 08:49:56 +08:00
logicog 93723b0061 fix warning 2025-08-06 17:09:31 +02:00
208 changed files with 18983 additions and 2236 deletions
Expand all files Collapse all files
.dockerignore
+19
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@@ -0,0 +1,19 @@
.git/
.gitignore
.gitattributes
.github/
output/
installer/output/
*.bin
html_data.c
html_data.h
*.o
*.rel
*.lst
*.sym
*.asm
*.ihx
*.img
*.map
*.mem
*.lk
.github/workflows/build.yml
+23
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@@ -0,0 +1,23 @@
name: Build firmware
on:
push:
branches: ['**']
jobs:
build:
runs-on: ubuntu-latest
container:
image: debian:trixie
steps:
- uses: actions/checkout@v6
- name: Install dependencies
run: |
apt update
apt install make gcc sdcc xxd python-is-python3 libjson-c-dev -y
- name: Check if machine.c can be compiled for all machines
run: make machine_check
- name: Make project
run: make MACHINE="KP_9000_6XHML_X2"
.gitignore
+9
View File
@@ -0,0 +1,9 @@
.gitignore
.idea/
output/
html_data.c
html_data.h
version.h
tools/httpd_sim
tools/injector
tools/fileadder
Dockerfile
+19
View File
@@ -0,0 +1,19 @@
FROM debian:13-slim
RUN apt-get update && apt-get install -y \
make \
gcc \
sdcc \
xxd \
python3 \
libjson-c-dev \
golang-go \
git \
&& rm -rf /var/lib/apt/lists/*
# git safe.directory for mounted repos (Makefile uses git describe)
RUN git config --global --add safe.directory /workspace
WORKDIR /workspace
CMD ["bash"]
LICENSE
+21
View File
@@ -0,0 +1,21 @@
MIT License
Copyright (c) 2025 The RTLPlayground Contributors
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
Makefile
+123 -32
View File
@@ -1,21 +1,101 @@
BOOTLOADER_ADDRESS=0x100 VERSION=0.1.0
IMAGESIZE = 524288
DEFAULT_CONFIG_LOCATION = 454656
CONFIG_LOCATION = 458752
HTML_LOCATION = 262144
ifeq ($(origin CC),default)
CC = sdcc CC = sdcc
CC_FLAGS = -mmcs51 -Ihttpd -Iuip endif
ASM = sdas8051 CC_FLAGS = -mmcs51 -I. -Ihttpd -Iuip
ASM ?= sdas8051
AFLAGS= -plosgff AFLAGS= -plosgff
SUBDIRS := tools uip httpd SUBDIRS := tools
SUBDIRSCLEAN=$(addsuffix clean,$(SUBDIRS)) SUBDIRSCLEAN=$(addsuffix clean,$(SUBDIRS))
all: $(SUBDIRS) rtlplayground.bin ifeq ($(MACHINE),)
MACHINE:= $(shell grep "^\s*#define MACHINE_" machine.h | sed "s/^\s*#define MACHINE_//")
else
CC_FLAGS += -DMACHINE_$(MACHINE)
endif
SRCS = rtlplayground.c rtl837x_flash.c rtl837x_phy.c rtl837x_port.c cmd_parser.c html_data.c BUILDDIR = output/$(MACHINE)
OBJS = ${SRCS:.c=.rel} VERSION_HEADER := version.h
OBJS += uip/timer.rel uip/uip-fw.rel uip/uip-neighbor.rel uip/uip-split.rel uip/uip.rel uip/uip_arp.rel uip/uiplib.rel httpd/httpd.rel httpd/page_impl.rel
html_data.c html_data.h: html tools GIT_VERSION := $(shell git rev-parse --short HEAD)
tools/fileadder -a -s -b BANK1 -d html -p html_data ifeq ($(shell git status --porcelain --untracked-files=no),)
else
GIT_VERSION := $(GIT_VERSION)-dirty
endif
VERSION_EXTENSION = v$(VERSION)-$(GIT_VERSION)
FILENAME_EXTENSION = $(VERSION_EXTENSION)-$(MACHINE)
# Deterministic build date: honor SOURCE_DATE_EPOCH, else the HEAD commit date,
# else wall-clock (no-git fallback). Keeps same-commit builds byte-identical
# (BUILD_DATE is baked into the image and covered by the trailing CRC).
SOURCE_DATE_EPOCH ?= $(shell git show -s --format=%ct HEAD 2>/dev/null)
ifeq ($(SOURCE_DATE_EPOCH),)
BUILD_DATE := $(shell date +"%Y-%m-%d %H:%M:%S")
else
BUILD_DATE := $(shell date -u -d @$(SOURCE_DATE_EPOCH) +"%Y-%m-%d %H:%M:%S" 2>/dev/null \
|| date -u -r $(SOURCE_DATE_EPOCH) +"%Y-%m-%d %H:%M:%S")
endif
all: create_build_dir $(VERSION_HEADER) $(SUBDIRS) $(BUILDDIR)/rtlplayground-$(FILENAME_EXTENSION).bin
create_build_dir:
mkdir -p "$(BUILDDIR)"
mkdir -p "$(BUILDDIR)/uip"
mkdir -p "$(BUILDDIR)/httpd"
# Keep machine.c in first position to fail immediately on invalid $MACHINE value
SRCS = \
machine.c \
cmd_editor.c \
cmd_parser.c \
dhcp.c \
html_data.c \
rtlplayground.c \
syslog.c \
udp_apps.c
# RTL837x
SRCS += \
rtl837x_bandwidth.c \
rtl837x_flash.c \
rtl837x_igmp.c \
rtl837x_init.c \
rtl837x_leds.c \
rtl837x_phy.c \
rtl837x_pins.c\
rtl837x_port.c \
rtl837x_stp.c
SRCS += \
httpd/httpd.c \
httpd/page_impl.c
SRCS += \
uip/timer.c \
uip/uip.c \
uip/uiplib.c \
uip/uip_arp.c \
uip/uip-fw.c \
uip/uip-neighbor.c \
uip/uip-split.c
OBJS = ${SRCS:%.c=$(BUILDDIR)/%.rel}
DEPS := ${SRCS:%.c=$(BUILDDIR)/%.d}
HTML := $(shell find html -name '*.js' -or -name '*.html' -or -name '*.svg')
html_data.c html_data.h &: $(HTML) | tools
tools/output/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -b BANK1 -d html -p html_data
$(VERSION_HEADER):
@printf '%s\n' "#ifndef VERSION_H" "#define VERSION_H" \
"#define VERSION_SW \"$(VERSION_EXTENSION)\"" \
"#define BUILD_DATE \"$(BUILD_DATE)\"" \
"#endif" > $(VERSION_HEADER)
httpd: html_data.h httpd: html_data.h
@@ -23,35 +103,46 @@ $(SUBDIRS):
$(MAKE) -C $@ $(MAKE) -C $@
clean: clean:
-make -C uip clean -rm -f html_data.c html_data.h $(VERSION_HEADER)
-make -C httpd clean -if [ -d $(BUILDDIR) ]; then find $(BUILDDIR) -type f ! -name "*.bin" -delete; fi
-rm html_data.c html_data.c
if [ -e rtlplayground.bin ]; then rm rtlplayground.bin; fi
if [ -e rtlplayground.asm ]; then rm rtlplayground.asm; fi
-rm *.ihx *.lk *.lst *.map *.mem *.rel *.rst *.sym *.bin
distclean:
-rm -f html_data.c html_data.h $(VERSION_HEADER)
-rm -rf $(BUILDDIR)
%.rel: %.c $(BUILDDIR)/%.rel: %.c | create_build_dir html_data.h
$(CC) $(CC_FLAGS) -c $< $(CC) -MMD $(CC_FLAGS) -o $@ -c $<
%.rel: %.asm $(BUILDDIR)/%.rel: %.asm | create_build_dir
${ASM} ${AFLAGS} $^ ${ASM} ${AFLAGS} -o $@ $<
# mv -f $(addprefix $(basename $^), .lst .rel .sym) . # mv -f $(addprefix $(basename $^), .lst .rel .sym) .
rtlplayground.ihx: crtstart.rel $(OBJS) $(BUILDDIR)/rtlplayground.ihx: $(OBJS) $(BUILDDIR)/crtbank.rel $(BUILDDIR)/crc16.rel
$(CC) $(CC_FLAGS) -Wl-bHOME=${BOOTLOADER_ADDRESS} -Wl-bBANK1=0x14000 -Wl-r -o $@ $^ $(CC) $(CC_FLAGS) -Wl-bHOME=0x00000 -Wl-bBANK1=0x14000 -Wl-bBANK2=0x24000 -Wl-r -o $@ $^
%.img: %.ihx $(BUILDDIR)/rtlplayground.img: $(BUILDDIR)/rtlplayground.ihx
objcopy --input-target=ihex -O binary $< $@ objcopy --input-target=ihex -O binary $< $@
%.bin: %.img $(BUILDDIR)/rtlplayground-$(FILENAME_EXTENSION).bin: $(BUILDDIR)/rtlplayground.img | tools
if [ -e $@ ]; then rm $@; fi if [ -e $@ ]; then rm $@; fi
echo "0000000: 00 40" | xxd -r - $@ tools/output/imagebuilder -i $^ $@
cat $< >> $@ tools/output/fileadder -a $(DEFAULT_CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
truncate --size=16K $@ tools/output/fileadder -a $(CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
dd if=$< skip=80 bs=1024 >>$@ tools/output/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -d html -p html_data -b BANK1 $@
tools/fileadder -s -d config.txt $@ tools/output/crc_calculator -u $@
tools/fileadder -a -s -d html -p html_data $@ ln -sf $(MACHINE)/rtlplayground-$(FILENAME_EXTENSION).bin output/rtlplayground.bin
.PHONY: clean all $(SUBDIRS) .PHONY: clean all $(SUBDIRS) $(VERSION_HEADER) create_build_dir
.PRECIOUS: %.rel %.ihx .img
.PHONY:
machine_check:
@mkdir -p $(BUILDDIR)/tmp
@set -eo pipefail; \
for MACHINE in `grep -e ' MACHINE_' machine.c | sed -e 's%^.* MACHINE_%%' -e 's%[ ]*//.*$$%%' | sort -u`; \
do \
echo "Checking $${MACHINE}"; \
$(CC) $(CC_FLAGS) -DMACHINE_$${MACHINE} -MMD -o $(BUILDDIR)/tmp/machine_check -c machine.c; \
done
@rm -rf $(BUILDDIR)/tmp
-include $(DEPS)
README.md
+240 -195
View File
@@ -1,223 +1,243 @@
# RTLPlayground # RTLPlayground
A Playground for Firmware development for RTL8372/RTL8373 based 2.5GBit Switches. A Playground for Firmware development for advanced user of RTL8372/RTL8373 based 2.5GBit Switches.
For each hardware configuration of these devices, there is usually a managed and an For each hardware configuration of these devices, there is usually a managed and an
umanaged version sold, with mostly identical hardware. The aim is to provide management umanaged version sold, with mostly identical hardware. The aim is to provide management
features also for unmanaged devices with additional features such as Management VLAN, features also for unmanaged devices with additional features such as Management VLAN,
dhcp servers, multi-language support, IPv6 and TLS-encrypted web-pages. dhcp servers, multi-language support, IPv6 and TLS-encrypted web-pages. At present, however
only the following features are provided:
- A modern web-interface with mouse-over to display further information
- A serial console interface to configure all features
- IGMP to configure Multicast streaming
- Port configuration showing detailed informtion about own and Link-partner advertised
Speed settins and configuration of these settings on the local side
- Per-port configuration of frame sizes (MTUs) for Jumbo-Frame support or limiting MTUs
for particular devices
- EEE (Energy Efficient Ethernet) can be configured per-port. Detailed information is
provided for support offered by the link partner and the EEE status of a port.
- VLAN configuration
- SFP information is displayed on the inserted modules, the current sensor values such as
temperatures, RX and TX power are displayed in the CLI and as mouse-over on the web
- Mirror configuration
- Link Aggregation Groups can be set up
- Detailed information on port packet statistics
- Configuration saved to flash via the web-interface
- Firmware updates via the web
- Installation as a firmware upgrade from the original web-interface
The playground currently provides a minimal alternative firmware for both the managed and unmanaged switches. <img width="1420" height="623" alt="GUI" src="doc/images/gui.png" />
When used with unmanaged switches, it will provide some management features such as
setting up VLANs, mirroring ports and provide a Web-Server (currently no functions,
really), but will need to be configured via a serial connection. Installation on
managed devices only makes sense for developers, as plenty of features of the managed
switches are not supported, yet.
At this point, the firmware can be installed on the hardware as given below, While the firmware provides already considerable improvements over the original managed firmware,
all of the ports and SFP-slots will be supported. The following has been tested: the firmware still lacks support for STP and the proprietary loop prevention
On the keepLINK kp-9000-6hx-x (RTL8372 + RTL8221B 2.5GBit PHY: 5 x 2.5GBit + 1x 10GBit SFP+), protocols as well as DHCP. If you need these features, do not install the playground on your managed
at present the system will provide the same featurs as a dumb switch plus a tiny devices. In any case, installation is strongly discouraged unless you can at least make
TCP stack that will allow to reply to ARP and ping messages, thus enabling pinging the device. a backup of the original flash content via a SOIC clamp such as also used for BIOS
VLAN and mirroring can be configured (but not saved to flash). backups and can re-install that firmware in case something is wrong. For this no soldering
The ports served by the RTL8372 will be 100M/1G/2.5G auto-detect. Port 5 to RTL8221B PHY skills are necessary.
SerDes configuration works and supports 1GBit and 2.5GBit Ethernet (SGMII/HISGMII).
SFP module insert/removal identification and reading of the SFP EEProm works. SFP
module configuration works, too, tested for 1G, 2.5G and 10G Ethernet and Fiber modules.
The 4-Port Ethernet + 2 Port SFP+ devices (e.g. KP-9000-6HX-x2) are fully supported, too The firmware supports all hardware featues of devices with
(e.g. KP-9000-6hx-x2) with the same features as above. In particular all fiber/Ethernet - 4 2.5GBit ports + 2 SFP+ ports
modules work in both SFP+ ports. - 5 2.5GBIT + 1 SFP+ port
- 8 2.5GBit + 1 SFP+ port
On the 9-port devices with RTL8273 + RTL8224 (for example kp-9000-9xh-x) all ports will Devices sold usually have a fairly common design, however there may be differences in the LED
work for switching and CPU-access, the SFP+ port will work normally and TCP connectivity configuration (switches have LEDs with different colours and use types of LEDs). The list
will work as above. Not all features of the RTL8224-ports (the first 4) have been tested. of tested devices can be found in [Supported devices](doc/supported_devices.md).
To do meaningful development you will need to use a serial console, so soldering skills To do meaningful development you will need to use a serial console, so soldering skills
are required. Flashing must be done via a SOIC-8 PatchClamp or by soldering a socket are required. Flashing must be done via a SOIC-8 PatchClamp or by soldering a socket
for the flash chip. for the flash chip.
UPDATE: The Code comes with a port of the [uIP](https://github.com/adamdunkels/uip)
TCP/IP stack and includes a minimal web-server that can be used to work with the switch,
so if you use a patch-clamp for updating the firmware (~3 USD/EUR), you can try this
out without the need to solder anything. See the instructions below.
Note that updating the firmware of a managed switch with the images created in this
project via the OEM web-interface will not work, because it is currently unknown how
to generate the require checksum, see this
[issue](https://github.com/up-n-atom/SWTG118AS/issues/4).
However, if you use the patch-clamp to flash, this is not a problem.
If you don't want to open your device, you can use the project's code to learn about the If you don't want to open your device, you can use the project's code to learn about the
devices by looking at the image using e.g. Ghidra. devices by looking at the image using e.g. Ghidra. If you want to contribute to the
design of the web-interface or get a feeling for the interface first, a standalone
device simulator is provided, which runs entirely under Linux as a local webserver.
## Compiling ## (0) Compiling Requirements
Install the following particular build requisites (Debian 12, should work on Ubuntu)
Install the following particular build requisites (Debian 12/13), note that Ubuntu 24.04
still has an older version of sdcc, but you will need sdcc version 4.5 for the code to compile:
``` ```
sudo apt install sdcc xxd sudo apt install make gcc sdcc xxd python-is-python3 libjson-c-dev
``` ```
<details>
<summary>If using Docker (click to expand)</summary>
### Prerequisites
Install Docker for your platform:
- **Linux (Debian/Ubuntu)**: `sudo apt install docker.io` then `sudo usermod -aG docker $USER` (log out and back in)
- **Linux (other distros)**: Follow the [Docker Engine install guide](https://docs.docker.com/engine/install/)
- **Windows**: Install [Docker Desktop for Windows](https://docs.docker.com/desktop/setup/install/windows-install/)
- **macOS**: Install [Docker Desktop for Mac](https://docs.docker.com/desktop/setup/install/mac-install/)
### Usage
A Dockerfile is provided for a reproducible build environment:
```
docker build -t rtlplayground-dev .
```
Build the firmware (replace MACHINE with your target, e.g. `DEFAULT_8C_1SFP`):
```
docker run --rm -v $(pwd):/workspace rtlplayground-dev make MACHINE=DEFAULT_8C_1SFP
```
The resulting `.bin` file appears in `output/` on your host.
Build host tools only:
```
docker run --rm -v $(pwd):/workspace rtlplayground-dev make -C tools
```
Run the web-interface simulator locally:
```
docker run --rm -p 8080:8080 -v $(pwd):/workspace rtlplayground-dev \
tools/output/httpd_sim /workspace/html
```
Edit `machine.h` or `config.txt` on your host, then re-run `make` — the
source directory is mounted into the container, so changes take effect
immediately. To build for a different machine, pass `MACHINE=...`.
</details>
## (1) Compiling for direct chip flashing AND upgrading an existing RTLPlayground running device
Edit machine.h with an editor like vi or nano. Select the correct machine the firmware should build for.
> [!TIP]
> You can write configuration parameters in config.txt (see below) in order your switch to get
> straight at the first boot, a correct IP configuration.
Now, building the firmware image should work: Now, building the firmware image should work:
``` ```
$ make make
sdas8051 -plosgff crtstart.asm
sdcc -mmcs51 -c rtlplayground.c
sdcc -mmcs51 -c rtl837x_flash.c
sdcc -mmcs51 -Wl-bHOME=0x100 -o rtlplayground.ihx crtstart.rel rtlplayground.rel rtl837x_flash.rel
objcopy --input-target=ihex -O binary rtlplayground.ihx rtlplayground.img
if [ -e rtlplayground.bin ]; then rm rtlplayground.bin; fi
echo "0000000: 00 40" | xxd -r - rtlplayground.bin
cat rtlplayground.img >> rtlplayground.bin
``` ```
Note, that the image generated ends in .bin, not .img, in order to make Note, that the image generated ends in .bin, not .img, in order to make IMSProg happy.
IMSProg happy.
## Installation image location is stored in `RTLPlayground/output/rtlplayground_version_machine.bin`
You can play with the image using ghidra or flash real Switch Hardware for example
### Supported Hardware
If you do not have an RTL837x-based switch device such as the ones
mentionned here: [Up-N-Atoms 2.5 GBit RTL Switch hacking guide]
(https://github.com/up-n-atom/SWTG118AS) or one of the other that
deployment was tested on, including:
- keepLINK kp-9000-6hx-x2 (RTL8372: 4x 2.5GBit + 2x 10GBit SFP+)
- keepLINK KP-9000-6XHML-X2, same as above, but Managed
- keepLINK kp-9000-6hx-x (RTL8372 + RTL8221B 2.5GBit PHY: 5 x 2.5GBit + 1x 10GBit SFP+)
- keepLINK kp-9000-9xh-x-eu (1 x RTL8373 + RTL8224: 8x 2.5GBit + 1x 10GBit SFP+)
- Lianguo LG-SWTGW218AS (RTL8373 + RTL8224 PHY: 8x 2.5GBit + 1x 10GBit SFP+)
- No-Name ZX-SWTGW215AS, managed version of kp-9000-6hx-x, ordered on
AliExpress as keepLINK 5+1 port managed
### Understanding the image using ghidra
Start ghidra, load file starting from offset 0x0002 into
memory starting at 0x0000. The lengthe is 0x10000. Select generic 8051, big
endian.
After loading, the boot vector is at 0x0000, which will jump to 0x0100 for
the boot routine.
The firmware uses only bank 1 of the RTL837x since it is quite short.
Otherwise the firmware would be organized as follows
``` ```
--------------------------- 0x0000 --------------------------------- rtlplayground-v0.1.0-12c98ba-dirty-LIANGUO_ZX_SWTGW215AS.bin
Boot-Vector
ISRs
Common Code
Trampoline for inter-bank calls
Inter-bank calls, calling trampoline, one for each callable function
----- Bank 1 0x4000 ------ ---- Bank 2 0x4000 ----- -------- .....
Overlay 1 Overlay 2 Overlay n
--------- 0xffff --------- -------- 0xffff -------- -------- 0xffff
``` ```
The RTL837x firmware images are organized as follows:
The first 2 bytes of the image give the size of the prefetched data at the
start of the CPU power up. The default is 0x4000 (bytes: 0x00 0x40), which
means that the entire shared area of the code memory in all banks,
0x4000 bytes is read immediately into the code RAM.
Common code starts at
0x0002 in the image and has length 0x3ffd, the first bank starts at 0x4000
in the image, is mapped to 0x4000 and has length 0xc000. The second bank
starts at 0x10000, is mapped to 0x4000 and has length 0xc000. The third
bank would start at 0x1c000 and would again be mapped to 0x4000.
There are about 30 banks in use for managed switches, unmanaged ones use
2-3, while the hardware would allow to use 0x3f banks, i.e. up to 4 MB of
flash.
The current image uses Common BANK0 and the first BANK1 via sdccs __banked
function keyword and custom banking trampoline code for the RTL837x in
assembler.
### Hardware supported by the code so far
-The following hardware is supported:
- Clock generation, including different divider settings
- Interrupt control for timer, serial, external irqs 0, 1
- Serial console via SFRs
- Flash operations via SFRs
- Bank switching via SFRs
- Access to Switch registers via SFRs
- LED setup
- Reset
- Some switch settings such as MAC configuration
- GPIO to detect SFP module insert/removal/RX-LOS
- I2C to read SFP EEPROM on 1 and 2 SFP slot devices
- NIC setup
- L2 learning table access, L2 table flushing
- VLAN setup/configuration
- Port mirroring
- Access to PHYs via MDIO (clause 45 via SFR):
- Internal PHYs of RTL8372 and RTL8373
- RTL8221 (1x2.5GBit port on devices with 5 ports)
- RTL8224 (4x2.5GBit ports on devices with 8 ports)
- SerDes settings of SoC via SFR:
- Configure SFPs with 10Gbit/2.5Gbit/1Gbit (Ethernet and Fiber SFP(+) tested)
- RTL8221, RTL8224
- NIC TX and RX of packets via SFRs
- send and receive Ethernet frames via SFRs and Switch registers
- RTL-tags and VLAN ingress-tag decoding for CPU-port
Ethernet frame RX IRQ via IRQ1 is conceptually understood, but not activated. RX is
currently done via polling, which allows ping-times of <10ms.
The RTL8372/3 have 256 bytes of internal RAM (INTMEM) accessible through MOV
instructions, which are used for the stack and important globals. Some of
these are bit-adressable, e.g. for storing global flags.
Additionally, 64kB of extended RAM (XMEM) is built in, which is accessed
through the MOVX instruction. It is used for global variables, for most
of the function argument passing that is not done using the 8 registers
R0-R7 or registers A/B, and for local variables (which requires extremely
careful planning). The flash memory is transparently accessible for code
being executed and can be used to store configuration. Access is done through
the MOVC instruction, possibly setting the bank register before and
resetting it to access the entire 4MB space. Code is prefetched from flash
and cached in a small RAM automatically by the HW.
The peripherial functions are accessed through 2 different mechanisms:
- Special Function Registers (SFRs, 0x80-0xff) for banking, timers, UART, access to
switch registers, MDIO, SPI (flash) and NIC transfers. Some SFRs are not
used for HW purposes and can be used as RAM. Some SFRs are bit-adressable,
allowing for very tight event wait loops (a single 2-byte instruction).
- 0x10000 switch registers, which appear to be very similar to the registers
of the RTL838x, for which source code and datasheets are available. This
controls clock dividers, GPIO/LEDs and general switch functionality.
The playground image shows access to the different types of memory using the
SDCC compiler. Any support of Linux or e.g. Zephyr would require porting gcc.
There are FreeRTOS ports to 8051 processors using sdcc, however.
### Installation on an actual switch
> [!CAUTION] > [!CAUTION]
> NOTE THAT WHILE THIS PROCEDURE HAS BEEN SUCCESSFULLY TESTED ON ALL DEVICES ABOVE, > This image can be flashed directly to the chip OR through the firmware update/upgrade
> ABSOLUTELY NO GUARANTY CAN BE GIVEN THAT YOU WILL NOT DESTROY YOUR SWITCH, > interface of RTLPlaygound interface
> ANY OTHER EQUIPMENT INVOLVED OR HARM YOURSELF BY OPENING THE ELECTRONIC
> DEVICE. OPENING THE SWITCH WILL VOID ITS WARRANTY.
There is no support for uploading the firmware via ethernet. Instead you ## (2) Compiling for OEM running device with management options (web upgrade)
need to open the switch and flash the image directly onto the flash chip,
which is done easiest using a SOIC-8 clip (alternatively you de-solder the
flash chip and install a SOIC adapter):
- Disconnect power from switch
- Attach the clip onto the flash chip
- Connect USB of flash programmer, the power LED on the switch will light
up, check cabling if not. Don't panic, mixing up GND and 3.3V does not
seem to destroy the switch (at leasts the on I did this to).
- Use IMSProg (flashrom should work, too) to detect the clip
- MAKE A BACKUP OF THE EXISTING FIRMWARE!
- then load the firmware into IMSProg
- and program flash
Now you can connect a serial cable to the UART port found on all the Managed switches can be updated from the existing original firmware using a SPECIFIC upgrade image.
devices, set 8N1 @ 115200 baud and power up the switch. You first need to build the firmware for direct chip flashing : See below (1)
The device will perform some examples and provide a minimal console, the Then
documentation of which can be found in the source code rtlplayground.c`.
```
cd installer
make
```
image location is stored in `RTLPlayground/installer/output/rtlplayground_oem_upgrade.bin`
> [!CAUTION]
> This image must ONLY be used for original OEM firmware web interface firmware upgrade.
> You do not need this image if you are already on RTLplayground firmware.
> Unless you go back to the original OEM firmware, you would only flash this specific firmware
> only once. Future upgrades of RTLPlayground will only need to follow (1)
example of compilation console output
```
RTLPlayground/installer$ make
mkdir -p output
gcc updatebuilder.c -o output/updatebuilder
sdas8051 -plosgff -o output/crtstart.rel crtstart.asm
sdcc -mmcs51 --code-loc 0x1000 -o output/installer.rel -c installer.c
sdcc -mmcs51 -Wl-bHOME=0x1100 -Wl-r -o output/rtlinstaller.ihx output/crtstart.rel output/installer.rel
./output/updatebuilder -i output/rtlinstaller.ihx -o output/rtlplayground_oem_upgrade.bin ../output/rtlplayground.bin
Input file size: 524288
Bytes read: 524288
EOF
Payload sum 1 is: 0x25100
Payload sum 2 is: 0x25100
Payload sum with header is: 0x264ec
Payload sum is: 0xf8fe94
Header checksum is: 0x5a1
```
## (3) Sandbox Usage with Ghidra (optional)
You can play with the image using ghidra or flash real Switch Hardware. For
ghidra see this information about [Ghidra images](ghidra.md).
## (4) Installation through the Web interface (software way)
Managed switches (OEM firmware of RTLplaygroud firmware) can be upgraded via the web interface.
Unmanaged switch cannot be flashed this way (see 5).
Go to "Firmware update" tab, select the correct file.
> [!IMPORTANT]
> If your device already runs RTLPlayground, you must upload the binary file /RTLPlayground/output/rtlplayground_Version_Machine.bin
> If your device is OEM, you must upload the binary file /RTLPlayground/installer/outputrtlplayground_oem_upgrade.bin
> [!CAUTION]
> Check one more time that your device matches the machine type before flashing.
> Be shure you have a backup of the original firmware before diving in RTLPlaygroung.
Finally, push the Upload File Button and you're done !
## (5) Flashing the ROM directly (hardware way, but also only way to rescue)
This procedure is the only way to flash unmanaged switches, if the ROM chip is large enough.
This is also the only way to unbrick your device if something went wroong.
> [!IMPORTANT]
> You need a SOIC-8 clip to flash the ROM chip directly onboard.
> Alternatively you can de-solder the flash chip and install a SOIC adapter).
> For flashing the chip directly, you must use the binary file /RTLPlayground/output/rtlplayground_Version_Machine.bin
> [!CAUTION]
> As you need to open your switch case, consider that the warranty is gone.
- Disconnect power from switch.
- Open the switch.
- Attach the clip onto the flash chip (Red line on Pin 1, Pin 1 has a point marker).
- Connect USB of flash programmer, the power LED on the switch will light up, check cabling if not.
- Don't panic, mixing up GND and 3.3V usually does not destroy the switch.
- Use IMSProg, Flashrom, or whatever Programmer to detect the chip.
- MAKE A BACKUP (DUMP) OF THE EXISTING FIRMWARE !
- ERASE THE ROM (BLANK) !
- Load the firmware into IMSProg.
- Flash is to the ROM chip.
- Disconect the clip from the ROM chip.
- You're done, ready for the first boot.
## (6) Connecting a serial interface (optional)
You can connect a serial cable to the UART port found on all the devices, set 8N1 @ 115200 baud.
## (7) Power Up
When you power up the switch, the device will perform some examples and provide a minimal console
(if wired to a serial interface), the documentation of which can be found in the source code rtlplayground.c`.
## (8) The web-interface
The web-interface can be reached under the [default 192.168.10.247](http://192.168.10.247) unless you
specified an IP adress in the config.txt before compilation.
> [!TIP]
> The default password is `1234`.
## (9) The command line
## The command line
The command line is very rudimentary and mostly for testing purposes. The command line is very rudimentary and mostly for testing purposes.
The following is a boot-log with some examples: The following is a boot-log with some examples:
``` ```
@@ -282,7 +302,6 @@ PORT 04 1G
<MODULE INSERTED> Rate: 67 Encoding: 01 <MODULE INSERTED> Rate: 67 Encoding: 01
Lightron Inc. WSPXG-ES3LC-IHA 0000 Lightron Inc. WSPXG-ES3LC-IHA 0000
> stat > stat
CMD: stat CMD: stat
Port State Link TxGood TxBad RxGood RxBad Port State Link TxGood TxBad RxGood RxBad
@@ -300,16 +319,42 @@ Lightron Inc. WSPXG-ES3LC-IHA 0000
CMD: sfp CMD: sfp
Rate: 67 Encoding: 01 Rate: 67 Encoding: 01
Lightron Inc. WSPXG-ES3LC-IHA 0000 Lightron Inc. WSPXG-ES3LC-IHA 0000
```
## (10) Advanced configuration
You can configure more deeply the switch without the need of the console mode.
While in compilation part, you might write directly to config.txt file before making the binary firmware
``` ```
nano config.txt
```
If you want to modify settings after the flash is done, go to the Advanced Settings tab in System Settings
<img width="1085" height="646" alt="ADVANCED SETTINGS" src="doc/images/advanced_settings.png" />
```
ip xxx.xxx.xxx.xxx = IP adress of the switch
gw yyy.yyy.yyy.yyy = IP adress of the gateway
netmask zzz.zzz.zzz.zzz = Network mask of the switch
port x name xxx = Name xxx the port number x
port z 1g = Set 1g speed for port z
igmp on/off = Turn IGMP on or off
```
[To be continue]
Enjoy playing! Enjoy playing!
## Other documents ## (11) Other documents
The following documents give further documentation on specific features of
the RTL837x SoCs: The following documents give further documentation on specific features of the RTL837x SoCs:
- [RTL8372/3 Feature support](doc/hardware.md)
- [CPU Port](doc/CpuPort.md) - [CPU Port](doc/CpuPort.md)
- [L2 learning](doc/l2.md) - [L2 learning](doc/l2.md)
- [Mirroring](doc/mirroring.md) - [IGMP (IP-MC streaming)](doc/igmp.md)
- [SFP+ ports](doc/sfp.md) - [SFP+ ports](doc/sfp.md)
- [Trunking aka. port aggregation](doc/trunking.md) - [Trunking aka. port aggregation](doc/trunking.md)
- [VLAN](doc/vlan.md) - [VLAN](doc/vlan.md)
- [Modifications and Flash replacement](doc/mods.md)
cmd_editor.c
+211
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@@ -0,0 +1,211 @@
#include "cmd_parser.h"
#include "machine.h"
#pragma codeseg BANK2
#pragma constseg BANK2
// Position in the serial buffer
__xdata uint8_t l;
// Properties of currently edited command line in cmd_buffer[CMD_BUF_SIZE]
__xdata uint8_t cursor;
__xdata uint8_t cmd_line_len;
__xdata uint8_t current_cmdline[CMD_BUF_SIZE];
__xdata uint16_t history_editptr;
extern __xdata uint8_t cmd_history[CMD_HISTORY_SIZE];
extern __xdata uint16_t cmd_history_ptr;
void cmd_editor_init(void) __banked
{
l = sbuf_ptr; // We have printed out entered characters until l
cursor = 0;
cmd_line_len = 0;
cmd_available = 0;
history_editptr = 0xffff;
}
/*
* Allows editing the current command line held in cmd_buffer[CMD_BUF_SIZE] by
* identifying new characters typed or up to 4-byte escape sequences in the
* serial buffer ring sbuf[SBUF_SIZE].
* Upon detecting new characters or escape sequences, the cmd_buffer and the
* representation of the command line in the terminal are updated.
* To debug, the easist is to interpose a tty-interceptor between the physical
* serial device and a logical one created by interceptty:
* sudo interceptty -s 'ispeed 115200 ospeed 115200' /dev/ttyUSB0 /dev/tmpS
* picocom -b 115200 /dev/tmpS
*/
void cmd_edit(void) __banked
{
while (l != sbuf_ptr) {
if (sbuf[l] >= ' ' && sbuf[l] < 127) { // A printable character, copy to command line
// Reserve one byte for the terminating NUL written on Enter. When the
// line is full, drop the character but still fall through to advance the
// serial-ring read pointer below; a 'continue' here would spin forever.
if (cmd_line_len < CMD_BUF_SIZE - 1) {
write_char(sbuf[l]);
// Shift buffer to right
for (uint8_t i = cmd_line_len; i > cursor; i--)
cmd_buffer[i] = cmd_buffer[i-1];
// Insert char in comand buffer
cmd_buffer[cursor++] = sbuf[l];
cmd_line_len++;
// Print rest of line
for (uint8_t i = cursor; i < cmd_line_len; i++)
write_char(cmd_buffer[i]);
// Move backwards
for (uint8_t i = cursor; i < cmd_line_len; i++)
write_char('\010'); // BS works like cursor-left
}
} else if (sbuf[l] == '\033') { // ESC-Sequence
// Wait until we have at least 3 characters including the ESC character in the serial buffer
if (((sbuf_ptr + SBUF_SIZE - l) & SBUF_MASK) < 3)
continue;
if (((sbuf_ptr > l ? sbuf_ptr - l : SBUF_SIZE + sbuf_ptr - l) >= 4)
&& sbuf[l] == '\033' && sbuf[(l + 1) & SBUF_MASK] == '[' && sbuf[(l + 2) & SBUF_MASK] == '3' && sbuf[(l + 3) & SBUF_MASK] == '~') { // DEL
if (cursor < cmd_line_len) {
write_char('\033'); write_char('['); write_char('1'); write_char('P'); // Delete to end of line
cmd_line_len--;
for (uint8_t i = cursor; i < cmd_line_len; i++) {
cmd_buffer[i] = cmd_buffer[i+1];
write_char(cmd_buffer[i]);
}
for (uint8_t i = cursor; i < cmd_line_len; i++)
write_char('\010');
}
l += 4;
l &= SBUF_MASK;
continue;
} else if (sbuf[l] == '\033' && sbuf[(l + 1) & SBUF_MASK] == '[' && sbuf[(l + 2) & SBUF_MASK] == 'D') { // <CURSOR-LEFT>
if (cursor) {
write_char('\010'); // BS works like cursor-left
cursor--;
}
l += 3;
l &= SBUF_MASK;
continue;
} else if (sbuf[l] == '\033' && sbuf[(l + 1) & SBUF_MASK] == '[' && sbuf[(l + 2) & SBUF_MASK] == 'C') { // <CURSOR-RIGHT>
if (cursor < cmd_line_len) {
write_char('\033'); write_char('['); write_char('C');
cursor++;
}
l += 3;
l &= SBUF_MASK;
continue;
} else if (sbuf[l] == '\033' && sbuf[(l + 1) & SBUF_MASK] == '[' && sbuf[(l + 2) & SBUF_MASK] == 'A') { // <CURSOR-UP>
for (uint8_t i = 0; i < cmd_line_len; i++)
current_cmdline[i] = cmd_buffer[i];
current_cmdline[cmd_line_len] = 0;
__xdata uint16_t p;
if (history_editptr == 0xffff)
p = (cmd_history_ptr - 2) & CMD_HISTORY_MASK;
else
p = history_editptr;
// Move cursor to beginning of line
write_char('\033'); write_char('['); itoa(cursor + 2); write_char('D');
cursor = 0;
while (cmd_history[p] && cmd_history[p] != '\n') {
cursor++;
p--;
p &= CMD_HISTORY_MASK;
}
history_editptr = (p - 1) & CMD_HISTORY_MASK;
p = (p + 1) & CMD_HISTORY_MASK;
if (cursor) {
print_string("\033[2K> "); // Clear entire line: ^[[2K and print new prompt
for (uint8_t i = 0; i < cursor; i++) {
cmd_buffer[i] = cmd_history[p];
write_char(cmd_buffer[i]);
p = (p+1) & CMD_HISTORY_MASK;
}
cmd_line_len = cursor;
} else {
print_string("\033[2C"); // Move 2 right to start of editing space
}
l += 3;
l &= SBUF_MASK;
continue;
} else if (sbuf[l] == '\033' && sbuf[(l + 1) & SBUF_MASK] == '[' && sbuf[(l + 2) & SBUF_MASK] == 'B') { // <CURSOR-DOWN>
if (history_editptr != 0xffff) {
__xdata uint16_t p = (history_editptr + 2) & CMD_HISTORY_MASK;
// Move cursor to beginning of line
write_char('\033'); write_char('['); itoa(cursor + 2); write_char('D');
print_string("\033[2K> "); // Clear entire line: ^[[2K and print new prompt
uint8_t i = 0;
while (cmd_history[p] && cmd_history[p] != '\n') {
p = (p + 1) & CMD_HISTORY_MASK;
}
p = (p + 1) & CMD_HISTORY_MASK;
while (cmd_history[p] && cmd_history[p] != '\n') {
cmd_buffer[i] = cmd_history[p];
write_char(cmd_buffer[i++]);
p = (p + 1) & CMD_HISTORY_MASK;
}
history_editptr = (p - 1) & CMD_HISTORY_MASK;
if (!i) {
if (current_cmdline[i]) {
while (current_cmdline[i]) {
cmd_buffer[i] = current_cmdline[i];
write_char(cmd_buffer[i++]);
}
} else {
write_char('\033'); write_char('['); write_char('C');
}
history_editptr = 0xffff;
// Move cursor right
}
cmd_line_len = i;
cursor = 0;
// Move cursor again to beginning of line
write_char('\033'); write_char('['); itoa(i); write_char('D');
} else {
// If we are at the last entry of the history, just move the cursor to the end of the line
if (cursor < cmd_line_len) {
write_char('\033'); write_char('['); itoa(cmd_line_len - cursor); write_char('C');
}
cursor = cmd_line_len;
}
l += 3;
l &= SBUF_MASK;
continue;
} else { // An unknown or not yet complete Escape sequence: wait
continue;
}
} else if (sbuf[l] == 127 || sbuf[l] == 8) { // Backspace DEL or BS/^H
if (cursor > 0) {
write_char('\010');
for (uint8_t i = cursor; i < cmd_line_len; i++)
write_char(cmd_buffer[i]);
write_char(' '); // Overwrite end of line
// Move backwards n steps:
for (uint8_t i = cursor; i <= cmd_line_len; i++)
write_char('\010');
cursor--;
for (uint8_t i = cursor; i <= cmd_line_len; i++)
cmd_buffer[i] = cmd_buffer[i+1];
cmd_line_len--;
}
}
// If the command buffer is currently in use, we cannot copy to it
if (cmd_available)
break;
// Check whether return was pressed:
if (sbuf[l] == '\n' || sbuf[l] == '\r') {
write_char('\n');
cmd_buffer[cmd_line_len] = '\0';
// write_char('>'); print_string_x(cmd_buffer); write_char('<');
// If there is a command we print the prompt after execution
// otherwise immediately because there is nothing to execute
if (cmd_line_len)
cmd_available = 1;
else
print_cmd_prompt();
cursor = 0;
cmd_line_len = 0;
history_editptr = 0xffff;
}
l++;
l &= SBUF_MASK;
}
}
cmd_editor.h
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@@ -0,0 +1,9 @@
#ifndef _CMD_EDITOR_H_
#define _CMD_EDITOR_H_
#include <stdint.h>
void cmd_editor_init(void) __banked;
void cmd_edit(void) __banked;
#endif
cmd_parser.c
+1653 -243
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File diff suppressed because it is too large Load Diff
cmd_parser.h
+14 -2
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@@ -1,7 +1,19 @@
#ifndef _CMD_PARSER_H_ #ifndef _CMD_PARSER_H_
#define _CMD_PARSER_H_ #define _CMD_PARSER_H_
#include <stdint.h>
#include "rtl837x_common.h"
extern __xdata uint8_t cmd_buffer[CMD_BUF_SIZE];
extern __xdata uint8_t cmd_available;
extern __xdata uint8_t err_status;
void cmd_tokenize(void) __banked;
void cmd_parser(void) __banked; void cmd_parser(void) __banked;
void cmd_parser_setup(void) __banked; void execute_config(void) __banked;
void execute_config() __banked; void execute_commands(__xdata uint8_t *p) __banked;
void print_sw_version(void) __banked;
void clear_command_history(void) __banked;
#endif #endif
config.txt
+3
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@@ -0,0 +1,3 @@
ip 192.168.10.247
gw 192.168.10.1
netmask 255.255.255.0
crc16.asm
+121
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@@ -0,0 +1,121 @@
;
; CRC16 calculation module
;
.globl _crc_value
.globl _crc16
.equ BANK, 0x96
; .equ DPS, 0x86
; Variable in XMEM holding current CRC16 value, being updated
.area XSEG (XDATA)
_crc_value::
.ds 2
;-------------------------------------------------------
; CRC16 subroutine
; - dptr points to byte to be CRCd in xmem
; - algorithm uses table lookup
;-------------------------------------------------------
.area HOME (CODE)
.area CSEG (CODE)
; .area BANK1 (CODE)
_crc16:
mov BANK, #1
push dph
push dpl
movx a, @dptr
; inc DPS
mov b, a
mov dptr, #_crc_value
movx a, @dptr
xrl a, b ; create index into tables
push a ; save index
mov dptr, #crc16_table_l ; low part of table address
movc a, @a+dptr ; get low byte
mov b, a
mov dptr, #_crc_value + 1
movx a, @dptr
xrl a, b
mov dptr, #_crc_value
movx @dptr, a ; save result low part
mov dptr, #crc16_table_h ; high part of table address
pop a ; restore index
movc a, @a+dptr
mov dptr, #_crc_value+1
movx @dptr, a ; save result high part
pop dpl
pop dph
; clr DPS
ret
.area BANK1 (CODE)
crc16_table_l:
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x00, #0xc1, #0x81, #0x40, #0x01, #0xc0, #0x80, #0x41
.byte #0x01, #0xc0, #0x80, #0x41, #0x00, #0xc1, #0x81, #0x40
crc16_table_h:
.byte #0x00, #0xc0, #0xc1, #0x01, #0xc3, #0x03, #0x02, #0xc2
.byte #0xc6, #0x06, #0x07, #0xc7, #0x05, #0xc5, #0xc4, #0x04
.byte #0xcc, #0x0c, #0x0d, #0xcd, #0x0f, #0xcf, #0xce, #0x0e
.byte #0x0a, #0xca, #0xcb, #0x0b, #0xc9, #0x09, #0x08, #0xc8
.byte #0xd8, #0x18, #0x19, #0xd9, #0x1b, #0xdb, #0xda, #0x1a
.byte #0x1e, #0xde, #0xdf, #0x1f, #0xdd, #0x1d, #0x1c, #0xdc
.byte #0x14, #0xd4, #0xd5, #0x15, #0xd7, #0x17, #0x16, #0xd6
.byte #0xd2, #0x12, #0x13, #0xd3, #0x11, #0xd1, #0xd0, #0x10
.byte #0xf0, #0x30, #0x31, #0xf1, #0x33, #0xf3, #0xf2, #0x32
.byte #0x36, #0xf6, #0xf7, #0x37, #0xf5, #0x35, #0x34, #0xf4
.byte #0x3c, #0xfc, #0xfd, #0x3d, #0xff, #0x3f, #0x3e, #0xfe
.byte #0xfa, #0x3a, #0x3b, #0xfb, #0x39, #0xf9, #0xf8, #0x38
.byte #0x28, #0xe8, #0xe9, #0x29, #0xeb, #0x2b, #0x2a, #0xea
.byte #0xee, #0x2e, #0x2f, #0xef, #0x2d, #0xed, #0xec, #0x2c
.byte #0xe4, #0x24, #0x25, #0xe5, #0x27, #0xe7, #0xe6, #0x26
.byte #0x22, #0xe2, #0xe3, #0x23, #0xe1, #0x21, #0x20, #0xe0
.byte #0xa0, #0x60, #0x61, #0xa1, #0x63, #0xa3, #0xa2, #0x62
.byte #0x66, #0xa6, #0xa7, #0x67, #0xa5, #0x65, #0x64, #0xa4
.byte #0x6c, #0xac, #0xad, #0x6d, #0xaf, #0x6f, #0x6e, #0xae
.byte #0xaa, #0x6a, #0x6b, #0xab, #0x69, #0xa9, #0xa8, #0x68
.byte #0x78, #0xb8, #0xb9, #0x79, #0xbb, #0x7b, #0x7a, #0xba
.byte #0xbe, #0x7e, #0x7f, #0xbf, #0x7d, #0xbd, #0xbc, #0x7c
.byte #0xb4, #0x74, #0x75, #0xb5, #0x77, #0xb7, #0xb6, #0x76
.byte #0x72, #0xb2, #0xb3, #0x73, #0xb1, #0x71, #0x70, #0xb0
.byte #0x50, #0x90, #0x91, #0x51, #0x93, #0x53, #0x52, #0x92
.byte #0x96, #0x56, #0x57, #0x97, #0x55, #0x95, #0x94, #0x54
.byte #0x9c, #0x5c, #0x5d, #0x9d, #0x5f, #0x9f, #0x9e, #0x5e
.byte #0x5a, #0x9a, #0x9b, #0x5b, #0x99, #0x59, #0x58, #0x98
.byte #0x88, #0x48, #0x49, #0x89, #0x4b, #0x8b, #0x8a, #0x4a
.byte #0x4e, #0x8e, #0x8f, #0x4f, #0x8d, #0x4d, #0x4c, #0x8c
.byte #0x44, #0x84, #0x85, #0x45, #0x87, #0x47, #0x46, #0x86
.byte #0x82, #0x42, #0x43, #0x83, #0x41, #0x81, #0x80, #0x40
crtbank.asm
+29
View File
@@ -0,0 +1,29 @@
.area HOME (CODE)
.area GSINIT0 (CODE)
.area GSINIT1 (CODE)
.area GSINIT2 (CODE)
.area GSINIT3 (CODE)
.area GSINIT4 (CODE)
.area GSINIT5 (CODE)
.area GSINIT (CODE)
.area GSFINAL (CODE)
.area CSEG (CODE)
.area HOME (CODE)
__sdcc_banked_call::
push _PSBANK
xch a,r0
push a
mov a,r1
push a
mov a,r2
anl a,#0x1f
mov _PSBANK, a
xch a, r0
ret
__sdcc_banked_ret::
pop _PSBANK
ret
crtstart.asm
-57
View File
@@ -1,57 +0,0 @@
.globl __start__stack
;--------------------------------------------------------
; Stack segment in internal ram
;--------------------------------------------------------
.area SSEG (DATA)
__start__stack:
.ds 1
.area VECTOR (CODE)
.globl __interrupt_vect
__interrupt_vect:
ljmp __sdcc_gsinit_startup
ljmp _isr_ext0 ; 0x03
.ds 5
ljmp _isr_timer0 ; 0x0b
.ds 5
ljmp _isr_ext1 ; 0x13
.ds 5
reti
.ds 7
ljmp _isr_serial ; 0x23
.ds 5
reti ; 0x2b TIMER 2 IRQ
.ds 7
reti ; 0x33 NOT used by DW8051
.ds 7
reti ; 0x3b Serial port 1 RX/TX IRQ
.ds 7
ljmp _isr_ext2 ; 0x43
.ds 5
ljmp _isr_ext3 ; 0x4b
.globl __start__stack
.area GSINIT0 (CODE)
__sdcc_gsinit_startup::
mov sp,#__start__stack - 1
.area GSFINAL (CODE)
ljmp _bootloader
__sdcc_banked_call::
push _PSBANK
xch a,r0
push a
mov a,r1
push a
mov a,r2
anl a,#0x1f
mov _PSBANK, a
xch a, r0
ret
__sdcc_banked_ret::
pop _PSBANK
ret
debug.h
+18
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@@ -0,0 +1,18 @@
#ifndef __DEBUG_H__
#define __DEBUG_H__
#ifdef DEBUG
#define dbg_string(s) print_string(s)
#define dbg_string_x(s) print_string_x(s)
#define dbg_byte(s) print_byte(s)
#define dbg_short(s) print_short(s)
#define dbg_char(s) write_char(s)
#else
#define dbg_string(s)
#define dbg_string_x(s)
#define dbg_byte(s)
#define dbg_short(s)
#define dbg_char(s)
#endif
#endif
dhcp.c
+404
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@@ -0,0 +1,404 @@
/*
* This is a DHCP client implementation for the RTL837x-based switches
*/
// #define REGDBG
// #define DEBUG
#include <stdint.h>
#include "rtl837x_sfr.h"
#include "rtl837x_common.h"
#include "dhcp.h"
#include "uip.h"
#include "uip/uip.h"
__xdata struct dhcp_state dhcp_state;
__xdata uip_ipaddr_t server;
#define DHCP_HW_TYPE_ETH 1
#define DHCP_SUBNET_MASK 1
#define DHCP_SUBNET_MASK_LEN 4
#define DHCP_ROUTER 3
#define DHCP_ROUTER_LEN 4
#define DHCP_DNS 6
#define DHCP_DNS_LEN 4
#define DHCP_BROADCAST 28
#define DHCP_BROADCAST_LEN 4
#define DHCP_SERVER_ID 54
#define DHCP_SERVER_ID_LEN 4
#define DHCP_MESSAGE_TYPE 53
#define DHCP_MESSAGE_TYPE_LEN 1
#define DHCP_MESSAGE_DISCOVER 1
#define DHCP_MESSAGE_OFFER 2
#define DHCP_MESSAGE_REQUEST 3
#define DHCP_MESSAGE_ACK 5
#define DHCP_LEASE 51
#define DHCP_LEASE_LEN 4
#define DHCP_RENEWAL 58
#define DHCP_RENEWAL_LEN 4
#define DHCP_REBIND 59
#define DHCP_REBIND_LEN 4
#define DHCP_CLIENT_ID 61
#define DHCP_CLIENT_ID_LEN 7
#define DHCP_HOSTNAME 12
#define DHCP_REQUEST_IP 50
#define DHCP_REQUEST_IP_LEN 4
#define DHCP_PARAMS 55
#define DHCP_PARAM_SUBNET 1
#define DHCP_PARAM_ROUTER 3
#define DHCP_PARAM_DNS 6
#define DHCP_END 255
#pragma codeseg BANK2
#pragma constseg BANK2
struct dhcp_pkt {
uint8_t type;
uint8_t hw;
uint8_t hw_len;
uint8_t hops;
uint32_t tid;
uint16_t delay;
uint16_t flags;
uint8_t client_ip[4];
uint8_t your_ip[4];
uint8_t next_server_ip[4];
uint8_t relay_ip[4];
uint8_t client_addr[6];
uint8_t client_pad[10];
uint8_t server_name[64];
uint8_t file[128];
uint8_t cookie[4];
};
#define DHCP_P ((__xdata struct dhcp_pkt *)uip_appdata)
#define DHCP_OPT ((__xdata uint8_t *)(uip_appdata) + sizeof (struct dhcp_pkt))
__xdata uint32_t long_value;
void dhcp_print_ip(__xdata uint8_t *a)
{
itoa(a[0]); write_char('.');
itoa(a[1]); write_char('.');
itoa(a[2]); write_char('.');
itoa(a[3]);
}
void dhcp_prepare_request(void)
{
DHCP_P->type = 1;
DHCP_P->hw = DHCP_HW_TYPE_ETH;
DHCP_P->hw_len = 6;
DHCP_P->hops = 0;
DHCP_P->tid = HTONS(dhcp_state.transaction_id);
DHCP_P->delay = HTONS(0);
DHCP_P->flags = 0;
// Clear fields client_ip to bootp_file
memset(DHCP_P->client_ip, 0, 224);
memcpy(DHCP_P->client_addr, uip_ethaddr.addr, 6);
DHCP_P->cookie[0] = 0x63;
DHCP_P->cookie[1] = 0x82;
DHCP_P->cookie[2] = 0x53;
DHCP_P->cookie[3] = 0x63;
}
void dhcp_addopt_client_id(void)
{
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_CLIENT_ID;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_CLIENT_ID_LEN;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_HW_TYPE_ETH;
memcpy(&DHCP_OPT[dhcp_state.opt_ptr], uip_ethaddr.addr, 6);
dhcp_state.opt_ptr += 6;
}
void dhcp_addopt_hostname(void)
{
uint8_t len = 0;
while (hostname[len])
len++;
if (!len)
return;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_HOSTNAME;
DHCP_OPT[dhcp_state.opt_ptr++] = len;
memcpy(&DHCP_OPT[dhcp_state.opt_ptr], hostname, len);
dhcp_state.opt_ptr += len;
}
void dhcp_addopt_request_ip(void)
{
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_REQUEST_IP;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_REQUEST_IP_LEN;
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.current_ip[0];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.current_ip[1];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.current_ip[2];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.current_ip[3];
memcpy(&DHCP_OPT[dhcp_state.opt_ptr], uip_ethaddr.addr, 4);
}
void dhcp_addopt_server_id(void)
{
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_SERVER_ID;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_SERVER_ID_LEN;
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.server[0];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.server[1];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.server[2];
DHCP_OPT[dhcp_state.opt_ptr++] = dhcp_state.server[3];
memcpy(&DHCP_OPT[dhcp_state.opt_ptr], uip_ethaddr.addr, 4);
}
void dhcp_send_discover(void)
{
print_string("dhcp_send_discover called\n");
dhcp_prepare_request();
dhcp_state.opt_ptr = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_TYPE;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_TYPE_LEN;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_DISCOVER;
dhcp_addopt_client_id();
dhcp_addopt_request_ip();
dhcp_addopt_hostname();
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAMS;
DHCP_OPT[dhcp_state.opt_ptr++] = 3;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_SUBNET;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_ROUTER;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_DNS;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_END;
// Padding to 300 bytes
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
uip_udp_send(sizeof(struct dhcp_pkt) + dhcp_state.opt_ptr);
dhcp_state.state = DHCP_DISCOVER_SENT;
dhcp_state.ticks = SYS_TICK_HZ;
dhcp_state.dhcp_timer = 30; // Timeout for discover
}
void dhcp_send_request(void)
{
print_string("dhcp_send_request called\n");
dhcp_prepare_request();
dhcp_state.opt_ptr = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_TYPE;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_TYPE_LEN;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_MESSAGE_REQUEST;
dhcp_addopt_client_id();
dhcp_addopt_request_ip();
dhcp_addopt_server_id();
dhcp_addopt_hostname();
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAMS;
DHCP_OPT[dhcp_state.opt_ptr++] = 3;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_SUBNET;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_ROUTER;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_PARAM_DNS;
DHCP_OPT[dhcp_state.opt_ptr++] = DHCP_END;
// Padding to 300 bytes
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
DHCP_OPT[dhcp_state.opt_ptr++] = 0;
uip_udp_send(sizeof(struct dhcp_pkt) + dhcp_state.opt_ptr);
dhcp_state.state = DHCP_REQUEST_SENT;
dhcp_state.ticks = SYS_TICK_HZ;
dhcp_state.dhcp_timer = 30; // Timeout for request
}
void ip_opt(__xdata uint8_t * ip)
{
dhcp_state.opt_ptr++;
uint8_t len = DHCP_OPT[dhcp_state.opt_ptr++];
*ip++ = DHCP_OPT[dhcp_state.opt_ptr++];
*ip++ = DHCP_OPT[dhcp_state.opt_ptr++];
*ip++ = DHCP_OPT[dhcp_state.opt_ptr++];
*ip++ = DHCP_OPT[dhcp_state.opt_ptr++];
// There may be more than one IP option, such as 2 DNS servers advertised
dhcp_state.opt_ptr += len - 4;
}
void long_opt(void)
{
dhcp_state.opt_ptr++;
dhcp_state.opt_ptr++;
long_value = DHCP_OPT[dhcp_state.opt_ptr++];
long_value <<= 8;
long_value |= DHCP_OPT[dhcp_state.opt_ptr++];
long_value <<= 8;
long_value |= DHCP_OPT[dhcp_state.opt_ptr++];
long_value <<= 8;
long_value |= DHCP_OPT[dhcp_state.opt_ptr++];
}
void parse_opts(void)
{
while (DHCP_OPT[dhcp_state.opt_ptr] && DHCP_OPT[dhcp_state.opt_ptr] != DHCP_END) {
switch(DHCP_OPT[dhcp_state.opt_ptr]) {
case DHCP_SUBNET_MASK:
ip_opt(&dhcp_state.subnet[0]);
break;
case DHCP_ROUTER:
ip_opt(&dhcp_state.router[0]);
break;
case DHCP_DNS:
ip_opt(&dhcp_state.dns[0]);
break;
case DHCP_SERVER_ID:
ip_opt(&dhcp_state.server[0]);
break;
case DHCP_BROADCAST:
ip_opt(&dhcp_state.broadcast[0]);
break;
case DHCP_LEASE:
long_opt();
dhcp_state.lease = long_value;
break;
case DHCP_REBIND:
long_opt();
dhcp_state.rebind = long_value;
break;
case DHCP_RENEWAL:
long_opt();
dhcp_state.renewal = long_value;
break;
case DHCP_END:
break;
default:
print_string("Unknown DHCP option: "); print_byte(DHCP_OPT[dhcp_state.opt_ptr]); write_char('\n');
dhcp_state.opt_ptr++;
dhcp_state.opt_ptr += DHCP_OPT[dhcp_state.opt_ptr];
dhcp_state.opt_ptr++;
}
}
}
void parse_dhcp(void)
{
if (!DHCP_P->tid == HTONS(dhcp_state.transaction_id))
return;
if (DHCP_P->cookie[0] != 0x63 || DHCP_P->cookie[1] != 0x82 || DHCP_P->cookie[2] != 0x53 || DHCP_P->cookie[3] != 0x63)
return;
dhcp_state.opt_ptr = 0;
if (DHCP_OPT[dhcp_state.opt_ptr++] != DHCP_MESSAGE_TYPE || DHCP_OPT[dhcp_state.opt_ptr++] != DHCP_MESSAGE_TYPE_LEN)
return;
if (DHCP_OPT[dhcp_state.opt_ptr] == DHCP_MESSAGE_OFFER) {
dhcp_state.opt_ptr++;
dhcp_state.current_ip[0] = DHCP_P->your_ip[0];
dhcp_state.current_ip[1] = DHCP_P->your_ip[1];
dhcp_state.current_ip[2] = DHCP_P->your_ip[2];
dhcp_state.current_ip[3] = DHCP_P->your_ip[3];
parse_opts();
print_string("DHCP offer received for IP "); dhcp_print_ip(dhcp_state.current_ip);
write_char('\n');
dhcp_send_request();
} else if (DHCP_OPT[dhcp_state.opt_ptr++] == DHCP_MESSAGE_ACK) {
parse_opts();
print_string("DHCP ACK, our IP is "); dhcp_print_ip(dhcp_state.current_ip);
write_char('\n');
print_string("DHCP netmask "); dhcp_print_ip(dhcp_state.subnet);
write_char('\n');
print_string("DHCP gateway "); dhcp_print_ip(dhcp_state.router);
write_char('\n');
print_string("DHCP lease-time ");
print_long(dhcp_state.lease);
write_char('\n');
uip_ipaddr(&uip_hostaddr, dhcp_state.current_ip[0], dhcp_state.current_ip[1], dhcp_state.current_ip[2], dhcp_state.current_ip[3]);
uip_ipaddr(&uip_draddr, dhcp_state.router[0], dhcp_state.router[1], dhcp_state.router[2], dhcp_state.router[3]);
uip_ipaddr(&uip_netmask, dhcp_state.subnet[0], dhcp_state.subnet[1], dhcp_state.subnet[2], dhcp_state.subnet[3]);
dhcp_state.state = DHCP_LEASING;
dhcp_state.ticks = SYS_TICK_HZ;
dhcp_state.dhcp_timer = dhcp_state.renewal > 0xffff ? 0xffff : dhcp_state.renewal;
}
}
void dhcp_start(void) __banked
{
uip_ipaddr(server, 255,255,255,255);
dhcp_state.conn = uip_udp_new(&server, HTONS(DHCPC_SERVER_PORT));
dhcp_state.current_ip[0] = dhcp_state.current_ip[1] = dhcp_state.current_ip[2] = dhcp_state.current_ip[3] = 0;
if(dhcp_state.conn) {
uip_udp_bind(dhcp_state.conn, HTONS(DHCPC_CLIENT_PORT));
} else {
print_string("dhcp_start failed to set up socket\n");
return;
}
get_random_32();
dhcp_state.transaction_id = SFR_DATA_U32;
dhcp_state.state = DHCP_START;
print_string("dhcp_start done\n");
}
void dhcp_stop(void) __banked
{
print_string("dhcp_stop called\n");
uip_udp_remove(dhcp_state.conn);
dhcp_state.state = DHCP_OFF;
}
void dhcp_callback(uint16_t lport) __banked
{
if (lport != HTONS(DHCPC_CLIENT_PORT)) // Is this call for us? If not, ignore it
return;
if (!dhcp_state.state)
return;
if (uip_closed()) {
print_string("Closed\n");
return;
} else if (uip_newdata()) {
parse_dhcp();
} else {
if (dhcp_state.state == DHCP_START) {
dhcp_send_discover();
} else if (!--dhcp_state.ticks) {
// print_string("Timer: "); print_short(dhcp_state.ticks); write_char(' '); print_short(dhcp_state.dhcp_timer);
dhcp_state.dhcp_timer--;
dhcp_state.ticks = SYS_TICK_HZ;
}
if (!dhcp_state.dhcp_timer) {
switch (dhcp_state.state) {
case DHCP_DISCOVER_SENT:
dhcp_send_discover();
break;
case DHCP_LEASING:
case DHCP_REQUEST_SENT:
dhcp_send_request();
break;
default:
print_string("UNKNOWN STATE\n");
}
}
}
// By default we do not send anything out
uip_len = 0;
}
dhcp.h
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#ifndef _DHCP_H_
#define _DHCP_H_
#include "uipopt.h"
#include <stdint.h>
#define DHCPC_SERVER_PORT 67
#define DHCPC_CLIENT_PORT 68
#define DHCP_OFF 0
#define DHCP_START 1
#define DHCP_DISCOVER_SENT 2
#define DHCP_REQUEST_SENT 3
#define DHCP_LEASING 4
void dhcp_start(void) __banked;
void dhcp_stop(void) __banked;
// void dhcp_periodic(void) __banked;
void dhcp_callback(uint16_t lport) __banked;
struct dhcp_state {
uint8_t state;
uint32_t transaction_id;
uint16_t dhcp_timer;
uint8_t ticks;
uint16_t opt_ptr;
uint8_t current_ip[4];
uint8_t server[4];
uint8_t router[4];
uint8_t subnet[4];
uint8_t dns[4];
uint8_t broadcast[4];
uint32_t lease;
uint32_t rebind;
uint32_t renewal;
__xdata struct uip_udp_conn *conn;
};
typedef struct dhcp_state uip_udp_appstate_t;
#endif
doc/CpuPort.md
+8 -1
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@@ -3,6 +3,12 @@
The RTL827x provide a CPU Port for a NIC on the 8051 side of the SoC. The RTL827x provide a CPU Port for a NIC on the 8051 side of the SoC.
## Receiving packets ## Receiving packets
In order to receive packets on the ASIC side, bit 0 of RTL837X_REG_RX_CTRL
(0x785c) must be set. Further bits in the register enable reception of various
kinds of Ethernet frames. They should all be set in order for the firmware
to decide what to do with them. To drop packets with incorrect Ethernet frame CRC
already by the ASIC, clear bit 2 of this register.
Packets are received by either polling the RTL837X_REG_RX_AVAIL register Packets are received by either polling the RTL837X_REG_RX_AVAIL register
(0x7874), which will be > 0 if data is within a ring-buffer on the ASIC side (0x7874), which will be > 0 if data is within a ring-buffer on the ASIC side
of the SoC. Alternatively, an interrupt can be triggered (EX1). of the SoC. Alternatively, an interrupt can be triggered (EX1).
@@ -39,7 +45,8 @@ buffer on the ASIC side by writing 0x1 to RTL837X_REG_RX_DONE (0x784c).
## Transmissing packets ## Transmissing packets
Packets are transmitted by preparing a frame-header plus frame in xdata memory Packets are transmitted by preparing a frame-header plus frame in xdata memory
and transferring both to the ASIC side via the SFRs. and transferring both to the ASIC side via the SFRs. The ASIC will transmit
packets if bit 0 of RTL837X_REG_TX_CTRL (0x7860) is set.
``` ```
SS 07 00 00 LL LH 00 00 SS 07 00 00 LL LH 00 00
doc/automation.md
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# Automation
## Upload
You can automate upload of the firmware via WEB with curl:
1. Authorize with /login endpoint and save cookie:
```bash
curl -c cookies.txt http://${SWITCH_IP}/login -d pwd=${PASSWORD} -i
```
This will save session cookie in cookies.txt
2. Send the firmware via form:
```bash
curl -b cookies.txt http://${SWITCH_IP}/upload -F "uploadedfile=@${FIRMWARE_FILE_PATH}" -i
```
You can expect that server will close connection, without responding to request.
Wait for SWITCH_IP to be responding again.
## Port status
In similar way to upload, you can fetch the json status of the ports.
1. Get the session cookie as for upload.
2. Hit the `/status.json` with cookie:
```bash
curl -b cookies.txt http://${SWITCH_IP}/status.json
```
doc/bandwidth.md
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# Egress and Ingress Bandwidth Control
The RTL8372/3 allows to control the bandwidth of data transmitted (egress) and/or
admitted (ingress) at any given port. Once admitted, packets are internally switched
at wire-speed, since the backplane of the devices has a bandwidth of 60GBit/s.
The devices schedules transmission of packets by assigning packets to 8 queues
implemented in hardware per port, which share a total of 8Mbit of memory internal
to the switching part of the SoCs. Packets are assigned to the respective queues
based on the priority assigned to a packet, which can be based on various
properties of a packet such as IEEE 802.1P priority, DSCP value, physical port
number, destination or source MAC, Ether-Type-based, CVID, SVID, IPv4 source or
destination IP, IPv4/IPv6 TOS field, IPv6 Flow Label and even TCP/UDP
source/destination port. Once in a queue, packets are scheduled for egress
based on differnent configurable algorithms.
RTLPlayground currently allows only to control the bandwidth at ingress at a port
or just before packets leave a port. There is no control of the priority assignment
or queue scheduling mechanisms. The bandwidth can be controlled in steps of 16Kbit/s
from 16Kbit/s to 10Gbp/s.
The bandwidth control as currently implemented allows e.g. to assign a certain
share of bandwidth to an attached device (e.g. to share an uplink), or simulate
connections with low bandwidth and even bad connectivity with packet drops when
ingress is not controlled by Flow Control but by simply droping packets.
## Ingress/Egress control
The relevant registers for controlling Ingress and Egress at a port are:
```
#define RTL837X_IGBW_CTRL 0x4c10
#define IGBW_INC_BYPASS_PKT 0x100
#define IGBW_INC_IFG 0x80
#define IGBW_ADM_DHCP 0x20
#define IGBW_ADM_ARPREQ 0x10
#define IGBW_ADM_RMA 0x08
#define IGBW_ADM_BPDU 0x04
#define IGBW_ADM_RTKPKT 0x02
#define IGBW_ADM_IGMP 0x01
#define RTL837X_IGBW_PORT_CTRL 0x4C18
#define RTL837X_IGBW_PORT_FC_CTRL 0x4C8C
#define RTL837X_EGBW_PORT_CTRL 0x1c34
#define RTL837X_EGBW_CTRL 0x447c
#define EGBW_INC_IFG 0x02
#define EGBW_CPUMODE 0x01
```
`RTL837X_IGBW_CTRL/RTL837X_EGBW_CTRL` control the behaviour of the bandwidth control
at ingress and egress. The flags such as `IGBW_ADM_DHCP`control whether certain types
of packets such as DHCP are exempt from being ingress controlled. The
`IGBW_INC_IFG/EGBW_INC_IFG` flags control whether the Inter Frame Gaps are part of
the bandwidth being controlled. `EGBW_CPUMODE` controls whether packets generated
by the internal CPU are subject to egress control.
`RTL837X_IGBW_PORT_CTRL/RTL837X_EGBW_PORT_CTRL` configure the bandwidth for ingress
and egress at a port.
`RTL837X_IGBW_PORT_FC_CTRL` configures whether packets are bandwidth-controlled using
Flow Control (port-bit set), or simply dropped (port-bit clear).
## Ingress/Egress bandwidth API
The code currently provides the following functions:
```
void bandwidth_setup(void) __banked;
void bandwidth_ingress_set(uint8_t port, __xdata uint32_t bw) __banked;
void bandwidth_ingress_disable(uint8_t port) __banked;
void bandwidth_ingress_drop(uint8_t port) __banked;
void bandwidth_egress_set(uint8_t port, __xdata uint32_t bw) __banked;
void bandwidth_egress_disable(uint8_t port) __banked;
void bandwidth_status(uint8_t port) __banked;
```c
`bandwidth_setup()` is called at boot-time and configures excluding all special packets
that may be for the CPU and packets outgoing from the CPU to be excluded from bandwidth
control. IFG is not part of the bandwidth calculation.
`bandwidth_ingress_set()` enables ingress bandwidth control for a particular port given
the specified bandwidth. This also enabled Flow Control at a port.
`bandwidth_ingress_set()` enables egress bandwidth control for a particular port given
the specified bandwidth
`bandwidth_ingress_disable() / bandwidth_egress_disable()` disable ingress and egress
bandwidth control at a given port
`bandwidth_ingress_drop(port)` configures packets exceeding bandwidth limitations to
simply be dropped
`bandwidth_status(port)` shows the current bandwidth control status for a given port
## Bandwidth control configuration on the Serial Console
The following commands are provided on the serial console:
```
> bw [in|out|status] <port> [<hexvalue>|off|drop]
Configures or shows the status of bandwidth control
```
The bandwidth is given as the `<hexvalue>` in Kbit/s. Note that the control is only
possible at a granularity of 16 Kbit/s and the minimum value is also 16 Kbit/s. The
hexadecimal numbers must be given in full bytes, i.e. have an even number of digits.
To enable bandwidth control of ingress for physical port 2 to be set to 256 Kbit/s
do:
```
> bw in 2 0100
```
To drop packets when the bandwidth is exceeeded at port 2 do:
```
> bw in 2 drop
```
To disable bandwidth control for incoming packets on port 2 do:
```
> bw in 2 off
```
## Bandwidth configuration via the Web Interface
Not implemented, yet!
## A Test using iperf3
The following is and example how to test bandwidth control with a signle Linux device using
network namespaces to route packets between a client and a server on the same Linux device
through an external switch.
You will need 2 network intefaces on the linux device, say, 2 USB-Ethernet controllers called
eth0 and eth1:
```
$ sudo ip netns add client
$ sudo ip netns add server
$ sudo ip link set dev eth0 netns client
$ sudo ip link set dev eth1 netns server
$ sudo ip netns exec client ip link set dev eth0 up
$ sudo ip netns exec server ip link set dev eth1 up
$ sudo ip netns exec client ip addr add dev eth0 192.168.99.1/24
$ sudo ip netns exec server ip addr add dev eth1 192.168.99.2/24
$ sudo ip netns exec server iperf3 -s
```
This will start an iper3 server in the above shell.
In a different shell you can now run the iperf3 client against your server:
```
$ sudo ip netns exec client iperf -c 192.168.99.2
```
The LEDs on your switch where your network adapters are connected should start to flicker.
On a 1GBit connection, you should see:
```
$ sudo ip netns exec client iperf3 -c 192.168.99.2
Connecting to host 192.168.99.2, port 5201
[ 5] local 192.168.99.1 port 46776 connected to 192.168.99.2 port 5201
[ ID] Interval Transfer Bitrate Retr Cwnd
[ 5] 0.00-1.00 sec 114 MBytes 952 Mbits/sec 0 339 KBytes
[ 5] 1.00-2.00 sec 113 MBytes 946 Mbits/sec 0 356 KBytes
[ 5] 2.00-3.00 sec 112 MBytes 937 Mbits/sec 0 390 KBytes
[ 5] 3.00-4.00 sec 112 MBytes 942 Mbits/sec 0 390 KBytes
[ 5] 4.00-5.00 sec 112 MBytes 943 Mbits/sec 0 390 KBytes
[ 5] 5.00-6.00 sec 112 MBytes 944 Mbits/sec 0 390 KBytes
[ 5] 6.00-7.00 sec 112 MBytes 938 Mbits/sec 0 390 KBytes
[ 5] 7.00-8.00 sec 112 MBytes 942 Mbits/sec 0 410 KBytes
[ 5] 8.00-9.00 sec 113 MBytes 947 Mbits/sec 0 410 KBytes
[ 5] 9.00-10.00 sec 112 MBytes 940 Mbits/sec 0 410 KBytes
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.00 sec 1.10 GBytes 943 Mbits/sec 0 sender
[ 5] 0.00-10.00 sec 1.10 GBytes 941 Mbits/sec receiver
```
Now, we limit ingress on port 1 (connected to eth0) to 4 MBit/s:
```> bw in 1 1000
bandwidth_ingress_set called, port 04
RTL837X_IGBW_PORT_CTRL:0x00100100
RTL837X_IGBW_PORT_FC_CTRL:0x00000010
```
We now get:
```
$ sudo ip netns exec client iperf3 -c 192.168.99.2
[ 5] local 192.168.99.1 port 43324 connected to 192.168.99.2 port 5201
[ ID] Interval Transfer Bitrate Retr Cwnd
[ 5] 0.00-1.00 sec 1.12 MBytes 9.43 Mbits/sec 0 160 KBytes
[ 5] 1.00-2.00 sec 640 KBytes 5.24 Mbits/sec 0 160 KBytes
[ 5] 2.00-3.00 sec 384 KBytes 3.15 Mbits/sec 0 160 KBytes
[ 5] 3.00-4.00 sec 384 KBytes 3.15 Mbits/sec 0 160 KBytes
[ 5] 4.00-5.00 sec 640 KBytes 5.24 Mbits/sec 0 160 KBytes
[ 5] 5.00-6.00 sec 256 KBytes 2.10 Mbits/sec 0 160 KBytes
[ 5] 6.00-7.00 sec 640 KBytes 5.24 Mbits/sec 0 160 KBytes
[ 5] 7.00-8.00 sec 384 KBytes 3.15 Mbits/sec 0 160 KBytes
[ 5] 8.00-9.00 sec 640 KBytes 5.24 Mbits/sec 0 160 KBytes
[ 5] 9.00-10.00 sec 256 KBytes 2.10 Mbits/sec 0 160 KBytes
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.00 sec 5.25 MBytes 4.40 Mbits/sec 0 sender
[ 5] 0.00-10.16 sec 4.75 MBytes 3.92 Mbits/sec receiver
iperf Done.
```
Which is the 4Mbit/s we configured. There are no packet drops (retries) because
Flow Control is used to signal the Ethernet adapter on the incoming interface
(port 1 of the router) to slow down.
We can also configure a mere 256KBit/s and packet drop to simulate a bad connection:
```
> bw in 1 0100
bandwidth_ingress_set called, port 04
RTL837X_IGBW_PORT_CTRL:0x00100010
RTL837X_IGBW_PORT_FC_CTRL:0x00000010
> bw in 1 drop
RTL837X_IGBW_PORT_FC_CTRL:0x00000000
```
We now get:
```
$ sudo ip netns exec client iperf3 -c 192.168.99.2
Connecting to host 192.168.99.2, port 5201
[ 5] local 192.168.99.1 port 46060 connected to 192.168.99.2 port 5201
[ ID] Interval Transfer Bitrate Retr Cwnd
[ 5] 0.00-1.00 sec 384 KBytes 3.14 Mbits/sec 2 1.41 KBytes
[ 5] 1.00-2.00 sec 0.00 Bytes 0.00 bits/sec 54 1.41 KBytes
[ 5] 2.00-3.00 sec 0.00 Bytes 0.00 bits/sec 31 29.7 KBytes
[ 5] 3.00-4.00 sec 0.00 Bytes 0.00 bits/sec 2 1.41 KBytes
[ 5] 4.00-5.00 sec 0.00 Bytes 0.00 bits/sec 23 1.41 KBytes
[ 5] 5.00-6.00 sec 128 KBytes 1.05 Mbits/sec 16 14.1 KBytes
[ 5] 6.00-7.00 sec 0.00 Bytes 0.00 bits/sec 2 1.41 KBytes
[ 5] 7.00-8.00 sec 0.00 Bytes 0.00 bits/sec 11 1.41 KBytes
[ 5] 8.00-9.00 sec 128 KBytes 1.05 Mbits/sec 9 8.48 KBytes
[ 5] 9.00-10.00 sec 0.00 Bytes 0.00 bits/sec 2 1.41 KBytes
- - - - - - - - - - - - - - - - - - - - - - - - -
[ ID] Interval Transfer Bitrate Retr
[ 5] 0.00-10.00 sec 640 KBytes 524 Kbits/sec 152 sender
[ 5] 0.00-10.00 sec 256 KBytes 210 Kbits/sec receiver
iperf Done.
```
Which shows a large number of retries due to dropped packets and an average number
of received packets (the client sends the packets to the server, and they are sent
back to the client by the server) of 210 KBit/s, the number is higher for the transmitted
packets, because they may include dropped packets.
doc/devices/2M-PCB23-V2_2.md
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### 2M-PCB23-V2.2
## Brands
| Brand | Type | Managed | PCB | Flash | Chip RTL |
|----------|-----------------|---------|---------------|-------|-------------|
| keepLINK | KP-9000-9XHML-X | Yes | 2M-PCB23-V2.2 | 2M | 8373 + 8224 |
## PCB
<img src="photos/2M-PCB23-V2.2-managed/2M-PCB23-V2.2-top.jpg" width="300" />
## Port overview
```
┌─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┐
│ ┌──────────┐ │
│ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ │ SFP(J13) │ │
│ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ PORT 9 │ │
│ │ PORT 1 │ │ PORT 2 │ │ PORT 3 │ │ PORT 4 │ │ PORT 5 │ │ PORT 6 │ │ PORT 7 │ │ PORT 8 │ │ MAC 8 │ O (PWR) │
│ O │ MAC 0 │ │ MAC 1 │ │ MAC 2 │ │ MAC 3 │ │ MAC 4 │ │ MAC 5 │ │ MAC 6 │ │ MAC 7 │ │ SerDes 1 │ O (SFP) │
│ RST └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └──────────┘ │
└─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┘
```
# Connectors
### J13, SFP connector
| SFP Pin | Signal | GPIO | Notes |
| ------- | ----------------- | ------ | ------------------------------ |
| 2 | TX_FAULT | ?? | |
| 3 | TX_DISABLE | ?? | |
| 4 | MODDEF2 – SDA | GPIO39 | |
| 5 | MODDEF1 – SCL | GPIO40 | |
| 6 | MODDEF0 – PRESENT | GPIO30 | "OE Exist" reported by `fiber` |
| 7 | RATE SEL | ?? | |
| 8 | LOS | GPIO37 | "OE LOS" reported by `fiber` |
| 9 | TO? | ?? | |
### T5, serial console
| pin | GPIO | Signal |
| --- | ------ | -------------- |
| 1 | GPIO32 | U0RXD (Input) |
| 2 | GND | Ground |
| 3 | GPIO31 | U0TXD (Output) |
### S1, unknown connector
| pin | GPIO | Signal |
| --- | -------- | -------------- |
| 1 | ??? | |
| x | | |
| 3 | ??? | |
| 4 | ??? | |
| 5 | ??? | |
Potentially slave interface or SMI.
### U7, flash memory
Flash chip is FM25Q16A.
### Reset button
GPIO54
## Register values
As probed with `regget` on stock firmware "V1.6".
### Model
| Name | Addr | Value |
| ------------------------- | ------ | ---------- |
| MODEL_NAME_INFO | 0x0004 | 0x83730000 |
| CHIP_MODE_INFO | 0x0008 | 0x00008000 |
| CHIP_INFO | 0x000C | 0x00300000 |
### GPIO
| Name | Addr | Value |
| ------------------------- | ------ | ---------- |
| GPIO_OUT0 | 0x003c | 0x10000000 |
| GPIO_OUT1 | 0x0040 | 0x00000010 |
| GPIO_OE0 | 0x004c | 0x10000000 |
| GPIO_OE1 | 0x0050 | 0x00000010 |
| BOND_INFO | 0x7f60 | 0x00000fff |
| STRAP_INFO | 0x7f64 | 0x0002f515 |
| IO_DRVING_0 | 0x7f68 | 0x00000000 |
| IO_DRVING_1 | 0x7f6c | 0x00000000 |
| IO_DRVING_2 | 0x7f70 | 0x00000000 |
| IO_SLEW_0 | 0x7f74 | 0x00000000 |
| IO_SLEW_1 | 0x7f78 | 0x00000000 |
| IO_SLEW_2 | 0x7f7c | 0x00000000 |
| IO_SMT_EN_0 | 0x7f80 | 0xffffffff |
| IO_SMT_EN_1 | 0x7f84 | 0xffffffff |
| IO_SMT_EN_2 | 0x7f88 | 0x0003ffff |
| IO_MUX_SEL_0 | 0x7f8c | 0x28000000 |
| IO_MUX_SEL_1 | 0x7f90 | 0x40000041 |
| IO_MUX_SEL_2 | 0x7f94 | 0x00000000 |
### LED
| Name | Addr | Value |
| ------------------------- | ------ | ---------- |
| LED_GLB_CTRL | 0x6520 | 0x0023e0f0 |
| LED3_0_SET3_2_CTRL1 | 0x6524 | 0xff001400 |
| LED3_0_SET1_0_CTRL1 | 0x6528 | 0x000f0000 |
| LED3_2_SET3_CTRL0 | 0x652c | 0x007f013f |
| LED1_0_SET3_CTRL0 | 0x6530 | 0x02000400 |
| LED3_2_SET2_CTRL0 | 0x6534 | 0x01400141 |
| LED1_0_SET2_CTRL0 | 0x6538 | 0x01440170 |
| LED3_2_SET1_CTRL0 | 0x653c | 0x18000041 |
| LED1_0_SET1_CTRL0 | 0x6540 | 0x0044017f |
| LED3_2_SET0_CTRL0 | 0x6544 | 0x00000044 |
| LED1_0_SET0_CTRL0 | 0x6548 | 0x00410175 |
| LED_PORT_SET_SEL_CTRL | 0x654c | 0x00010000 |
| SW_LED_LOAD | 0x6550 | 0x00000000 |
| LED_PORT_SW_EN_CTRL[0..7] | 0x6554 | 0x00000000 |
| LED_PORT_SW_EN_CTRL[8] | 0x6558 | 0x00000000 |
| LED_PORT_SW_CTRL[0] | 0x655c | 0x00000000 |
| LED_PORT_SW_CTRL[1] | 0x6560 | 0x00000000 |
| LED_PORT_SW_CTRL[2] | 0x6564 | 0x00000000 |
| LED_PORT_SW_CTRL[3] | 0x6568 | 0x00000000 |
| LED_PORT_SW_CTRL[4] | 0x656c | 0x00000000 |
| LED_PORT_SW_CTRL[5] | 0x6570 | 0x00000000 |
| LED_PORT_SW_CTRL[6] | 0x6574 | 0x00000000 |
| LED_PORT_SW_CTRL[7] | 0x6578 | 0x00000000 |
| LED_PORT_SW_CTRL[8] | 0x657c | 0x00000000 |
| LED_LOAD_LV1_10G | 0x6580 | 0x000fa000 |
| LED_LOAD_LV2_10G | 0x6584 | 0x00271000 |
| LED_LOAD_LV3_10G | 0x6588 | 0x004e2000 |
| LED_LOAD_LV1_5G | 0x658c | 0x000fa000 |
| LED_LOAD_LV2_5G | 0x6590 | 0x00271000 |
| LED_LOAD_LV3_5G | 0x6594 | 0x004e2000 |
| LED_LOAD_LV1_2P5G | 0x6598 | 0x000fa000 |
| LED_LOAD_LV2_2P5G | 0x659c | 0x00271000 |
| LED_LOAD_LV3_2P5G | 0x65a0 | 0x004e2000 |
| LED_LOAD_LV1_1G | 0x65a4 | 0x000fa000 |
| LED_LOAD_LV2_1G | 0x65a8 | 0x00271000 |
| LED_LOAD_LV3_1G | 0x65ac | 0x004e2000 |
| LED_LOAD_LV1_500M | 0x65b0 | 0x0007d000 |
| LED_LOAD_LV2_500M | 0x65b4 | 0x00138800 |
| LED_LOAD_LV3_500M | 0x65b8 | 0x00271000 |
| LED_LOAD_LV1_100M | 0x65bc | 0x00019000 |
| LED_LOAD_LV2_100M | 0x65c0 | 0x0003e800 |
| LED_LOAD_LV3_100M | 0x65c4 | 0x0007d000 |
| LED_LOAD_LV1_10M | 0x65c8 | 0x00002800 |
| LED_LOAD_LV2_10M | 0x65cc | 0x00006400 |
| LED_LOAD_LV3_10M | 0x65d0 | 0x0000c800 |
| LED_P_LOAD_CTRL | 0x65d4 | 0x00000000 |
| LED_GLB_ACTIVE | 0x65d8 | 0x3ffbedff |
| LED_GLB_IO_EN | 0x65dc | 0x77ffffff |
| LED_GLB_MUX_1 | 0c65e0 | 0x05102040 |
| LED_GLB_MUX_2 | 0x65e4 | 0x0c289206 |
| LED_GLB_MUX_3 | 0x65e8 | 0x1245038d |
| LED_GLB_MUX_4 | 0x65ec | 0x19616554 |
| LED_GLB_MUX_5 | 0x65f0 | 0x2079d71a |
| LED_GLB_MUX_6 | 0x65f4 | 0x000238a1 |
| LED_RLDP_CTRL_1 | 0x65f8 | 0x00000019 |
| LED_RLDP_CTRL_2 | 0x65fc | 0xffffffff |
| LED_RLDP_CTRL_3 | 0x6600 | 0x00006600 |
| LED_DUMY_0_ADDR | 0x6604 | 0x00000000 |
| LED_DUMY_1_ADDR | 0x6608 | 0x00000000 |
# LEDs
| Name | Components | Controlled by |
| ----------------------------- | --------------------------- | -------------------------- |
| RJ45 Right Green ("LINK/ACT") | | RJ45 LED0 |
| RJ45 Left Orange ("2.5G") | | RJ45 LED1 |
| RJ45 Left Green ("1G") | | RJ45 LED2 |
| "P" (PWR) | Top LED in "LED6" stack | probably pulled from Vcc |
| SFP Link ("9") | Bottom LED in "LED6" stack | SFP LED0 |
| ?? | D23 | SFP LED1 |
| ?? | D22 | SFP LED2 |
doc/devices/2M-PCB23-V3_1.md
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### 2M-PCB23-V3.1
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| keepLINK | KP-9000-9XHML-X | Yes| 2M-PCB23-V3.1 | 2M| 8273N + 8224N |
## PCB
<img src="photos/2M-PCB23-V3.1-managed/2M-PCB23-V3.1-top.jpeg" width="300" />
## Port overview
```
┌─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┐
│ ┌──────────┐ │
│ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ │ SFP (J4) │ │
│ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ PORT 9 │ │
│ │ PORT 1 │ │ PORT 2 │ │ PORT 3 │ │ PORT 4 │ │ PORT 5 │ │ PORT 6 │ │ PORT 7 │ │ PORT 8 │ │ MAC 8 │ O (PWR) │
│ O │ MAC 0 │ │ MAC 1 │ │ MAC 2 │ │ MAC 3 │ │ MAC 4 │ │ MAC 5 │ │ MAC 6 │ │ MAC 7 │ │ SerDes 1 │ O (SFP) │
│ RST └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └──────────┘ │
└─────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────────┘
```
# Connectors
|`J4` SFP PINs | Signal | Component | GPIO | Notes |
|---|---|---|---|---|
|2| TX_FAULT | | --- | |
|3| TX_DISABLE | | --- | Pull down - 0R |
|4| MODDEF2 – SDA | b-r273 | GPIO39-SDA4 | |
|5| MODDEF1 – SCL | b-r274 | GPIO40-SCL3 | |
|6| MODDEF0 – PRESENT | B-R275 | GPIO38 | |
|7| RATE SEL | | --- | |
|8| LOS | B-R276 | GPIO38 | |
|9| TO? | | --- | |
Note: component numbering `<L>-<REFDES>-<SIDE>`
* L: Layer, T=Top, B=Bottom
* REFDEES: full silkscreen like `R123`
* SIDE: Side of the component. when the rj45 are facing towards you are you can read the silkscreen normal.
L = Left, R=right, B=bottom, T=top or P with a pin number.
### T8, serial console
|`T9` pin|GPIO|Signal|
|---|---|---|
| 1 | GPIO31 | U0TXD (Output) |
| 2 | GND | PWR |
| 3 | GPIO32 | U0RXD (Input) |
| 4 | 3V3 | PWR |
### T7, Slave Interface
|`T7` pin|what|Signal|Components|
|---|---|---|---|
| 1 | Slave Interface | Slave SCK/SCL/MDC/EE_SCL | U7-6 |
| 2 | GND | | |
| 3 | Slave Interface | Slave SDI/SDA/MDIO/EE_SDA | U7-5 |
| 4 | 3V3 | | |
| 5 | GPIO? | | |
| 6 | GPIO? | | |
`U7` can be a standard I2C eeprom memory, like `24LC32`.
The Slave Interface allows an extenal host to controll the SOC even if the internal MCU is used.
Depending on the `IF_SEL` bootstrap resistors, this can me `I2C`, `SPI` or `SMI`.
On this device it is `I2C` on address `0b1011100` or `0x5c` (7-bit notation).
* I2c Read: must be a write_read opperation `<Dev-ADDR><RegAddr15:8><RegAddr7:0>` `<DevAddr><Data7:0><Data15:8><Data23:16><Data31:24>`.
* I2c Write: `<Dev-ADDR><RegAddr15:8><RegAddr7:0><DevAddr><Data7:0><Data15:8><Data23:16><Data31:24>`.
Example register `0x0004` return chip id `0x00, 0x00, 0x72, 0x83` = `0x83720000`.
### T9
|`T9` SMI | Signal | Component | GPIO | Notes |
|---|---|---|---|---|
|1| MDO | SMI-MDO | GPIO41 | |
|2| GND | PWR | | |
|3| MDC | SMI-MDC | GPio40 | |
### T10
|`T10` pin|what|Signal|
|---|---|---|
| 1 | GPIO49 | |
| 2 | GPIO47 | |
| 3 | 3V3 | |
| 4 | GPIO48 | |
| 5 | GND | |
| 6 | GPIO46 | |
# Reset ciruit
Reset-line found at `T-D6-L`, `T-R83`, `T-R97`, `T-R94`, `T-R93` active-low.
# GPIO
| HEX VAL. | GPIO | Component | What | | GPIO | Component | What |
| -------- | ------ | ---- | ---- | ---- | ---- | ---- | ---- |
| 00000001 | GPIO00 | T-R34-R, P1-LED-YL |? | | GPIO32 | B-r126-r | U0RXD |
| 00000002 | GPIO01 | T-R99-R, P1-LED-GR |? | | GPIO33 | | |
| 00000004 | GPIO02 | |? | | GPIO34 | B-R172, To RTL8224 | SMI-MDC0 |
| 00000008 | GPIO03 | T-R113-R, P2-LED-GR |? | | GPIO35 | B-R173, To RTL8224 | SMI-MDIO0 |
| 00000010 | GPIO04 | T-R115-R, P3-LED-YL |? | | GPIO36 | | | |
| 00000020 | GPIO05 | T-R117-R, P3-LED-GR |? | | GPIO37 | To RTL8224 ?? | Already driver low | |
| 00000040 | GPIO06 | |? | | GPIO38 | sfp-6 via B-R275, sfp-8 via B-R276 | SFP-PRESENT |
| 00000080 | GPIO07 | |? | | GPIO39 | sfp-4, b-r273, B-r143 | I2C4-SDA |
| 00000100 | GPIO08 | | | | GPIO40 | T9-2, sfp-5 b-r274, B-r146 | I2C3-SCL |
| 00000200 | GPIO09 | |LEDx[^1] | | GPIO41 | T9-1, B-r143 | | I2C3-SDA (Unused) |
| 00000400 | GPIO10 | | | | GPIO42 | U6?8?-P6, T-R | SPI-MEMORY, CLK |
| 00000800 | GPIO11 | |LEDx[^1] | | GPIO43 | U6?8?-P5, T-R | SPI-MEMORY, DI,IO0 |
| 00001000 | GPIO12 | |LEDx[^1] | | GPIO44 | U6?8?-P2, T-R | SPI-MEMORY, DO,IO1 |
| 00002000 | GPIO13 | |LEDx[^1] | | GPIO45 | U6?8?-P1, T-R | SPI-MEMORY, CS |
| 00004000 | GPIO14 | |LEDx[^1] | | GPIO46 | T10-6 | SPI0-SCK |
| 00008000 | GPIO15 | |LEDx[^1] | | GPIO47 | T10-2 | SPI0-SDA |
| 00010000 | GPIO16 | |LEDx[^1] | | GPIO48 | T10-4, J6 (BUTTON RESET) | SPI1-SCK |
| 00020000 | GPIO17 | |LEDx[^1] | | GPIO49 | T10-1 | SPI1-SDA |
| 00040000 | GPIO18 | |LEDx[^1] | | GPIO50 | | |
| 00080000 | GPIO19 | |LEDx[^1] | | GPIO51 | | |
| 00100000 | GPIO20 | |LEDx[^1] | | GPIO52 | | |
| 00200000 | GPIO21 | P7-LED-GR, B-R139 |LEDx[^1] | | GPIO53 | | |
| 00400000 | GPIO22 | |LEDx[^1] | | GPIO54 | | |
| 00800000 | GPIO23 | |LEDx[^1] | | GPIO55 | | |
| 01000000 | GPIO24 | P8-led-yellow,b-r154 |LEDx | | GPIO56 | | |
| 02000000 | GPIO25 | | | | GPIO57 | | |
| 04000000 | GPIO26 | |LEDx | | GPIO58 | | |
| 08000000 | GPIO27 | |? | | GPIO59 | | |
| 10000000 | GPIO28 | | | | GPIO60 | | |
| 20000000 | GPIO29 | | | | GPIO61 | | |
| 40000000 | GPIO30 | RTL8224N Reset |RTL8224 | | GPIO62 | To RTL8224 | Already driver | |
| 80000000 | GPIO31 | B-r129-r? |U0TXD | | GPIO63 | | |
## GPIO Register Input value
GPIO 1: 0a7ffbdd
GPIO 0: effb6dff
# LEDs
| NAME | COMPONENTS | GPIO |
| ---- | ---------- | ---- |
| SYSTEM | | ? |
| SFP | | ? |
# Power supply
Board has two supply rails.
`0.95` and `3.3` volt.
## `0.95` Core Voltage.
Voltage is crated by a `MP2225GJ` Buck converter.
0.95V must be within 3%.
## `3.3` Voltage
Voltage is crated by a `MP2225GJ` Buck converter.
3.3V must be within 4.5%.
Chip can deliver up to 5A and the sweetspot is at 2A.
So higher power SFP-modules should work.
[^1]: LEDs are found by just plugin a RJ45 connector and see with cmd `gpio` the status change. But the bit pattern for port 1,2 are diffrent from port 3,4.
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# 2G040210GSM
The following is a documentation for the managed switch marked as `2G040210GSM`
and sold by Mokerlink.
### Label specifications
- **Name**: 4-port 2.5G Web Managed Switch
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 1A barrel connector
### What works
The device is fully supported:
- All 4 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware (use KP_9000_6XHML_X2 in machine.h if building yourself or the corresponding pre-compiled binary)
- untested due to missing Hardware: SFP+ ports equipped with 1G or 2.5G SFPs.
### Hardware overview
Front
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-front.jpeg" width="300" />
Label
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-label.jpeg" width="300" />
### PCB overview
**Board markings**
- Top silkscreen: 2M-PCB43-V1.1
Top side
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-top.jpeg" width="300" />
Bottom
<img src="photos/2M-PCB43-V1.1-managed/2M-PCB43-V1.1-bottom.jpeg" width="300" />
### J1, serial console
| `J8` pin | Signal |
| -------- | ----------- |
| 1 | RX (Input) |
| 2 | TX (Output) |
| 3 | GND |
| 4 | 3V3 |
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
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# FG-4GT-2SX_V2.0
Following is documentation for unmanaged switch marked as `FG-4GT-2SX_V2.0`.
Original software is running UART on 9600 baud rate.
## Brands
* Ruiying RY-4GT-2SX
<img src="photos/FG-4GT-2SX_V2.0/RY-4GT-2SX_label.jpg" width="300" />
## What works
- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
- Both SFP ports supporting 1G, 2.5G and 10G modules
- LEDs
## PCB overview
**Board markings**
- Top silkscreen: FG-4GT-2SX_V2.0
Front panel
<img src="photos/FG-4GT-2SX_V2.0/chassis-front.jpg" width="300" />
Top side
<img src="photos/FG-4GT-2SX_V2.0/PCB-top.jpg" width="300" />
Bottom
<img src="photos/FG-4GT-2SX_V2.0/PCB-bottom.jpg" width="300" />
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
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# FOXNEO FNS-1200P
RTL8372-based 4×2.5G PoE+ + 2×SFP+ unmanaged switch.
Using SPI clamp in-board is the only method for initial installation.
### Label specifications
- **Manufacturer**: FOXNEO
- **Model**: FNS-1200P
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps with PoE+
- 2 × SFP+: 1G / 2.5G / 10G
### What works
- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps (PoE+ is not configurable via RTLPlayground)
- Both SFP+ ports supporting 1G, 2.5G and 10G modules
- LEDs: amber (2.5G) and green (1G/100M/10M) per copper port; combined link/act on SFP ports
### PCB overview
**Board markings**
- Top silkscreen: PCB-K0402W-U13-V2.0 / DIP-K0402WB-V2.0
**Key components**
- U3: SPI NOR flash, 2 MiB
- U7: unpopulated SOP8 footprint — I2C bus (RTL8372 slave at 0x5c) is accessible from its pads, useful for register dumps
- S1: unpopulated slide switch footprint (three through-holes used as serial console)
Front panel
<img src="photos/FNS-1200P/chassis-front.jpg" width="400" />
Top side (PCB)
<img src="photos/FNS-1200P/PCB-top.jpg" width="300" />
### Port layout
| Front panel position | Logical port | Physical port | Type |
|----------------------|--------------|---------------|---------|
| SFP left | 8 | 5 | SFP+ |
| RJ45 1 | 4 | 1 | Copper |
| RJ45 2 | 5 | 2 | Copper |
| RJ45 3 | 6 | 3 | Copper |
| RJ45 4 | 7 | 4 | Copper |
| SFP right | 3 | 6 | SFP+ |
### Serial console
The PCB has three unpopulated through-holes intended for a slide switch, directly connected to UART0.
Numbered from the left (SFP port side), the pinout is:
| Position (left→right) | Signal | GPIO |
|-----------------------|--------|--------------------------|
| 1 (leftmost) | RX | GPIO32\_UART0\_RX (32) |
| 2 (middle) | GND | GND |
| 3 (rightmost) | TX | GPIO31\_UART0\_TX (31) |
- **Settings**: 115200 baud / 8N1 / 3.3V TTL
- Connect a USB-TTL adapter: adapter TX → pin 1, GND → pin 2, adapter RX → pin 3
### LED configuration
Copper ports use LED SET0, SFP ports use LED SET1.
| SET | LED0 | LED2 |
|------|--------------------------------------------------|---------------------------------------------------|
| SET0 | Amber — lights on 2.5G link | Green — lights on 1G / 100M / 10M link |
| SET1 | All speeds — lights on any link with activity | — |
LED pad to physical port mapping:
| GPIO pads | Port |
|-----------|-------------------------|
| GPIO8–11 | Physical port 5 (left SFP) |
| GPIO12–14 | Physical port 1 (RJ45 1) |
| GPIO15–17 | Physical port 2 (RJ45 2) |
| GPIO18–20 | Physical port 3 (RJ45 3) |
| GPIO21–23 | Physical port 4 (RJ45 4) |
| GPIO24–27 | Physical port 6 (right SFP) |
### SFP GPIO assignments
| SFP | pin\_detect (ModAbs) | pin\_los | SerDes | I2C SDA | I2C SCL |
|------------------|-----------------------------|------------------------|--------|----------------------|--------------------------|
| Left (logical 8) | GPIO30\_ACL\_BIT3\_EN | GPIO37 | SDS1 | GPIO39\_I2C\_SDA4 | GPIO40\_I2C\_SCL3\_MDC1 |
| Right (logical 3)| GPIO50\_I2C\_SCL2\_UART1\_TX | GPIO51\_I2C\_SDA2\_UART1\_RX | SDS0 | GPIO41\_I2C\_SDA3\_MDIO1 | GPIO40\_I2C\_SCL3\_MDC1 |
GPIO assignments were verified by observing GPIO state changes during SFP module insertion/removal
and cross-checked against an original firmware register dump.
`pin_tx_disable` is GPIO\_NA on both ports (original firmware keeps all GPIOs as inputs).
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# Hisource Hi-K0801WS
Following is documentation for unmanaged switch marked as `Hi-K0801WS`.
Using SPI clamp in-board is the only method for initial installation.
### Label specifications
- **Name**: 2.5G Ethernet Switch
- **Model**: Hi-K0801WS
- **Ports**:
- 8 × RJ45: 10/100/1000/2500 Mbps
- 1 × SFP: 1000 / 2500 / 10000 Mbps
### What works (expected from label + similar devices)
- All eight 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
- SFP port supporting 1G, 2.5G and 10G modules
- LEDs
### PCB overview
**Board markings**
- Top silkscreen: PCB-KO801W-V2.0 / DIP-KO801WS-V2.0
Top side
<img src="photos/K0801W-V2.0-unmanaged\PCB-top.jpg" width="300" />
Bottom
<img src="photos/K0801W-V2.0-unmanaged\PCB-bottom.jpg" width="300" />
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
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# K0501W V2.0
This board appears for example in the Davuaz Da-K6501W switch.
The general design of the board is similar to Hi-K0402WS V3.0.
However, there are several differences:
- One SFP port is replaced by a RTL8221B 2.5G PHY
- Only one LED is populated for the SFP port
- No mode switch and only one flash chip
- Older design using RTL8372 instead of RTL8372N (which also means different GPIO and LED configuration)
- Like earlier versions of the K0402W(S) board, there is no UART
All ports and LEDs are supported.
Installation is possible using a flash programmer.
The BoyaMicro 25Q16BSSIG flash chip is supported by flashprog with chip name "B.25D16AS/BY25Q16BS/BY25Q16ES".
## PCB pictures
The board is marked `PCB-K0501W-V2.0 DIP-K0501WS-V2.0`.
<img src="photos/K0501W_V2_0/pcb-top.jpg" width="300" />
<img src="photos/K0501W_V2_0/pcb-bottom.jpg" width="300" />
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# Keeplink KP-9000-6XH-X2
Following is documentation for unmanaged switch marked as `KP-9000-6XH-X2`.
Using SPI clamp in-board is the only method for initial installation.
### Label specifications
- **Name**: 4X 2.5G RJ45 Port + 2 X 10G SFP+ Port
- **Model**: KP-9000-6XH-X2
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP+: 1000 / 2500 / 10000 Mbps
### What works
- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
- SFP port with 10G modules
- LEDs
- untested due to missing Hardware: SFP+ ports equipped with 1G or 2.5G SFPs.
### Hardware overview
Front side:
<img src="photos/2M-PCB43-V2.1-unmanaged/KP-9000-6XH-X2-front.jpg" width="600" />
Label:
<img src="photos/2M-PCB43-V2.1-unmanaged/KP-9000-6XH-X2-label.jpg" width="600" />
### PCB overview
**Board markings**
- Top silkscreen: 2M-PCB43-V2.1
Top side
<img src="photos/2M-PCB43-V2.1-unmanaged/2M-PCB43-V2.1-top.jpg" width="600" />
Bottom
<img src="photos/2M-PCB43-V2.1-unmanaged/2M-PCB43-V2.1-bottom.jpg" width="600" />
## Reset Button
There's an unpopulated Reset button on the front left side of the PCB.
It can easily be soldered, you'll need an 4.5mmx4.5mm 90° button switch with a 3-pin footprint.
I got mine here: https://de.aliexpress.com/item/1005007295346702.html
The front case has already the hole in the metal case, you just have to punch a hole through the foil.
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
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# PCB-K0402WS-V3.0
Following is documentation for a variety of unmanaged switch internally marked as `PCB-K0402WS-V3.0`. They are sold under many brands.
Original software is running UART on 9600 baud rate.
Note during opening the device: there might be a hidden 5th screw on the back
of the device just above the big label, might be covered by a QC sticker.
### Brands
* Hisource Hi-K0402WS
<img src="photos/PCB-K0402WS-V3.0/HiSource_HI-K0402WS.jpg" width="300" />
* Ztyuav Z-QWYT0402
<img src="photos/PCB-K0402WS-V3.0/Ztyuav_Z-QWYT0402.jpg" width="300" />
<img src="photos/PCB-K0402WS-V3.0/Ztyuav_Z-QWYT0402_label.jpg" width="300" />
### Programming
Using SPI clamp in-board is the only method for initial installation.
The board has two flash chips `BY25Q16BS` with 16M-bit size. The front switch, switches between the two flash chips.
These can be programed independently by using said switch - so it is e.g. possible to run the original and new firmware in parallel.
The switch actually controls the HOLD line of each flash chip, and toggling the switch results in a reboot.
If the programming clip keeps HOLD not connected, the flashing will commence on whatever the switch selected, regardless on which chip was clipped.
For the initial flash (at least with flashrom), the bin file produced by the build is much smaller than the flash chip, it is suggested to pad the file to keep flashrom happy: `truncate -s 2097152 rtlplayground-*-PCB_K0402WS_V3.bin`. Note: do not then proceed to use this resulting padded file for the web flashing (as it bricks the device), use the original unpadded .bin.
### What works (expected from label + similar devices)
- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
- Both SFP ports supporting 1G, 2.5G and 10G modules
- LEDs
### PCB overview
**Board markings**
- Top silkscreen: PCB-KO4022W-V3.0 / DIP-KO4022WS-V3.0
Top side
<img src="photos/PCB-K0402WS-V3.0/PCB-top.jpg" width="300" />
Bottom
<img src="photos/PCB-K0402WS-V3.0/PCB-bottom.jpg" width="300" />
### T2, serial console
| `J2` pin | Signal |
| -------- | ----------- |
| 1 | 3V3 |
| 2 | RX (Input) |
| 3 | TX (Output) |
| 4 | GND |
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
Board has two supply rails. `0.95` and `3.3` volt.
### `0.95` Core Voltage
Voltage is made by a `Techcode TD1720` .
### `3.3` Voltage
Voltage is created by chip marked as `Techcode TD1720`.
**There seems to have been a miscalculation when choosing the inductor and the device is ~25% more efficient with an 5V power supply.**
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# Steamemo IG204-V1
Following is documentation for unmanaged switch marked as `IG204-V1`.
Using SPI clamp in-board is the only method for initial installation.
### Label specifications
- **Name**: 2.5G Ethernet Switch
- **Model**: IG204 V1
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP: 1000 / 2500 / 10000 Mbps
### What works (expected from label + similar devices)
- Four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
- Two SFP ports supporting 1G, 2.5G and 10G modules
- LEDs
### PCB overview
**Board markings**
- Top silkscreen: PB-2131
Top side
<img src="photos/STEAMEMO_IG204_V1/PCB-top.jpg" width="600" />
### Connectors
### T7, serial console
| `T7` pin | Signal |
| -------- | ----------- |
| 1 | TX (Output) |
| 2 | GND |
| 3 | RX (Input) |
| 4 | 3V3 |
### Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
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# SWTG018AS-A V2.0
## Brands
| Brand | Type |Managed| PCB | Flash | Chip RTL |
|--------|------------------|-------|------------------|-----------------|---------------|
| Ampcom | SWTG018AS-A V2.0 | No | SWTG018AS-A V2.0 | 2MB | 8273N + 8224N |
| Horaco | HC-SWTGW218AS-A | Yes | SWTG018AS-A V2.0 | 2MB(25Q16JVSIQ) | 8273N + 8224N |
The following is a documentation for the unmanaged switch marked as `SWTG018AS-A V2.0`.
It is e.g. sold under the Ampcom brand, but no branh-markings are found on the device.
The original software is running UART on 9600 baud rate.
Using a SOIC clamp in-board is the only method for initial installation.
The board has a single flash chips `BS` with 4M-bit size. The front switch, switches between the two flash chips.
These can be programed independently by using said switch - so it is e.g. possible to run the original and new firmware in parallel.
### Label specifications
- **Name**: 9-Ports 2.5G Ethernet Switch
- **Ports**:
- 8 × RJ45: 10/100/1000/2500 Mbps
- 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 1A barrel connector
<img src="photos/SWTG018AS_A_V_2_0/label.jpg" width="300" />
### What works
The device is fully supported:
- All 8 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware
### PCB overview
**Board markings**
- Top silkscreen: SWTG018AS-A-V2.0.1_19649
Top side
<img src="photos/SWTG018AS_A_V_2_0/pcb_top.jpg" width="300" />
Bottom
<img src="photos/SWTG018AS_A_V_2_0/pcb_bottom.jpg" width="300" />
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | 3V3 |
| 2 | GND |
| 3 | RX (Input) |
| 4 | TX (Output) |
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
doc/devices/SWTG024AS-A-V2.0.1_4C_2SFP.md
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### SWTG024AS-A-V2.0.1_4C_2SFP
It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO configuration for the SFP port.
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Horaco | ZX-SG4T2 | | PCB-SWTG024AS-A-V2.0.1_19650 | P25D40SH | ??? |
### Label specifications
- **Name**:
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 2 × SFP+: 1000 / 2500 / 10000 Mbps
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-label.jpg" width="300" />
### What works
The device is fully supported:
- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules
### PCB overview
**Board markings**
- Top silkscreen: PCB-SWTG024AS-A-V2.0.1_19650
Top side
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-pcb-top.jpg" width="300" />
Bottom
<img src="photos/SWTG024AS-A-V2_0_1_19650/horaco-zx-sg4t2-pcb-bottom.jpg" width="300" />
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | 3V3 |
| 2 | GND |
| 3 | RX (Input) |
| 4 | TX (Output) |
doc/devices/SWTG024AS-A-V2.0.1_5C_1SFP.md
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### SWTG024AS-A-V2.0.1_5C_1SFP
It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO configuration for the SFP port.
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Horaco | HC-SWTGW215AS | | PCB-SWTG024AS-A-V2.0.1_19650 | W25Q16JV | 8272N |
### Label specifications
- **Name**:
- **Ports**:
- 5 × RJ45: 10/100/1000/2500 Mbps
- 1 × SFP+: 1000 / 2500 / 10000 Mbps
<!-- <img src="" width="300" /> -->
### What works
The device is fully supported:
- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware
### PCB overview
**Board markings**
- Top silkscreen: PCB-SWTG024AS-A-V2.0.1_19650
Top side
<!-- <img src="" width="300" /> -->
Bottom
<!-- <img src="" width="300" /> -->
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | 3V3 |
| 2 | GND |
| 3 | RX (Input) |
| 4 | TX (Output) |
doc/devices/SWTG024AS-V2.0.md
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### SWTG024AS-V2.0
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| hongyavision | LG-SG5T1 | No | PCB-SWTG024AS-V2.0_16895 | 25Q40 | 8272 |
### Label specifications
- **Name**:
- **Ports**:
- 5 × RJ45: 10/100/1000/2500 Mbps
- 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 1A 5525 connector
<img src="photos/SWTG024AS-V2.0/label.jpg" width="300" />
### What works
The device is fully supported:
- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware
- Online update does not work with 512KiB flash.
### PCB overview
**Board markings**
- Top silkscreen: PCB-SWTG024AS-V2.0
Top side
<img src="photos/SWTG024AS-V2.0/pcb_top.jpg" width="300" />
Bottom
<img src="photos/SWTG024AS-V2.0/pcb_bottom.jpg" width="300" />
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | GND |
| 2 | RX (Input) |
| 3 | TX (Output) |
Note,`R52`、`R53`may not be installed.You need to bridge them using either solder or resistors.
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
doc/devices/SWTG024AS.md
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### SWTG024AS
SWTG024AS has at least 4 variants that look the same.
Variants are `managed` and a `unmanaged` version.
But both have pcb version `v1.0` and `v2.0`.
Also the RJ45 connectors can be all plastic/non-shielded or with metal shielding.
## Brands
|Brand|Type|Managed|PCB|PCB Label|Flash|Chip RTL|
|---|---|---|---|---|---|---|
| LIANGUO |SWTG024AS |No| SWTG024AS-v2.0-17452 | CM-23-11-2336 023-17453| 512 KiB | 8272 |
| Horaco |ZX-SWTG124AS | Yes | SWTG024AS-v2.0 | ??? | ??? | 8272 |
| Xikestore |SKS3200M-4GPY2XF | Yes | SWTG024AS-v1.0 | CM-23-08-2043 023-16721 | 2048 KiB | 8272 |
| Sodola | SL-SWTG124AS-D | Yes | SWTG024AS-v2.0-17452 | ??? | 2048 KiB | 8272 |
## PCB
<img src="photos/SWTG024AS-v2.0-unmanaged/SWTG024AS-v2.0-top-uman.png" width="300" />
# SWTG024AS-v2.0 managed vs unmanged
Changes I found with my board vs [Managed version](https://github.com/up-n-atom/SWTG118AS/tree/main/photos/SWGT024AS-v2.0) of the PCB.
### Bottom
* R105: Installed, goes to R10-PullDown SFP2 (J2) -> TX-DISABLE
* R85: Not Installed (Connected to K1 Reset Button)
* R90: Not installed (System Led)
* LED3: Not installed (System Led)
### Top
* K1: Not installed (Reset Button)
* R95: Installed (SFP2 (J2) signal RX-LOS), means that the managed-version can´t use the RX-LOS function.
* R270: Installed (SFP1 (J4) signal RX-LOS), same here as above.
* R268: Installed (SFP2 (J2) signal TX-DISABLE, but R262 200R pull-down is to high to drive by the SOC, needs mod!)
* U5: Flash is only 512 KiB instead of 2/4 MiB.
### Notes
* `TX-Disable`-SFP2 and Button `K1` share the same GPIO pin via `R105` and `R85`.
But via `R88`, `TX-Disable`-SFP2 can be mapped to `GPIO36`.
* `TX-Disable` pull-down resistos on both SFP are to low to drive by the SOC.
We need to make a `Best`-BOM variant so we can use all the featues.
# Connectors
## Port overview
```
┌────────────────────────────────────────────────────────────────────────────────────────┐
│ ┌──────────┐ ┌──────────┐ │
│ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ │ SFP (J4) │ │ SFP (J2) │ │
│ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ PORT 5 │ │ PORT 6 │ │
│ │ PORT 1 │ │ PORT 2 │ │ PORT 3 │ │ PORT 4 │ │ MAC 8 │ │ MAC 3 │ │
│ O │ MAC 4 │ │ MAC 5 │ │ MAC 6 │ │ MAC 7 │ │ SerDes 1 │ │ SerDes 0 │ │
│ RST └─────────┘ └─────────┘ └─────────┘ └─────────┘ └──────────┘ └──────────┘ │
└────────────────────────────────────────────────────────────────────────────────────────┘
```
## J4
* Location: Left SFP connector `J4`.
* Connected to: 10GMAC number 8, second SerDes.
|`J4` SFP1 PINs | Signal | Component | GPIO | Notes |
|---|---|---|---|---|
|2| TX_FAULT | B-R262 | --- | |
|3| TX_DISABLE | B-R263, T-R268 | GPIO38 | R262 = Pull-down 200R|
|4| MODDEF2 – SDA | B-R261, T-R266 | GPIO39 | |
|5| MODDEF1 – SCL | B-R260, T-R267 | GPIO40 | Shared with both SFP |
|6| MODDEF0 – PRESENT | B-R259, T-R296 | GPIO30 | |
|7| RATE SEL | B-R257 | --- | |
|8| LOS | B-R258, T-R270 | GPIO37 | |
|9| TO? | B-R256 | --- | |
## J2
* Location: Right SFP connector `J2`.
* Connected to: 10GMAC number 3, first SerDes.
|`J2` SFP2 PINs | Signal | Component | GPIO | Notes |
|---|---|---|---|---|
|2| TX_FAULT | B-R70 | --- | |
|3| TX_DISABLE | B-R10, B-R105-R, T-R88-L | GPIO54 | R10 = Pull-down 200R |
|4| MODDEF2 – SDA | B-R26, T-R85 | GPIO41 | |
|5| MODDEF1 – SCL | B-R15, T-R87 | GPIO40 | Shared with both SFP |
|6| MODDEF0 – PRESENT | B-R14, T-R89 | GPIO50 | |
|7| RATE SEL | B-R12 | --- | |
|8| LOS | B-R13, T-R95 | GPIO51 | |
|9| TO? | B-R11 | --- | |
Note: component numbering `<L>-<REFDES>-<SIDE>`
* L: Layer, T=Top, B=Bottom
* REFDEES: full silkscreen like `R123`
* SIDE: Side of the component. when the rj45 are facing towards you are you can read the silkscreen normal.
L = Left, R=right, B=bottom, T=top or P with a pin number.
### T3, Slave Interface
This connector goes to U4 `I2C EEPROM` and U10 `SPI FLASH`.
Signals are based on that `U4` is likely a I2C-EEPROM, `U10` is likely other SPI-chip.
|`T3` pin|what|Signal|
|---|---|---|
|1| U4-P6, 33R U10-P6 | I2C-SCL, SPI-CLK, Slave SCK/SCL/MDC/EE_SCL |
|2| GND | --- |
|3| U4-P5, U10-P5 | I2C-SDA, SPI-DI/DO, Slave SDI/SDA/MDIO/EE_SDA |
|4| VCC |
|5| 33R -> U10-P2 | SPI-DO/D1 |
|6| U10-P1 | SPI-CS |
Note: 1 pin is square shaped.
The Slave Interface allows an extenal host to controll the SOC even if the internal MCU is used.
Depending on the `IF_SEL` bootstrap resistors, this can me `I2C`, `SPI` or `SMI`.
On this device it is `I2C` on address `0b1011100` or `0x5c` (7-bit notation).
* I2c Read: must be a write_read opperation `<Dev-ADDR><RegAddr15:8><RegAddr7:0>` `<DevAddr><Data7:0><Data15:8><Data23:16><Data31:24>`.
* I2c Write: `<Dev-ADDR><RegAddr15:8><RegAddr7:0><DevAddr><Data7:0><Data15:8><Data23:16><Data31:24>`.
Example register `0x0004` return chip id `0x00, 0x00, 0x72, 0x83` = `0x83720000`.
### T5, serial console
|`T5` pin|GPIO|Signal|
|---|---|---|
| 1 | GPIO31 | U0TXD (Output) |
| 2 | GND | |
| 3 | GPIO32 | U0RXD (Input) |
| 4 | 3V3 | |
Note: 1 pin is square shaped.
### T8
|`T8` pin|what|Signal|
|---|---|---|
| 1 | GPIO46 | |
| 2 | GND | |
| 3 | GPIO48 | |
| 4 | 3V3 | |
| 5 | GPIO47 | |
| 6 | GPIO49 | |
Note: 1 pin is square shaped.
# Reset ciruit
| Cmp | Function |
|---|---|
| T-R78 | 33k PullUp |
| T-D3 | Discharge Diode |
| T-C187 | RC-Delay |
Reset-line found at `T-D3-D` active-low.
# GPIO
| HEX VAL. | GPIO | Component | What | | GPIO | Component | What |
| -------- | ------ | ---- | ---- | ---- | ---- | ---- | ---- |
| 00000001 | GPIO00 | T-C151-T, T-R28-T, T-R29-T |? | | GPIO32 | T-R143-R | U0RXD |
| 00000002 | GPIO01 | T-C152-T |? | | GPIO33 | | |
| 00000004 | GPIO02 | T-C153-T |? | | GPIO34 | | |
| 00000008 | GPIO03 | T-R33-T |? | | GPIO35 | | |
| 00000010 | GPIO04 | B-C155 |? | | GPIO36 | T-R88-L, T-R84-B | Optional SFP2 TX-DISABLE[^2], Reset |
| 00000020 | GPIO05 | B-C156 |? | | GPIO37 | SFP1-8, T-R270 | SFP-LOS |
| 00000040 | GPIO06 | T-C157-T |? | | GPIO38 | SFP1-3, T-R268 | SFP1 TX-DISABLE[^2] |
| 00000080 | GPIO07 | T-C158-T, R165 |? | | GPIO39 | SFP1-4, T-R266 | I2C-SDA4 |
| 00000100 | GPIO08 | | | | GPIO40 | SFP2-5, T-R87; SFP1-5, T-R267; | I2C-SCL |
| 00000200 | GPIO09 | SFP2-LED, T-R36-T |LED-SFP2 | | GPIO41 | SFP2-4, T-R85 | I2C-SDA |
| 00000400 | GPIO10 | | | | GPIO42 | U8-P6, T-R124 | SPI-MEMORY, CLK |
| 00000800 | GPIO11 | |LEDx[^1] | | GPIO43 | U8-P5, T-R127 | SPI-MEMORY, DI,IO0 |
| 00001000 | GPIO12 | |LEDx[^1] | | GPIO44 | U8-P2, T-R128 | SPI-MEMORY, DO,IO1 |
| 00002000 | GPIO13 | PORT1-LED-GREEN |LEDx[^1] | | GPIO45 | U8-P1, T-R123 | SPI-MEMORY, CS |
| 00004000 | GPIO14 | PORT1-LED-YELLOW |LEDx | | GPIO46 | T8-1, T-R188| ? |
| 00008000 | GPIO15 | |LEDx[^1] | | GPIO47 | T8-5, T-R190 | ? |
| 00010000 | GPIO16 | PORT2-LED-GREEN |LEDx[^1] | | GPIO48 | T8-3, T-R189 | ? |
| 00020000 | GPIO17 | PORT2-LED-YELLOW |LEDx | | GPIO49 | T8-6, T-R190 | ? |
| 00040000 | GPIO18 | |LEDx[^1] | | GPIO50 | SFP2-6, T-R89 | SFP-DETECT |
| 00080000 | GPIO19 | PORT3-LED-GREEN |LEDx[^1] | | GPIO51 | SFP2-8, T-R95 | SFP-LOS |
| 00100000 | GPIO20 | PORT3-LED-YELLOW |LEDx | | GPIO52 | | |
| 00200000 | GPIO21 | |LEDx[^1] | | GPIO53 | | |
| 00400000 | GPIO22 | PORT4-LED-GREEN |LEDx[^1] | | GPIO54 | SFP2-3, T-R105-L | SFP2 TX-DISABLE[^2] or via T-R85 to RESET[^3], T-R84-T |
| 00800000 | GPIO23 | PORT4-LED-YELLOW |LEDx | | GPIO55 | T-R78-B | |
| 01000000 | GPIO24 | SFP1-LED-J4, T-R35 |LED-SFP1 | | GPIO56 | | |
| 02000000 | GPIO25 | | | | GPIO57 | | |
| 04000000 | GPIO26 | ? |LEDx | | GPIO58 | | |
| 08000000 | GPIO27 | R44L |? | | GPIO59 | | |
| 10000000 | GPIO28 | LED-SYSTEM, T-R50-R |LED-SYSTEM | | GPIO60 | | |
| 20000000 | GPIO29 | T-R187-R | | | GPIO61 | | |
| 40000000 | GPIO30 | SFP1-6, T-R269 |SFP-DETECT | | GPIO62 | | |
| 80000000 | GPIO31 | T-R144-R |U0TXD| | GPIO63 | | |
# LEDs
| NAME | COMPONENTS | GPIO | Active |
| ---- | ---------- | ---- | ------ |
| SYSTEM | T-R50-R (PU-4k2), T-R49-L, T-C185-L, B-R90 | GPIO28 | Low |
| SFP1 | T-R35-L (PU-3k9), T-R34-L, T-C179-L | GPIO24 | Low |
| SFP2 | T-R36-T (PD-4k0) | GPIO09 | High |
| PORT1-LED-YELLOW | | GPIO14 | Low |
| PORT2-LED-YELLOW | | GPIO17 | Low |
| PORT3-LED-YELLOW | | GPIO20 | Low |
| PORT4-LED-YELLOW | | GPIO23 | Low |
# Power supply
Board has two supply rails.
`0.95` and `3.3` volt.
## `0.95` Core Voltage.
Voltage is made by a `Richtek RT8120A` Buck converter.
0.95V must be within 3%.
## `3.3` Voltage
Voltage is crated by a `TMI3244T` Buck converter.
3.3V must be within 4.5%.
Chip can deliver up to 4A and the sweetspot is at 1A.
So higher power SFP-modules should work.
[^1]: LEDs are found by just plugin a RJ45 connector and see with cmd `gpio` the status change. But the bit pattern for port 1,2 are diffrent from port 3,4.
[^2]: Only on the unmanaged verions are `R10` and `R268` placed. But the very low pull-down resistor `R10` and `R262` prevent to SOC to drive does pins. A mod is needed.
[^3]: GPIO54 is used for the reset-button. `T-R85` is placed.
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### ZX-SWTGW215AS
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Lianguo | ZX-SWTGW215AS | Yes | PCB-SWTG115AS-V2.0 | FM25Q16A | 8272 |
## RTLPlayground target
Use machine target `MACHINE_LIANGUO_ZX_SWTGW215AS` for this device.
Physical hardware verification: 5x RJ45 ports + 1x SFP port.
Port 5 RJ45 is interfaced through a RTL8221B IC.
## PCB
<img src="photos/ZX-SWTGW215AS/pcb_top.jpg" width="300" />
# Connectors
## Port overview
```
┌──────────────────────────────────────────────────────────────────────────────────┐
│ ┌──────────┐ │
│ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ │ SFP (J4) │ │
│ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ PORT 6 │ │
│ │ PORT 1 │ │ PORT 2 │ │ PORT 3 │ │ PORT 4 │ │ PORT 5 │ │ LOG 8 │ │
│ O │ LOG 4 │ │ LOG 5 │ │ LOG 6 │ │ LOG 7 │ │ LOG 3 │ │ SerDes 1 │ │
│ RST └─────────┘ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └──────────┘ │
└──────────────────────────────────────────────────────────────────────────────────┘
```
| Type | RTLPlayground logical ports | Physical index |
|---|---|---|
| RJ45 | 3, 4, 5, 6, 7 | 1-5 |
| SFP | 8 | 6 |
## J4
* Location: SFP connector `J4`.
* Connected to: 10GMAC number 8, SerDes 1.
|`J4` SFP PINs | Signal | GPIO | Notes |
|---|---|---|---|
|3| TX_DISABLE | GPIO_NA | Not connected |
|4| MODDEF2 – SDA | GPIO39 | I2C SDA |
|5| MODDEF1 – SCL | GPIO40 | I2C SCL |
|6| MODDEF0 – PRESENT | GPIO30 | Detect |
|8| LOS | GPIO37 | RX Loss of Signal |
### Notes
* Not all signals were mapped mechanically, hence they've been left out of documentation.
## T3, Slave Interface
This connector goes to U4 `I2C EEPROM` and U10 `SPI FLASH` (mappings identical to SWTG024AS).
For detailed Slave Interface functionality and protocol information, see [T3 documentation in SWTG024AS.md](SWTG024AS.md#t3-slave-interface).
|`T3` pin|what|Signal|
|---|---|---|
|1| U4-P6, 33R U10-P6 | I2C-SCL, SPI-CLK, Slave SCK/SCL/MDC/EE_SCL |
|2| GND | --- |
|3| U4-P5, U10-P5 | I2C-SDA, SPI-DI/DO, Slave SDI/SDA/MDIO/EE_SDA |
|4| VCC |
|5| 33R -> U10-P2 | SPI-DO/D1 |
|6| U10-P1 | SPI-CS |
### Notes
* 1 pin is square shaped.
## T5, Serial Console
|`T5` pin|GPIO|Signal|
|---|---|---|
| 1 | GPIO31 | U0TXD (Output) |
| 2 | GND | |
| 3 | GPIO32 | U0RXD (Input) |
| 4 | 3V3 | |
### Notes
* 1 pin is square shaped.
## T8
|`T8` pin|GPIO|Signal|
|---|---|---|
| 1 | GPIO46 | |
| 2 | GND | |
| 3 | GPIO48 | |
| 4 | 3V3 | |
| 5 | GPIO47 | |
| 6 | GPIO49 | |
### Notes
* 1 pin is square shaped.
* Mapping unverified but assumed the same as [LIANGUO SWTG024AS](SWTG024AS.md#t8).
# Reset Circuit
| Function | GPIO |
|---|---|
| Reset button | GPIO54 |
### Notes
* Circuit is active-low
# GPIO
Note: T3/U4/U10-related signal annotations below are copied from [LIANGUO SWTG024AS T3 section](SWTG024AS.md#t3-slave-interface) as well as T8 port from [LIANGUO SWTG024AS T8 section](SWTG024AS.md#t8). They should be treated as assumed identical for ZX-SWTGW215AS as it has not been 100% confirmed true at the moment.
| HEX VAL. | GPIO | Component / Purpose | Notes | | GPIO | Component / Purpose | Notes |
| -------- | ------ | ---- | ---- | ---- | ---- | ---- | ---- |
| 00000001 | GPIO00 | | | | GPIO32 | T5-3 | U0RXD |
| 00000002 | GPIO01 | | | | GPIO33 | | |
| 00000004 | GPIO02 | | | | GPIO34 | | |
| 00000008 | GPIO03 | | | | GPIO35 | | |
| 00000010 | GPIO04 | | | | GPIO36 | | |
| 00000020 | GPIO05 | | | | GPIO37 | J4-8 | SFP LOS |
| 00000040 | GPIO06 | | | | GPIO38 | | |
| 00000080 | GPIO07 | | | | GPIO39 | J4-4 | SFP I2C SDA |
| 00000100 | GPIO08 | | | | GPIO40 | J4-5 | SFP I2C SCL |
| 00000200 | GPIO09 | | | | GPIO41 | | |
| 00000400 | GPIO10 | | | | GPIO42 | U10-P6, U4-P6, T3-1 | SPI FLASH CLK / I2C-SCL (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00000800 | GPIO11 | | | | GPIO43 | U10-P5, U4-P5, T3-3 | SPI FLASH DI/IO0 / I2C-SDA (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00001000 | GPIO12 | | | | GPIO44 | U10-P2, T3-5 | SPI FLASH DO/IO1 (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00002000 | GPIO13 | PORT1 LED GREEN | | | GPIO45 | U10-P1, T3-6 | SPI FLASH CS (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00004000 | GPIO14 | PORT1 LED ORANGE | | | GPIO46 | T8-1 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00008000 | GPIO15 | | | | GPIO47 | T8-5 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00010000 | GPIO16 | PORT2 LED GREEN | | | GPIO48 | T8-3 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00020000 | GPIO17 | PORT2 LED ORANGE | | | GPIO49 | T8-6 | (from [LIANGUO SWTG024AS](SWTG024AS.md#gpio)) |
| 00040000 | GPIO18 | PORT3 LED GREEN | | | GPIO50 | | |
| 00080000 | GPIO19 | PORT3 LED ORANGE | | | GPIO51 | | |
| 00100000 | GPIO20 | PORT4 LED GREEN | | | GPIO52 | | |
| 00200000 | GPIO21 | PORT4 LED ORANGE | | | GPIO53 | | |
| 00400000 | GPIO22 | PORT5 LED GREEN | | | GPIO54 | Reset Button | GPIO54_ACL_BIT2_EN |
| 00800000 | GPIO23 | PORT5 LED ORANGE | | | GPIO55 | | |
| 01000000 | GPIO24 | SFP LED GREEN | J4 | | GPIO56 | | |
| 02000000 | GPIO25 | | | | GPIO57 | | |
| 04000000 | GPIO26 | | | | GPIO58 | | |
| 08000000 | GPIO27 | | | | GPIO59 | | |
| 10000000 | GPIO28 | LED-SYSTEM | | | GPIO60 | | |
| 20000000 | GPIO29 | | | | GPIO61 | | |
| 40000000 | GPIO30 | J4-6 | SFP DETECT | | GPIO62 | | |
| 80000000 | GPIO31 | T5-1 | U0TXD | | GPIO63 | | |
# LEDs
| NAME | GPIO | Port(s) | Function | Notes |
| ---- | ---- | ---- | ---- | ---- |
| PORT1 LED GREEN | GPIO13 |5| Activity | LEDS_2G5, LEDS_LINK, LEDS_ACT |
| PORT1 LED ORANGE | GPIO14 | 5 | Speed | LEDS_1G, LEDS_100M, LEDS_10M, LEDS_LINK, LEDS_ACT |
| PORT2 LED GREEN | GPIO16 | 4 | Activity | LEDS_2G5, LEDS_LINK, LEDS_ACT |
| PORT2 LED ORANGE | GPIO17 | 4 | Speed | LEDS_1G, LEDS_100M, LEDS_10M, LEDS_LINK, LEDS_ACT |
| PORT3 LED GREEN | GPIO18 | 3 | Activity | LEDS_2G5, LEDS_LINK, LEDS_ACT |
| PORT3 LED ORANGE | GPIO19 | 3 | Speed | LEDS_1G, LEDS_100M, LEDS_10M, LEDS_LINK, LEDS_ACT |
| PORT4 LED GREEN | GPIO20 | 2 | Activity | LEDS_2G5, LEDS_LINK, LEDS_ACT |
| PORT4 LED ORANGE | GPIO21 | 2 | Speed | LEDS_1G, LEDS_100M, LEDS_10M, LEDS_LINK, LEDS_ACT |
| PORT5 LED GREEN | GPIO22 | 1 | Activity | LEDS_2G5, LEDS_LINK, LEDS_ACT |
| PORT5 LED ORANGE | GPIO23 | 1 | Speed | LEDS_1G, LEDS_100M, LEDS_10M, LEDS_LINK, LEDS_ACT |
| SFP LED GREEN | GPIO24 | 6 (SFP J4) | Multi-speed | LEDS_10G, LEDS_5G, LEDS_2G5, LEDS_1G, LEDS_100M, LEDS_LINK, LEDS_ACT |
| LED-SYSTEM | GPIO28 | --- | System status | --- |
## Notes
While [SWTG024AS.md](SWTG024AS.md) can be used as a general reference for hardware concepts and interface specifications, this device should not be assumed to be identical beside the difference implicitely highlighted below. Not all information has been validated for compatibility with the SWTG215AS. Consult the SWTG024AS documentation with caution and verify any critical details against this device's.
doc/devices/SWTGW218AS.md
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### ZX-SWTGW218AS
## Brands
|Brand|Type|Managed|PCB|Flash|Chip RTL|
|---|---|---|---|---|---|
| Mokerlink | ZX-SWTGW218AS | Yes| SWTG118AS-V2.0-16029 | 2MB (FM25Q16A)| 8273N + 8224N |
| Sodola | | | | | |
| Horaco | | | | | |
| XikeStor | SKS3200-8E1X | Yes | SWTG118AS-V2.1-17462 | 2MB (25Q16JVSIQ) | |
## Photos
<img src="photos/SWTGW218AS-managed/front.png" width="800" />
<img src="photos/SWTGW218AS-managed/label.jpg" width="800" />
## PCB
See up'n'atom's Repo:
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-top.JPG
https://github.com/up-n-atom/SWTG118AS/blob/main/photos/SWTG118AS-v2.0/SWTG118AS-v2.0-pcb-bottom.JPG
doc/devices/TEG-S562.md
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# TrendNet TEG-S562
Following is documentation for unmanaged switch marked as `TEG-S563/EU H/W: V1.0R`.
Original software is running UART on 57600 baud rate. The software does not allow to
do anything fancy via serial. There is `IP` configuration which can be printed as well.
There might be also some flash upload procedure, but using SPI clamp in-board seems to
be easier method.
The memory chip is `Winbond W25Q16JV` with 16M-bit size.
## What does work
1. 2.5G ports on all advertised speeds.
2. SFP+ communication.
3. Serial, Web UI.
4. All LEDs
## Known issues
None.
## PCB
Manufacturer information be found [on the product page](https://www.trendnet.com/support/support-detail.asp?prod=105_TEG-S562).
Top side
<img src="photos/TEG-S562/TEG-S562-v1.0R-top.jpg" width="300" />
Bottom
<img src="photos/TEG-S562/TEG-S562-v1.0R-bottom.jpg" width="300" />
## Connectors
### Port overview
```
┌─────────────────────────────────────────────────────────────────────────────┐
│ ┌──────────┐ ┌──────────┐ │
│ ┌─────────┐ ┌─────────┐ ┌─────────┐ ┌─────────┐ │ SFP 2 │ │ SFP 1 │ │
│ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ RJ45 │ │ PORT 5 │ │ PORT 6 │ │
│ │ PORT 1 │ │ PORT 2 │ │ PORT 3 │ │ PORT 4 │ │ MAC 8 │ │ MAC 3 │ │
│ │ MAC 4 │ │ MAC 5 │ │ MAC 6 │ │ MAC 7 │ │ SerDes 0 │ │ SerDes 1 │ │
│ └─────────┘ └─────────┘ └─────────┘ └─────────┘ └──────────┘ └──────────┘ │
└─────────────────────────────────────────────────────────────────────────────┘
```
### J2, serial console
| `J2` pin | Signal |
| -------- | ----------- |
| 1 | 3V3 |
| 2 | TX (Output) |
| 3 | RX (Input) |
| 4 | GND |
Note: 1 pin is square shaped, towards the power input.
### J5, power pass-thru
| `J5` pin | Signal |
| -------- | ------ |
| 1 | 12V |
| 2 | 12V |
| 3 | GND |
| 4 | GND |
Note: 1 pin is square shaped.
### U5, I2C eeprom placeholder
| `J5` pin | Signal |
| -------- | ------------- |
| 1 | GND |
| 2 | GND |
| 3 | GND |
| 4 | GND |
| 5 | 3V3 |
| 6 | ??? Logic Low |
| 7 | SCL |
| 8 | SDA |
SOC I2C address is 0x5c.
### SW1 GPIO switch?
Not populated but looks like a switch for selecting
GPIO level. Missing resistors in place.
GPIO mapping unknown.
### S2 Reset ciruit
Not populated but looks like a button can be added on `S2` connector,
requires additional `R571` resistor which will pull signal to ground.
GPIO mapping unknown.
### GPIO
| HEX VAL. | GPIO | When | GPIO | When |
| -------- | ------ | ----------------| ------ | -----------------------|
| 00000001 | GPIO00 | | GPIO32 | |
| 00000002 | GPIO01 | | GPIO33 | |
| 00000004 | GPIO02 | | GPIO34 | Random changes |
| 00000008 | GPIO03 | | GPIO35 | |
| 00000010 | GPIO04 | | GPIO36 | SFP2 Present |
| 00000020 | GPIO05 | | GPIO37 | SFP2 RX Los |
| 00000040 | GPIO06 | | GPIO38 | SFP1 Present |
| 00000080 | GPIO07 | | GPIO39 | |
| 00000100 | GPIO08 | | GPIO40 | |
| 00000200 | GPIO09 | | GPIO41 | |
| 00000400 | GPIO10 | | GPIO42 | Random changes |
| 00000800 | GPIO11 | | GPIO43 | |
| 00001000 | GPIO12 | PORT1 Link | GPIO44 | |
| 00002000 | GPIO13 | PORT1-LED-GREEN | GPIO45 | |
| 00004000 | GPIO14 | PORT1-LED-AMBER | GPIO46 | SFP1 I2C CLK |
| 00008000 | GPIO15 | PORT2 Link | GPIO47 | SFP1 I2C SDA |
| 00010000 | GPIO16 | PORT2-LED-GREEN | GPIO48 | SFP2 I2C CLK |
| 00020000 | GPIO17 | PORT2-LED-AMBER | GPIO49 | SFP2 I2C SDA |
| 00040000 | GPIO18 | PORT3 Link | GPIO50 | SFP1 Rx LOS |
| 00080000 | GPIO19 | PORT3-LED-GREEN | GPIO51 | SFP2 TX Disable |
| 00100000 | GPIO20 | PORT4-LED-AMBER | GPIO52 | |
| 00200000 | GPIO21 | PORT4 Link | GPIO53 | |
| 00400000 | GPIO22 | PORT4-LED-GREEN | GPIO54 | SFP1 TX Disable |
| 00800000 | GPIO23 | PORT4-LED-AMBER | GPIO55 | |
| 01000000 | GPIO24 | | GPIO56 | |
| 02000000 | GPIO25 | | GPIO57 | |
| 04000000 | GPIO26 | | GPIO58 | |
| 08000000 | GPIO27 | | GPIO59 | |
| 10000000 | GPIO28 | | GPIO60 | |
| 20000000 | GPIO29 | | GPIO61 | |
| 40000000 | GPIO30 | | GPIO62 | |
| 80000000 | GPIO31 | | GPIO63 | |
## LEDs
Ports 1-4 are amber for 100M/1G links, Green for 2.5G.
Port 5-6 are green for 10G/1G link. Both should flash on activity.
| NAME | When active |
| ---------------- | ---------------|
| PWR | 3V3 |
| SFP1 | |
| SFP2 | |
| PORT1-LED-GREEN | - |
| PORT2-LED-GREEN | PORT2 2.5G |
| PORT3-LED-GREEN | PORT3 2.5G |
| PORT4-LED-GREEN | PORT4 2.5G |
| PORT1-LED-AMBER | PORT1 1GB/100M |
| PORT2-LED-AMBER | PORT2 1GB/100M |
| PORT3-LED-AMBER | PORT3 1GB/100M |
| PORT4-LED-AMBER | PORT4 1GB/100M |
## Power supply
Input power is delivered via barell plug, `12V 1A` adapter was provided.
Board has two supply rails. `0.95` and `3.3` volt.
### `0.95` Core Voltage
Voltage is made by a `APW8713` (U3).
### `3.3` Voltage
Voltage is crated regulated by chip marked as `GoIAT` (U2).
## SFP SPI
There is separate clock and data lines for both SFP modules. MSDA/MSCK 0 and 1 need to be enabled.
SFP1 slot is connected to SPI0. SFP2 slot is connected to SPI1.
doc/devices/ZX310S-4T2XH.md
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# ZX310S-4T2XH/
The following is a documentation for the managed switch marked as `ZX310S-4T2XH`
and sold by Horaco.
The original software is running UART on 57600 baud rate. The solder holes
of the UART header are filled in. In order to install a UART header, they
need to be cleared first. A 1.2mm drill can be used, alternatively a
de-soldering wick.
The original firmware uses 57600 baud 8N1
CPU: RTL8372
Flash: 2MByte Winbond W25Q16DV (U3)
PHY RTL8261BE
### Label specifications
- **Name**:
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 1 x RJ45: 10/100/1000/2500/5000/10000 Mbps
- 1 × SFP+: 1000 / 2500 / 10000 Mbps
- **Power**: 12V DC, 2A barrel connector
<img src="photos/ZX310S-4T2XH/label.jpg" width="300" />
### What works
The device is fully supported:
- All 4 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
- The 10GBit port works. TODO: Fix EEE, speed selection
- The SFP+ port supports 1G, 2.5G and 10G modules
- LEDs work with the same indiciations as the OEM firmware
### PCB overview
**Board markings**
- Top silkscreen: PCB-SL310S-4T1T1X-V1.0.1-24107
Top side
<img src="photos/ZX310S-4T2XH/pcb_top.jpg" width="300" />
Bottom
<img src="photos/ZX310S-4T2XH/pcb_bottom.jpg" width="300" />
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | TX (Output) |
| 2 | RX (Input) |
| 3 | GND |
| 4 | 3V3 |
## Power supply
Input power is delivered via barell plug, `12V 2A` adapter was provided.
doc/devices/ZX310S-4T2XT.md
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# ZX310S-4T2XT
The following is a documentation for the managed switch marked as
`ZX310S-4T2XT` and sold by Horaco.
The original software is running UART on 57600 baud rate 8N1.
CPU: RTL8372
Flash: 2MByte Winbond W25Q16DV (U3)
PHY 2x RTL8261BE
### Label specifications
- **Name**:
- **Ports**:
- 4 × RJ45: 10/100/1000/2500 Mbps
- 2 x RJ45: 10/100/1000/2500/5000/10000 Mbps
- **Power**: 12V DC, 2A barrel connector
<img src="photos/ZX310S-4T2XT/label.jpg" width="300" />
### What works
The device is fully supported:
- All 4 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps, including EEE
- The 10GBit ports works, including EEE.
- LEDs work with the same indiciations as the OEM firmware
### PCB overview
**Board markings**
- Top silkscreen: PCB-SL310S-4T2XT-V1.0.0-22273
Top side
<img src="photos/ZX310S-4T2XT/pcb_top.jpg" width="300" />
Bottom
<img src="photos/ZX310S-4T2XT/pcb_bottom.jpg" width="300" />
### J1, serial console
| `J1` pin | Signal |
| -------- | ----------- |
| 1 | TX (Output) |
| 2 | RX (Input) |
| 3 | GND |
| 4 | 3V3 |
## Power supply
Input power is delivered via barell plug, `12V 2A` adapter was provided.
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# Understanding the image using ghidra
Start ghidra, load file starting from offset 0x0002 into
memory starting at 0x0000. The lengthe is 0x10000. Select generic 8051, big
endian.
After loading, the boot vector is at 0x0000, which will jump to 0x0100 for
the boot routine.
The firmware uses only bank 1 of the RTL837x since it is quite short.
Otherwise the firmware would be organized as follows
```
--------------------------- 0x0000 ---------------------------------
Boot-Vector
ISRs
Common Code
Trampoline for inter-bank calls
Inter-bank calls, calling trampoline, one for each callable function
----- Bank 1 0x4000 ------ ---- Bank 2 0x4000 ----- -------- .....
Overlay 1 Overlay 2 Overlay n
--------- 0xffff --------- -------- 0xffff -------- -------- 0xffff
```
The RTL837x firmware images are organized as follows:
The first 2 bytes of the image give the size of the prefetched data at the
start of the CPU power up. The default is 0x4000 (bytes: 0x00 0x40), which
means that the entire shared area of the code memory in all banks,
0x4000 bytes is read immediately into the code RAM.
Common code starts at
0x0002 in the image and has length 0x3ffd, the first bank starts at 0x4000
in the image, is mapped to 0x4000 and has length 0xc000. The second bank
starts at 0x10000, is mapped to 0x4000 and has length 0xc000. The third
bank would start at 0x1c000 and would again be mapped to 0x4000.
There are about 30 banks in use for managed switches, unmanaged ones use
2-3, while the hardware would allow to use 0x3f banks, i.e. up to 4 MB of
flash.
The current image uses Common BANK0 and the first BANK1 via sdccs __banked
function keyword and custom banking trampoline code for the RTL837x in
assembler.
doc/gpio.md
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# GPIO Pin, Function and MUX registers.
These functions should bevalid for `RTL8372`, `RTL8372N`, `RTL8373`, and `RTL8373N`.
`N`-version doesn't seems to have all the GPIO pins available on the outside of the package.
| GPIO | Function | TYPE | MUX REG, BIT | (RTL8372) PIN# | (RTL8372N) PIN# |
| ----- | ---- | ---- | ---- | ---- | ---- |
| GPIO0 | LED0 | I/OPU | IO_MUX_SEL_0, BIT 0 | G1 | 12 |
| GPIO1 | LED1 | I/OPU | IO_MUX_SEL_0, BIT 1 | G2 | 15 |
| GPIO2 | LED2 | I/OPU | IO_MUX_SEL_0, BIT 2 | G3 | 14 |
| GPIO3 | LED3 | I/OPU | IO_MUX_SEL_0, BIT 3 | H1 | 16 |
| GPIO4 | LED4 | I/OPU | IO_MUX_SEL_0, BIT 4 | H2 | 18 |
| GPIO5 | LED5 | I/OPU | IO_MUX_SEL_0, BIT 5 | H3 | 20 |
| GPIO6 | LED6 | I/OPU | IO_MUX_SEL_0, BIT 6 | J1 | 22 |
| GPIO7 | LED7 | I/OPU | IO_MUX_SEL_0, BIT 7 | J2 | NoPin? |
| GPIO8 | LED8 | I/OPU | IO_MUX_SEL_0, BIT 8 | J3 | 24 |
| GPIO9 | LED9 | I/OPD | IO_MUX_SEL_0, BIT 9 | L1 | 23 |
| GPIO10 | LED10 | I/OPU | IO_MUX_SEL_0, BIT 10 | L2 | 26 |
| GPIO11 | LED11 | I/OPU | IO_MUX_SEL_0, BIT 11 | L3 | NoPin? |
| GPIO12 | LED12 | I/OPD | IO_MUX_SEL_0, BIT 12 | M1 | 28 |
| GPIO13 | LED13 | I/OPU | IO_MUX_SEL_0, BIT 13 | M2 | NoPin? |
| GPIO14 | LED14 | I/OPU | IO_MUX_SEL_0, BIT 14 | M3 | NoPin? |
| GPIO15 | LED15 | I/OPU | IO_MUX_SEL_0, BIT 15 | N1 | 25 |
| GPIO16 | LED16 | I/OPU | IO_MUX_SEL_0, BIT 16 | N2 | NoPin? |
| GPIO17 | LED17 | I/OPU | IO_MUX_SEL_0, BIT 17 | N3 | NoPin? |
| GPIO18 | LED18 | I/OPD | IO_MUX_SEL_0, BIT 18 | P1 | 30 |
| GPIO19 | LED19 | I/OPU | IO_MUX_SEL_0, BIT 19 | P2 | NoPin? |
| GPIO20 | LED20 | I/OPU | IO_MUX_SEL_0, BIT 20 | P3 | NoPin? |
| GPIO21 | LED21 | I/OPU | IO_MUX_SEL_0, BIT 21 | R1 | 27 |
| GPIO22 | LED22 | I/OPU | IO_MUX_SEL_0, BIT 22 | R2 | NoPin? |
| GPIO23 | LED23 | I/OPU | IO_MUX_SEL_0, BIT 23 | R3 | NoPin? |
| GPIO24 | LED24 | I/OPU | IO_MUX_SEL_0, BIT 24 | N19 | 88 |
| GPIO25 | LED25 | I/OPU | IO_MUX_SEL_0, BIT 25 | P19 | 86 |
| GPIO26 | LED26 | I/OPU | IO_MUX_SEL_0, BIT 26 | P18 | 84 |
| GPIO27 | LED27 | I/OPU | IO_MUX_SEL_0, BIT 27 | R19 | 82 |
| GPIO28 | SYS_LED | I/OPU | IO_MUX_SEL_0, BIT 28 | F1 | 13 |
| GPIO29 | GLB_RLDP_LED_EN | | IO_MUX_SEL_0, BIT 29 | | NoPin? |
| GPIO30 | ACL_BIT3_EN | | IO_MUX_SEL_2, BIT 3 | F3 | 11 |
| GPIO31 | UART TX (OUTPUT) | | IO_MUX_SEL_1, BIT 0 | L20 | 90 |
| GPIO32 | UART TX (INPUT) | | IO_MUX_SEL_1, BIT 1 | L21 | |
| GPIO33 | GPIO_INT | | IO_MUX_SEL_1, BIT 2 | | |
| GPIO34 | MDC0 | | IO_MUX_SEL_1, BIT 3 | | |
| GPIO35 | MDIO0 | | IO_MUX_SEL_1, BIT 4 | | |
| GPIO36 | PWM_OUT | | IO_MUX_SEL_1, BIT 30 | B13 | |
| GPIO37 | --- | | | L18 | |
| GPIO38 | --- | | | K19 | |
| GPIO39 | MSDA4 | | IO_MUX_SEL_1, BIT 29 | K20 | 95 |
| GPIO40 | MDC1/SCL3 | | IO_MUX_SEL_1, BIT 5 & 6 | J29 | |
| GPIO41 | MDIO1/MSDA3 | | IO_MUX_SEL_1, BIT 5 & 6 | J19 | |
| GPIO42 | SPI-MEMORY | | RTL8373_INI_MODE_ADDR, BIT 0 & 1 | D1 | |
| GPIO43 | SPI-MEMORY | | RTL8373_INI_MODE_ADDR, BIT 0 & 1 | E1 | |
| GPIO44 | SPI-MEMORY | | RTL8373_INI_MODE_ADDR, BIT 0 & 1 | D2 | |
| GPIO45 | SPI-MEMORY | | RTL8373_INI_MODE_ADDR, BIT 0 & 1 | E2 | |
| GPIO46 | MSCK0 | | IO_MUX_SEL_1, BIT 7 & 8 | A2 | |
| GPIO47 | MSDA0 | | IO_MUX_SEL_1, BIT 9 & 10 | B2 | |
| GPIO48 | MSCK1 | | IO_MUX_SEL_1, BIT 11 & 12 | A1 | |
| GPIO49 | MSDA1 | | IO_MUX_SEL_1, BIT 13 & 14 | B1 | |
| GPIO50 | MSCL2/U1TXD | | IO_MUX_SEL_1, BIT 15 & 16 | C1 | |
| GPIO51 | MSDA2/U1RXD | | IO_MUX_SEL_1, BIT 17 & 18 | C2 | |
| GPIO52 | ACL_BIT0_EN | | IO_MUX_SEL_2, BIT 0 | | |
| GPIO53 | ACL_BIT1_EN | | IO_MUX_SEL_2, BIT 1 | | |
| GPIO54 | ACL_BIT2_EN | | IO_MUX_SEL_2, BIT 2 | E5 | |
| GPIO55 | PTP_CLK125M_IN | | IO_MUX_SEL_1, BIT 19 | | |
| GPIO56 | PTP_CLK_OUT | | IO_MUX_SEL_1, BIT 20 | | |
| GPIO57 | PTP_TOD_OUT | | IO_MUX_SEL_1, BIT 21 | | |
| GPIO58 | PTP_PPS_OUT | | IO_MUX_SEL_1, BIT 22 | | |
| GPIO59 | PTP_TOD_IN | | IO_MUX_SEL_1, BIT 23 | | |
| GPIO60 | PTP_PPS_IN | | IO_MUX_SEL_1, BIT 24 | | |
| GPIO61 | SYNCELOCK0 | | IO_MUX_SEL_1, BIT 27 | | |
| GPIO62 | SYNCELOCK1 | | IO_MUX_SEL_1, BIT 28 | | |
| GPIO63 | GPIO_MDIO0 | | IO_MUX_SEL_1, BIT 4 | | |
## I2C
| I2C | Function |Type | (RTL8372) PIN# | (RTL8372N) PIN# |
| ---- | ---- | ---- | ---- | ---- |
| GPIO47 | SDA0 | I/OPU | | B1 | 142 |
| GPIO49 | SDA1 | I/OPU | | B2 | 144 |
| GPIO51 | SDA2 | I/OPU | | C2 | ??? |
| GPIO41 | SDA3 | I/OPU | | J20 | 98 |
| GPIO39 | SDA4 | I/OPU | | K20 | 95 |
| GPIO46 | SCL0 | I/OPU | | A2 | 138 |
| GPIO48 | SCL1 | I/OPU | | A1 | 140 |
| GPIO50 | SCL2 | I/OPU | | C1 | ??? |
| GPIO40? | SCL3 | OPU | | J20 | |
# Other funcitons
| Function | Type | (RTL8372) PIN# | (RTL8372N) PIN# |
| ---- | ---- | ---- | ---- |
| nRESET | | A6 | 131 |
| PTP_SYNC | | B10 | 130 |
| INT | OPU | B6 | 132 |
doc/hardware.md
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#RTL8272/3 features
The following hardware features of the RTL8372/3 is supported:
- Clock generation, including different divider settings
- Interrupt control for timer, serial, external irqs 0, 1
- Serial console via SFRs
- Flash operations via SFRs
- Bank switching via SFRs
- Access to Switch registers via SFRs
- LED setup
- Reset
- Some switch settings such as MAC configuration
- GPIO to detect SFP module insert/removal/RX-LOS (depending on device/module support)
- I2C to read SFP EEPROM on 1 and 2 SFP slot devices
- NIC setup
- L2 learning table access, L2 table flushing
- VLAN setup/configuration
- Port mirroring
- Access to PHYs via MDIO (clause 45 via SFR):
- Internal PHYs of RTL8372 and RTL8373
- RTL8221 (1x2.5GBit port on devices with 5 ports)
- RTL8224 (4x2.5GBit ports on devices with 8 ports)
- SerDes settings of SoC via SFR:
- Configure SFPs with 10Gbit/2.5Gbit/1Gbit (Ethernet and Fiber SFP(+) tested)
- RTL8221, RTL8224
- NIC TX and RX of packets via SFRs
- send and receive Ethernet frames via SFRs and Switch registers
- RTL-tags and VLAN ingress-tag decoding for CPU-port
Ethernet frame RX IRQ via IRQ1 is conceptually understood, but not activated. RX is
currently done via polling, which allows ping-times of <10ms.
The RTL8372/3 have 256 bytes of internal RAM (INTMEM) accessible through MOV
instructions, which are used for the stack and important globals. Some of
these are bit-adressable, e.g. for storing global flags.
Additionally, 64kB of extended RAM (XMEM) is built in, which is accessed
through the MOVX instruction. It is used for global variables, for most
of the function argument passing that is not done using the 8 registers
R0-R7 or registers A/B, and for local variables (which requires extremely
careful planning). The flash memory is transparently accessible for code
being executed and can be used to store configuration. Access is done through
the MOVC instruction, possibly setting the bank register before and
resetting it to access the entire 4MB space. Code is prefetched from flash
and cached in a small RAM automatically by the HW.
The peripherial functions are accessed through 2 different mechanisms:
- Special Function Registers (SFRs, 0x80-0xff) for banking, timers, UART, access to
switch registers, MDIO, SPI (flash) and NIC transfers. Some SFRs are not
used for HW purposes and can be used as RAM. Some SFRs are bit-adressable,
allowing for very tight event wait loops (a single 2-byte instruction).
- 0x10000 switch registers, which appear to be very similar to the registers
of the RTL838x, for which source code and datasheets are available. This
controls clock dividers, GPIO/LEDs and general switch functionality.
The playground image shows access to the different types of memory using the
SDCC compiler. Any support of Linux or e.g. Zephyr would require porting gcc.
There are FreeRTOS ports to 8051 processors using sdcc, however.
doc/igmp.md
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# IGMP (Internet Group Management Protocol) and MLD (Multicast Listener Discovery)
IGMP (for IPv4) and MLD (for IPv6) are protocols that control the distribution
of Layer-3 Multicast packets on the LAN, which otherwise would be flooded across the
entire network. For this to work, IGMP/MLD messages are sent, in particular
from MC consumers (e.g. the video-player that plays an IP-Multicast stream), but
also Multicast-aware routers to control switching of the IP-MC or underlying
L2-MC packets. The main usage in home networks is IPTV.
The RTL8372/3 SoC supports managing IPv4-MC using either Destination-IP (the IPv4
multicast group address)/Source-IP (typically 0.0.0.0) matching or via controlling
the switching of the underlying L2-MC packets (i.e. packets in 01:00:5e:xx:yy:zz, where
xx:yy:zz are the LSBs of the IPv4-MC address). The DIP/SIP-based switching is
not VLAN-aware, meaning a stream will be available in all VLANs if subscribed to.
This is not a problem in a typical home network, however. The L2-based method
is VLAN aware, but currently not supported in the software.
Although there is hardware support for IPv6/MLD-based Multicast management (i.e. intelligent
management by the switch), the current software does not implement managing IPv6 Multicast.
Instead, all IPv6 Multicast pakets will be flooded to all ports, just as an unmanaged
switch would do.
The current software support works by trapping IGMP packets (only v3 supported, which
is used in the vast majority of today's networks) to the CPU of the switch which will
update the L3 and L2 switching tables to include switch ports in a stream or remove
them. This trapping to the CPU is also called IGMP snooping. While there is support
in the HW to handle IGMP/MLD packets (v3 has only limited support) entirely in hardware
and even send out reports, it is currently not understood
how this works, and instead IGMP is handled entirely in software, which also allows
to fully support IGMPv3 packet which are the standard in present-day networks.
## IP-MC control
The relevant registers for controlling IP-MC switching are:
```
#define RTL837X_IPV4_PORT_MC_LM_ACT 0x4f78
#define RTL837X_IPV6_PORT_MC_LM_ACT 0x4f7c
#define RTL837X_IGMP_PORT_CFG 0x52a0
#define IGMP_MAX_GROUP 0x00ff0000
#define IGMP_PROTOCOL_ENABLE 0x00007c00
#define IGMP_TRAP 0x0000002a
#define IGMP_FLOOD 0x00000015
#define IGMP_ASIC 0x00000000
#define RTL837X_IGMP_ROUTER_PORT 0x529c
#define RTL837X_IPV4_UNKN_MC_FLD_PMSK 0x5368
#define RTL837X_IPV6_UNKN_MC_FLD_PMSK 0x536c
#define RTL837X_IGMP_TRAP_CFG 0x50bc
#define IGMP_TRAP_PRIORITY 0x7
#define IGMP_CPU_PORT 0x00010000
```
`RTL837X_IPV4_PORT_MC_LM_ACT/RTL837X_IPV6_PORT_MC_LM_ACT` control the action when an
IP-MC packet is encountered at a switch port and there is no rule for forwarding in
the forwarding tables. The default action is to flood such Lookup-Miss packets to all
ports. This is the configuration without IGMP/MLD enabled.
When IGMP/MLD is turned on, the Lookup-Miss action will be changed to drop such packets
unless a rule is found in the forwarding tables, which will need to be configured by
IGMP packets.
Switching on IGMP also configures all ports via `RTL837X_IGMP_PORT_CFG` to trap all
incoming IGMP packets to the CPU. `RTL837X_IGMP_TRAP_CFG` then is used to configure
priority and CPU-Port of trapped IGMP/MLD packets.
Configuration of the IP-MC-forwarding to the listening ports is done by managing the
forwarding tables of the switch, see [L2 learning](l2.md).
## IGMP API
The code currently provides the following functions:
```
void igmp_setup(void) __banked;
void igmp_enable(void) __banked;
void igmp_router_port_set(uint16_t pmask) __banked;
void igmp_packet_handler(void) __banked;
void igmp_show(void) __banked;
```c
`igmp_setup()` is called at boot-time and configures flooding of all IP-MC packets by
default, as otherwise no IP-MC would be possible in the network.
`igmp_enable()`starts IGMP which cause IGMP packets to be handled by the CPU and forwarding
of IP-MC packets to be limited to only subscribed ports.
`igmp_router_port_set()`configures forwarding ports for IGMP messages.
`igmp_packet_handler()` implements handling of trapped IGMP packets by the CPU.
`igmp_show()` prints out the IGMP configuration on the CLI.
## IGMP configuration on the Serial Console
For testing the following commands are provided on the serial console:
```
> igmp [on/off]
Enables or disables IGMP
> igmp show
Shows information on IGMP
```
## LAG configuration via the Web Interface
Not implemented, yet!
## A Test with IP-MC streaming using vlc
The following is a simple test verifying the IGMP and IP-MC switching capabilities.
You will need 2 Linux/Windows devices with a GUI plus a switch.
Connect the switch to an MC-aware router (e.g. to your home network). Connect the 2 Linux/Windows
devices to the switch. The connection to the router makes sure that Linux/Windows will send
out IGMP messages on the ports connected to the switch, which they will only do if they are aware
that there is a MC-aware router in the network. Make sure the 2 GUI devices are in the home network
(e.g. via DHCP).
Start streaming on one of the Linux/Windows machines:
```
$ vlc your_video.mp4 --sout="#std{access=udp, mux=ts, dst=239.255.0.1:8090}"
```
At this point you should see all switch ports flickering heavily as the MC stream is switched to all
switch ports, including flooding your home network. If you do not see any packets arriving at the switch,
you can force the output interface of vlc by using `--miface=<ifname>`
Enable IGMP on the switch-CLI:
```
> igmp on
```
The flickering should now stop on all ports except the port where the streaming device is connected:
the switch drops all IP-MC packets as there are no listeners.
Now, on the second Linux/Windows device start listening to the stream:
```
$ vlc udp://@239.255.0.1:8090
```
You should see the port-led of the port the displaying machine is connected to, to start flickering
and after some synchronization, the video should start playing.
Stopping vlc should also switching of the IP-MC frames to the listening device, i.e. the port-leds
should stop flickering.

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