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Add EEE status query

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logicog
2025-10-20 18:35:35 +02:00
parent 7546d0c685
commit 0d64efacb3
5 changed files with 101 additions and 15 deletions
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cmd_parser.c
+15 -5
View File
@@ -469,9 +469,16 @@ void cmd_parser(void) __banked
print_string("Parsing command\n");
print_string_x(&cmd_buffer[0]);
write_char('<'); write_char('\n');
print_string("CMD-words: ");
print_byte(cmd_words_b[0]); write_char(' ');
print_byte(cmd_words_b[1]); write_char(' ');
print_byte(cmd_words_b[2]); write_char(' ');
print_byte(cmd_words_b[3]); write_char(' ');
print_byte(cmd_words_b[4]); write_char(' ');
print_byte(cmd_words_b[5]); write_char(' ');
print_byte(cmd_words_b[6]); write_char('\n');
#endif
signed char i = cmd_words_b[0];
if (i >= 0 && cmd_words_b[1] >= 0) {
if (cmd_words_b[0] >= 0 && cmd_words_b[1] >= 0) {
if (cmd_compare(0, "reset")) {
print_string("\nRESET\n\n");
reset_chip();
@@ -636,23 +643,26 @@ void cmd_parser(void) __banked
}
if (cmd_compare(0, "eee")) {
int8_t port = -1;
if (cmd_words_b[2] > 0) {
if (cmd_words_b[3] > 0) {
port = cmd_buffer[cmd_words_b[2]] - '1';
if (!isRTL8373)
port = phys_to_log_port[port];
}
if (cmd_words_b[1] > 0 && cmd_compare(1, "on")) {
print_string("EEE enabled\n");
if (port >= 0)
port_eee_enable(port);
else
port_eee_enable_all();
} else if (cmd_words_b[1] > 0 && cmd_compare(1, "off")) {
print_string("EEE disabled\n");
if (port >= 0)
port_eee_disable(port);
else
port_eee_disable_all();
} else if (cmd_words_b[1] > 0 && cmd_compare(1, "status")) {
if (port >= 0)
port_eee_status(port);
else
port_eee_status_all();
}
}
}
phy.h
+14 -4
View File
@@ -12,15 +12,25 @@
* Define PHY pages
*/
#define PHY_MMD_AN 7
#define PHY_SDS_CTRL 30
#define PHY_MMD_CTRL 31
/*
* Define registers in Auto-Negotiation page
*/
#define PHY_ANEG_CTRL 0x00
#define PHY_EEE_ADV 0x3c
#define PHY_EEE_ABILITY 0x3d
#define PHY_EEE_ADV2 0x3e
#define PHY_ANEG_CTRL 0x00
#define PHY_EEE_ADV 0x3c
#define PHY_EEE_LP_ABILITY 0x3d
#define PHY_EEE_ADV2 0x3e
#define PHY_EEE_LP_ABILITY2 0x3f
// Register bits for EEE capabilities at a given speed
#define PHY_EEE_BIT_2G5 0x01
#define PHY_EEE_BIT_1G 0x04
#define PHY_EEE_BIT_100M 0x02
/*
* Define registers in Control page
*/
#define PHY_CTRL_5 0x7582
#endif
rtl837x_port.c
+67 -6
View File
@@ -484,13 +484,12 @@ void port_eee_enable(uint8_t port) __banked
{
if (is_sfp[port])
return;
print_string("EEE on for "); print_byte(port); write_char('\n');
REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100 | EEE_1000 | EEE_2G5);
// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, 6); // Bit 1: 100BASE-T, Bit 2: 1000BASE-T
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
// Enable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, 1);
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, PHY_EEE_BIT_2G5);
phy_reset(port);
}
@@ -502,14 +501,69 @@ void port_eee_disable(uint8_t port) __banked
print_string("EEE off for "); print_byte(port); write_char('\n');
REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), 0);
// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
// Disable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, 0);
// Enable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2
// Disable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2
phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, 0);
phy_reset(port);
}
void port_eee_status(uint8_t port) __banked
{
print_string("Port: "); write_char('0' + log_to_phys_port[port]);
print_string(": ");
if (is_sfp[port]) {
print_string("SFP\n");
return;
}
uint16_t v;
print_string("Advertising: ");
phy_read(port, PHY_MMD_AN, PHY_EEE_ADV2);
v = SFR_DATA_U16;
if (v & PHY_EEE_BIT_2G5)
print_string(" 2.5G");
else
print_string(" ");
phy_read(port, PHY_MMD_AN, PHY_EEE_ADV);
v = SFR_DATA_U16;
if (v & PHY_EEE_BIT_1G)
print_string(" 1G ");
else
print_string(" ");
if (v & PHY_EEE_BIT_100M)
print_string(" 100M");
else
print_string(" ");
print_string(" Link Partner: ");
phy_read(port, PHY_MMD_AN, PHY_EEE_LP_ABILITY2);
v = SFR_DATA_U16;
if (v & PHY_EEE_BIT_2G5)
print_string(" 2.5G");
else
print_string(" ");
phy_read(port, PHY_MMD_AN, PHY_EEE_LP_ABILITY);
v = SFR_DATA_U16;
if (v & PHY_EEE_BIT_1G)
print_string(" 1G ");
else
print_string(" ");
if (v & PHY_EEE_BIT_100M)
print_string(" 100M");
else
print_string(" ");
reg_read_m(RTL8373_PHY_EEE_ABLTY);
if (sfr_data[3] & (1 << port))
print_string(" ACTIVE ");
else
print_string(" INACTIVE ");
write_char('\n');
}
void port_eee_enable_all(void) __banked
{
for (uint8_t i = minPort; i <= maxPort; i++) {
@@ -526,6 +580,13 @@ void port_eee_disable_all(void) __banked
}
void port_eee_status_all(void) __banked
{
for (uint8_t i = minPort; i <= maxPort; i++) {
port_eee_status(i);
}
}
/*
* Enable RLDP, Realtek's version of LLDP
*/
rtl837x_port.h
+2
View File
@@ -29,6 +29,8 @@ void port_l2_setup(void) __banked;
void trunk_set(uint8_t group, uint16_t mask) __banked;
void port_eee_enable_all(void) __banked;
void port_eee_disable_all(void) __banked;
void port_eee_status_all(void) __banked;
void port_eee_enable(uint8_t port) __banked;
void port_eee_disable(uint8_t port) __banked;
void port_eee_status(uint8_t port) __banked;
#endif
rtl837x_regs.h
+3
View File
@@ -158,6 +158,9 @@
/*
* EEE
*/
#define RTL837X_EEE_STATUS 0x125C
#define RTL837X_MAC_EEE_ABLTY 0x6404
#define RTL8373_PHY_EEE_ABLTY 0x642C
#define RTL8373_EEE_CTRL_BASE 0x606c
#define EEE_100 0x01
#define EEE_1000 0x04