Commit Graph
149 Commits
Author SHA1 Message Date
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
René van Dorst 00b42db5da Merge pull request #78 from logicog/nic_demagic
MIB Counter fixes and Detailed Display
2026-01-15 18:45:38 +00:00
logicog d2d7ab7ff1 De-magic NIC rx and tx registers, cleanup 2026-01-11 07:51:18 +01:00
René van Dorst f43bb4eac4 Fix: Serial Timer1: GATE bit should be off.
Fixes PR#66, commit c5c6b97 and 4e8eb6d.

The GATE-bit should not be used. Timer1 must always be activated to
generate the baudrate clock for serial 0.
2026-01-10 11:01:17 +01:00
logicog 4e8eb6d766 Merge pull request #66 from vDorst/fix_systick_asm
Move SYS_TICK to Timer2 and SERIAL baudrate gen to Timer1.
2026-01-09 08:22:30 +01:00
René van Dorst c5c6b97ad1 installer: SERIAL: Use Timer1 instead of Timer2
Same as in the main code.

Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Only differance is that the serial is transmit only and poll-based so no
interrupts are used to transmit data.
2026-01-09 07:52:35 +01:00
René van Dorst 229fad3809 Merge pull request #73 from logicog/dio
Enable Flash Dual I/O command by default.
Speed up data transfers up to 2x.
2026-01-08 21:52:52 +00:00
logicog e085fc9cc9 Convert unconditional prints to debug prints in httpd 2026-01-08 09:56:43 +01:00
logicog f621563479 Enable DIO by default 2026-01-08 06:44:38 +01:00
René van Dorst b818a94202 SERIAL: Wrong use of TI-flag causes IRQ-storm.
TI-interrupt flag is used in the code, this is only
fine when SERIAL-interrupt is not enabled/used but
when is it used, it generates an interrupt which is
not handled, so it keeps generating interrupts and
trashing the performance and caused starvation on
lower priority interrupts like TIMER 2.

Use an extra flag to signal to the code that the
TX-buffer is empty.
2026-01-04 14:16:28 +01:00
René van Dorst bbd4656810 SERIAL: Use Timer1 instead of Timer2
Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Timer2 16-bit auto-reload can now be used for other tasks like SYS_TICK.
2026-01-04 14:15:30 +01:00
René van Dorst 8b061d5fb9 SYS_TICK: Use Timer2 instead of Timer0.
Downside of Timer0 is, we have to manually reload
the timer value. Timer2 can do that automaticly.
This saves a lot of time in the interrupt-handler
of the Timer.

Currently Timer2 is used for baudrate-generation
but in a separete commit this is moved to Timer1.
2026-01-04 14:14:52 +01:00
René van Dorst 9ff114d234 SYSTICK: Fix writing value to TMR0 registers.
A `%` modulo operator was used instead of a
`&` and-operator, to split a 16 bit value into two
8 bit values.
This causes that the SYSTICKs were 0.1% too fast.

Replace the manual split with a sfr16 type, so the
compiler does the split for us.
2025-12-26 10:07:13 +01:00
logicog 2b364943c2 Fix system clock 2025-12-25 10:27:37 +01:00
Tobias Diedrich f46cb02828 Add rounding to baud rate calculation
Without rounding:
- Divisor: 33 = (125000000 / 115200 / 32)
- RCAP2 value: 65503
- Actual baud rate: 118371 = (125000000 / 32 / 33)
- Error: 2.75%

With rounding:
- Divisor: 34 = ((125000000 / 115200 + 16) / 32)
- RCAP2 value: 65502
- Actual baud rate: 114889 = (125000000 / 32 / 34)
- Error: 0.27%

Should fix https://github.com/logicog/RTLPlayground/issues/48
2025-12-20 08:37:28 +01:00
logicog 6272d949cd Add readout of SFF-8472 A2h info from SFPs 2025-12-16 20:06:27 +01:00
logicog c8c524b71f Add an implementation for IGMP
This adds an implementation for trapping IGMP packets to the CPU
which will identify IGMPv1/2/3 packets, but handle only v3.
The implementation then inserts/updates/deletes L3 MC entries
in the L3 lookup table. The entries consist of an Ipv4
Destination IP (the IPv4 MC address), a Source IP (0.0.0.0) and
a Portmask. Note that this implementation is not VLAN aware,
as there is no hardware support in the device.

An alternative strategy is to control switching of the L2-MC packets
in which the IPv4-MC packets are transported (dst-MaC is
01:00:5e:xx:yy:zz, with xx:yy:zz corresponding to bits in the Ipv4-MC
address). This will allow to use VLAN-aware packet switching. While
code support is there for table insert/update/deletes, some further
L2 configuration is missing.

There is no support for IPv6 MC, yet.
2025-12-15 06:54:41 +01:00
logicog a84c5dcd0c IGMP refactoring 2025-12-14 20:35:17 +01:00
René van Dorst 11d2c843e5 Fixed to make SWGT024 V2.0 work 2025-12-13 22:22:40 +01:00
logicog 28f832a24d Fix PHY issues 2025-12-13 22:22:40 +01:00
logicog d71a303f6c Move RTL8372 SMI address configuration 2025-12-13 22:22:40 +01:00
logicog 1cdc8d2cf7 De-Magic switch init 2025-12-13 09:25:58 +01:00
logicog edfb86bff4 Use SFP pin definitions and I2C ports for SFP modules 2025-12-13 09:25:58 +01:00
logicog d75ad636f9 Use machine structure 2025-12-12 09:06:52 +01:00
logicog 636981c3b8 Detect 2nd SFP-slot RX-Los on KP-9000-6XHML-2X 2025-12-08 08:39:54 +01:00
logicog 101b4937e1 Fix link change handling
The RTL8272/3 use 2 32 bit registers to indicate the MAC link speed, the
second register is used for ports 8 and 9, where 9 is the CPU port.
Use both registers.
2025-12-08 08:39:54 +01:00
logicog 32b5539670 Do not show non-ascii Transceiver field in SFP module description 2025-12-07 10:59:39 +01:00
logicog 9c21d94b65 Add read_reg_timer function 2025-12-01 18:26:46 +01:00
logicog 70c14fb23e Add get_random_32() 2025-12-01 18:26:46 +01:00
René van Dorst f59be9cf2b Added software version + git short hash string to firmware.
The Makefile has the version number and generates a version.h which
has VERSION_SW define that looks like "v<VERSION>-g<GIT_SHORT_HASH>".

Software version shows at boot in the serial console.
And shown with command: `version`.

It can also be requested via `information.json`.
```
{
    "ip_address": "192.168.10.247",
    "ip_gateway": "192.168.10.1",
    "ip_netmask": "255.255.255.0",
    "mac_address": "1c:2a:a3:23:00:02",
    "sw_ver": "v0.1.0-gd48235f",
    "hw_ver": "SWGT024-V2.0"
}
```
2025-11-26 23:08:23 +01:00
logicog 9c7572b289 De-Magic I2C configuration for SFP-EEPROM reads 2025-11-02 09:49:13 +01:00
René van Dorst d0b6a73bf2 Merge pull request #30 from logicog/crc16
CRC-16 Calculation and verification
2025-10-26 21:59:50 +00:00
logicog eb0e4df5ea Fix reset after image upload 2025-10-26 14:20:30 +01:00
logicog ba902a68d4 Defer cmd execution for console and via http POST 2025-10-21 18:05:33 +02:00
logicog ac4f0d410f Add CRC16 initial code 2025-10-20 07:29:39 +02:00
René van Dorst a59f92a648 Also use struct flash_region in flash_read_security(), flash_sector_erase(). 2025-10-05 16:53:46 +02:00
René van Dorst 7a87b79871 Convert flash_addr to struct flash_region.
flash_region storage flash address and length, which a operation is needed.
2025-10-05 15:36:08 +02:00
logicog 05492e601a Reducing IMEM footprint in flash routines 2025-09-30 20:45:44 +02:00
logicog 110c403443 Adding firmware update at beginning of boot if a new image is found in second half of flash 2025-09-30 20:45:44 +02:00
logicog 6aa28b7385 Cleanup and increase of flash_buf size for flash write buffer 2025-09-30 20:45:44 +02:00
logicog 9ad5fcb43e Add STP handling
Adds a timeer for calling the STP state machine which currently sends out
CNF (HELLO) packages.

Identifies incoming STP packets and calls the stp_in() routine to handle these.
2025-09-08 22:22:57 +02:00
René van Dorst 7e729c626c cmd: add reg read and write.
like:
* `reg w 04`
* `reg w 04 00023678`
2025-09-07 01:03:15 +02:00
René van Dorst 74b8280d80 gpio: SOC only has 64 gpio not 96.
Remove BANK_A
Rename BANK_B to GPIO_00_31
Rename BACK_C to GPIO_32_63

Added also _INPUT, _DIRECTIOn registers
2025-09-06 17:04:25 +02:00
René van Dorst c5995a4184 Add: phy_modify() to modify phy_registers.
Makes it easier to modify set/clear bit in a phy register.
Simulair like Linux PHY-core: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/phy-core.c#n551
2025-09-02 22:23:02 +02:00
René van Dorst cc132a8734 phy_write(): also use SFR_DATA_U16 and SFR_SMI_REG_U16
Was added by pr#7.
2025-09-01 09:59:41 +02:00
René van Dorst 689d208ff1 phy: fix whitespace and comments alinement 2025-09-01 09:59:06 +02:00
René van Dorst b8928a8bcd Replace manual SFR_DATA_0 and SFR_DATA_8 pair read and write with SFR_DATA_U16.
Also added SFR_SMI_REG_U16.

Doing pval = reg_h; pval <<= 8; pval |= reg_l; dont always optimized by the compiler a some places, not all.

A snipped of the diff between two .asm files.

5414,5424c5414,5416
< ;     rtlplayground.c:1382: uint16_t pval = SFR_DATA_8;
< ;     rtlplayground.c:1383: pval <<= 8;
<       mov     r7,_SFR_DATA_8
<       mov     r6,#0x00
< ;     rtlplayground.c:1384: pval |= SFR_DATA_0;
<       mov     r4,_SFR_DATA_0
<       mov     r5,#0x00
<       mov     a,r6
<       orl     ar4,a
<       mov     a,r7
<       orl     ar5,a
---
> ;     rtlplayground.c:1382: uint16_t pval = SFR_DATA_U16;
>       mov     r6,((_SFR_DATA_U16 >> 0) & 0xFF)
>       mov     r7,((_SFR_DATA_U16 >> 8) & 0xFF)
2025-09-01 09:20:36 +02:00
René van Dorst 9dafeab490 Added SFR_NIC_DATA_U16LE and SFR_NIC_RING_U16LE.
Let's use sfr16 for NIC data and ring.
SFR define can so reordered to it does the BE to LE swap for us.
2025-09-01 09:20:36 +02:00
René van Dorst af0135bcce Add sfr16 SFR_REG_ADDR_U16.
So instead do it manual split a uint16_t in to two uint8_t.
The compiler can do it, so reduces user error.
Note: compiler writes the lower/LSB part first.
      When that is importent this can´t be used.

Assembly is still the same except note above.
2025-09-01 09:20:36 +02:00