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Author SHA1 Message Date
logicog 733348059d Merge pull request #217 from mcaptur/main 
Hi-Source HI-k0801WS - deleted a line by mistake
 2026-05-08 08:27:12 +02:00
Mark Captur 950b763d69 Hi-Source HI-k0801WS - deleted a line by mistake 2026-05-08 07:38:43 +02:00
logicog 89e22f0893 Merge pull request #216 from mcaptur/main 
Add hardware profile and LED fix for Hi-Source HI-k0801WS
 2026-05-08 06:40:29 +02:00
Mark Captur 809efaa8d8 Hi-Source HI-k0801WS 2026-05-08 06:11:43 +02:00
Mark Captur 271878a62f Hi-Source HI-k0801WS 2026-05-08 06:09:17 +02:00
Mark Captur 299b54f2a3 Add pics for Hi-Source HI-k0801WS 2026-05-08 06:03:15 +02:00
Mark Captur f47fec7098 Add pics for Hi-Source HI-k0801WS 2026-05-08 06:02:21 +02:00
Mark Captur 04ce2cb8a1 Add doc for Hi-Source HI-k0801WS 2026-05-08 05:53:04 +02:00
Mark Captur 96eddf5a0c Add hardware profile and LED fix for Hi-Source HI-k0801WS 2026-05-07 16:06:00 +02:00
logicog 2cd6f5d782 Merge pull request #212 from feelfree69/make 
Makefile: Improve filenames of images
 2026-05-04 07:55:54 +02:00
feelfree69 c6dc5cc21c Don't delete *.bin files on 'make clean' - 'make distclean' does this 2026-05-04 07:11:44 +02:00
feelfree69 502033590e untracked files don't mark a build as -dirty 2026-05-04 06:55:11 +02:00
feelfree69 f81529bd07 Merge pull request #210 from logicog/fix_chrome_uploads 
Fix chrome uploads
 2026-05-03 16:53:48 +02:00
logicog 9c668969d4 Fix POST upload request handling for Chrome browser 
Chrome sends upload requests using POST with multipart/form-data
content type in multiple packets for the header part of the form-data.

Introduce a TSTATE_MULTIPART for the httpd server states that denotes
that so far only a part of the multipart header has been transmitted.
Once the full header has been transmitted, we change to TSTATE_POST
as for Firefox which sends all the multipart header in one piece.

The main further change required then is to make sure that the parsing
of the initial part of the multipart request is only parsed once and initially
to distinguish between configuration and firmware uploads.
 2026-05-03 08:16:55 +02:00
feelfree69 241bcb273f rename output of installer-Makefile to rtlplayground_oem_upgrade.bin 2026-05-02 21:45:39 +02:00
feelfree69 10367d0cdb Use a revision- and MACHINE-dependent output-filename 2026-05-02 21:44:44 +02:00
René van Dorst 09d90d6d97 Merge pull request #175 from logicog/ZX310S-4T2XH 
10GBit Ethernet Switch support (Horaco ZX310S-4T2XH)
 2026-05-02 17:22:52 +00:00
logicog 12c98ba6bd Merge pull request #148 from feelfree69/syslog 
Syslog: Duplicates console output to remote syslog server; Web-Interface: Send console commands to device
 2026-04-27 20:30:39 +02:00
feelfree69 3f66a18104 Merge branch 'main' into syslog 2026-04-24 12:01:30 +02:00
logicog 8abbececd1 Add device description for ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog d6dbf4e4dd Add photos of ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog e2b3201c9f Add machine name for ZX310S-4T2XH 2026-04-24 10:53:05 +02:00
logicog a7f4543698 Add support for (Horaco) ZX310S-4T2XH 
Add support for the ZX310S-4T2XH switch, which is a 4x2.5GBit + 1x10GBit + SFP
device. The device does not have any branding and is sold under different
brand names, in particular by Horaco. There is no branding on either label
nor PCB.

CPU: RTL8372
Flash: 2MByte Winbond W25Q16DV
10GBit PHY: RTL8261BE

UART header present, but solder holes are filled with solder that needs
removal, first, e.g with a 1.2mm drill.

The original firmware uses 57600baud 8N1
 2026-04-24 10:53:05 +02:00
logicog 2e0e55967c Do not send SFP info if no SFP port present 2026-04-24 10:53:05 +02:00
logicog 7877ce60f3 Add support for 5G link speeds, make 5G/10G LED blue 2026-04-24 10:53:05 +02:00
logicog a3dd25e0fe Add SDS parameter for RTL8261 setup 2026-04-24 10:53:05 +02:00
logicog 441340a4d4 Add SMI configuration support for dual 10G Ethernet 2026-04-24 10:53:05 +02:00
logicog 9a3f8c359d Enable 10g EEE on init 2026-04-24 10:53:05 +02:00
logicog 63ab6500c0 Add 10G/5G speed configuration/display 2026-04-24 10:53:05 +02:00
logicog ec5f74bbed Add is10g_port field in phy_settings 2026-04-24 10:53:05 +02:00
logicog a597d2d08b Fix EEE control register address and add 5G/10G EEE defines 
Register RTL8373_EEE_CTRL_BASE did not actually exist at 0x606c,
instead RTL837X_EEE_STATUS is actually not only a status, but also
a control register for EEE enable/disable at the MAC.

The defines are not actually register bits, but port EEE settings,
so move them to rtl837x_port.h while adding 5G/10G flags.
 2026-04-24 10:53:05 +02:00
logicog abc9cb7afd Add 5G speed display support and 5/10G EEE display/settings 2026-04-24 10:53:05 +02:00
logicog 6d579c4f00 Add speed bits for 5G/10G EEE 2026-04-24 10:53:05 +02:00
logicog c342964327 Add SDS init for RTL8261BE connection 2026-04-24 10:53:05 +02:00
logicog fd3a272255 Add RTL8261BE PHY configuration 
Add configuration of the RTL8261BE PHY on startup.
 2026-04-24 10:52:24 +02:00
logicog 4f4f69ecc1 Handle RTL8261BE SerDes configuration 
The RTL8261BE uses a 10GBit QSGMII connection. Add handler for initial
configuration of the SerDes speed and upon link changes.
 2026-04-24 10:52:24 +02:00
logicog c8e21b394b Add forgotten register RTL837X_REG_LED3_2_SET3 
The register had been forgotten in the LED configuration registers,
add the register definition and print out the content in leds_dump().
 2026-04-24 10:50:53 +02:00
logicog c34249b90a Add n_10g property in machine structure 
This uint8_t field corresponds to the n_sfp field and gives the number
of 10G ports for the machine. The values can be 0, 1, 2 for known machines,
all currently supported machines do not have any 10G ports, so no
need to change any entries in machine.c
 2026-04-24 10:50:53 +02:00
René van Dorst 042f4324a4 Merge pull request #166 from logicog/frame_header 
Cleanup Frame header structures and fix management VLAN
 2026-04-24 06:53:07 +00:00
logicog e280ccd2f9 Use RTL descriptor definition 2026-04-24 08:42:00 +02:00
logicog baa4e5e142 Use header structures of TX and RX, add dot1q for management VLAN TX 2026-04-22 22:36:26 +02:00
logicog b53e7e1a06 Add NOTHS macro 2026-04-22 22:36:26 +02:00
logicog 14b45735e2 Cleanup STP, use new frame descriptor definitions 2026-04-22 22:36:26 +02:00
logicog 946e80cebe Add frame descriptor structure 2026-04-22 22:36:26 +02:00
logicog e2df95ba90 Cleanup DHCP client code 2026-04-22 22:36:26 +02:00
logicog 570ee6c995 Move initialization routines to BANK2 2026-04-22 22:36:26 +02:00
feelfree69 e849af4a70 adapted syslog cmd_parsing to new method 2026-04-21 21:38:41 +02:00
feelfree69 812bf3bb67 Move code of rtl837x_pins.c to BANK2 due to BANK0 overflow 2026-04-21 21:37:25 +02:00
feelfree69 da8ec8fe88 Merge branch 'logicog:main' into syslog 2026-04-21 21:26:45 +02:00
logicog 01fa43510e Merge pull request #206 from vDorst/fix_cmd_parsing 
Fix cmd parsing
 2026-04-21 21:24:22 +02:00