The presence of the main function is a hardcoded trigger in sdcc that causes
the interrupt vectors and atomic rollback helpers to be generated as part of
compilation of the file containing the main function.
This makes sure the runtime library is correctly initialized and reduces
crtstart.asm to contain only the banked call helpers.
To ensure that the __interrupt_vect in area HOME is located at the beginning
of the firmware, the linker flags are updated to set the HOME start to
0x00000 and the linker object order is modified to have rtlplayground.rel
first.
Generated code in rtlplayground.asm:
```
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
.area HOME (CODE)
__interrupt_vect:
ljmp __sdcc_gsinit_startup
ljmp _isr_ext0
.ds 5
ljmp _isr_timer0
.ds 5
ljmp _isr_ext1
.ds 5
reti
.ds 7
ljmp _isr_serial
.ds 5
ljmp _isr_timer2
.ds 5
reti
.ds 7
reti
.ds 7
ljmp _isr_ext2
.ds 5
ljmp _isr_ext3
; restartable atomic support routines
.ds 2
sdcc_atomic_exchange_rollback_start::
nop
nop
sdcc_atomic_exchange_pdata_impl:
movx a, @r0
mov r3, a
mov a, r2
movx @r0, a
sjmp sdcc_atomic_exchange_exit
nop
nop
sdcc_atomic_exchange_xdata_impl:
movx a, @dptr
mov r3, a
mov a, r2
movx @dptr, a
sjmp sdcc_atomic_exchange_exit
sdcc_atomic_compare_exchange_idata_impl:
mov a, @r0
cjne a, ar2, .+#5
mov a, r3
mov @r0, a
ret
nop
sdcc_atomic_compare_exchange_pdata_impl:
movx a, @r0
cjne a, ar2, .+#5
mov a, r3
movx @r0, a
ret
nop
sdcc_atomic_compare_exchange_xdata_impl:
movx a, @dptr
cjne a, ar2, .+#5
mov a, r3
movx @dptr, a
ret
sdcc_atomic_exchange_rollback_end::
sdcc_atomic_exchange_gptr_impl::
jnb b.6, sdcc_atomic_exchange_xdata_impl
mov r0, dpl
jb b.5, sdcc_atomic_exchange_pdata_impl
sdcc_atomic_exchange_idata_impl:
mov a, r2
xch a, @r0
mov dpl, a
ret
sdcc_atomic_exchange_exit:
mov dpl, r3
ret
sdcc_atomic_compare_exchange_gptr_impl::
jnb b.6, sdcc_atomic_compare_exchange_xdata_impl
mov r0, dpl
jb b.5, sdcc_atomic_compare_exchange_pdata_impl
sjmp sdcc_atomic_compare_exchange_idata_impl
```
This saves 508 bytes in the HOME area by:
- Getting rid of the expensive hex array indexing
- Having print_short and print_long delegate to print_byte
This is at the expense of increasing the stack depth a tiny bit.
Stack usage isn't an issue so far since I see ~96 bytes of
untouched stack memory.
The current code for entering commands via the serial CLI is completely
refactored and moved out of rtlplayground.c into a separate file cmd_edit.c
putting code into BANK2.
The serial ring buffer sbuf[] is now exclusively used for receiving
keys, including escape sequences (DEL will generate a 4-byte escape
sequence). The command is now held in cmd_buffer. This reduces
XMEM use, because the serial buffer can be much smaller.
Supported is only editing the current command line via backspace, del,
cursor left and right.
Because the code cannot distinguish escape sequences which are not yet
complete (because the serial isr has not yet put all characters into
the serial buffer) from the dozens of unsupported ones (F-keys/home,
Page up/down, cursor up/down...) they are ignored and remain in the
serial buffer until the ring-pointer overwrites them. This is standard
behaviour for consoles, which will print out garbage for unsupported
characters. In this implementation, the command line buffer and the
visible command line in the terminal are always synced, so garbage
can be removed again by ediing the line.
The code makes several redundant checks in order to prevent race-conditions
between the serial ISR and the comand-editing code.
We use the SoC's UUID to generate a fixed MAC for a particular
switch device. The MAC generated uses a Realtek prefix and then
is followed by 3 bytes genertaed from the first 3 bytes of the
UUID xored with the last byte in order to prevent being able
to deduce the UUID from the public MAC.
RTL has up to 3 SCL pins and up to 4 SDA pins. Lets allow configuring
I2C with individual BUS numbers instead of 0/1 I2C.
This enables support for devices where SCL line is not shared between
SFP modules. MUX registry is now initialized depending on needed
pin function.
More over, some SFP pins require special MUX settings, lets initialize
those depending on SFP configuration. This adds TX Disable pin,
which right now is set to low at startup.
Caveats:
- We may still override MUX registry later
- Not sure how to handle invalid bus definitions
- Without SFP is it fine to *not* initialize anything?
- Do to RAM limitation we do inititalize output GPIO to low
This adds support for the verification of a mangement vlan.
When enabled, then the switch's CPU will not listen to any packets
that are not tagged with the respective VLAN tag.
On the command line this is enabled by setting:
> vlan <vlan> mgmt
Setting the vlan ID of the management VLAN to 0 or 1 disables
the mangement VLAN function.
Without this fix N-type SOC devices like RTL8372N, RTL8383N and also the
4-port PHY RTL8224N, don't have a functional Serdes. Although the SOC
sees a link, there is no packet flow on both SFP-port nor RTL8224 ports.
Added helper functions to read/write to the RTL8224.
RTL8224 has the same register layout so we can use the same register
defines as for the main SOC.
Detect the SOC type and variant. RTL8372 vs RTL8373 and also is it as
non-N/N variant of the SOC.
Even if the machine profile is wrong the hardware will be initilised on
the detected type.
Same as in the main code.
Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.
Only differance is that the serial is transmit only and poll-based so no
interrupts are used to transmit data.
TI-interrupt flag is used in the code, this is only
fine when SERIAL-interrupt is not enabled/used but
when is it used, it generates an interrupt which is
not handled, so it keeps generating interrupts and
trashing the performance and caused starvation on
lower priority interrupts like TIMER 2.
Use an extra flag to signal to the code that the
TX-buffer is empty.
Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.
Timer2 16-bit auto-reload can now be used for other tasks like SYS_TICK.
Downside of Timer0 is, we have to manually reload
the timer value. Timer2 can do that automaticly.
This saves a lot of time in the interrupt-handler
of the Timer.
Currently Timer2 is used for baudrate-generation
but in a separete commit this is moved to Timer1.
A `%` modulo operator was used instead of a
`&` and-operator, to split a 16 bit value into two
8 bit values.
This causes that the SYSTICKs were 0.1% too fast.
Replace the manual split with a sfr16 type, so the
compiler does the split for us.
This adds an implementation for trapping IGMP packets to the CPU
which will identify IGMPv1/2/3 packets, but handle only v3.
The implementation then inserts/updates/deletes L3 MC entries
in the L3 lookup table. The entries consist of an Ipv4
Destination IP (the IPv4 MC address), a Source IP (0.0.0.0) and
a Portmask. Note that this implementation is not VLAN aware,
as there is no hardware support in the device.
An alternative strategy is to control switching of the L2-MC packets
in which the IPv4-MC packets are transported (dst-MaC is
01:00:5e:xx:yy:zz, with xx:yy:zz corresponding to bits in the Ipv4-MC
address). This will allow to use VLAN-aware packet switching. While
code support is there for table insert/update/deletes, some further
L2 configuration is missing.
There is no support for IPv6 MC, yet.
logicog
René van Dorst
Tobias Diedrich
feelfree69
feelfree69
logicog
chriz
diijkstra