mirror of
https://github.com/logicog/RTLPlayground.git
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305 lines
6.2 KiB
C
305 lines
6.2 KiB
C
/*
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* This is driver implementation for the RTL837x flash controller
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* This code is in the Public Domain
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*/
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#include <stdint.h>
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#include "rtl837x_stdio.h"
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#include "rtl837x_sfr.h"
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__xdata uint8_t dio_enabled;
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/*
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* Configure Memory Managed IO
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*/
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void flash_configure_mmio(void)
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{
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// Set configuration for MMIO access by controller
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if (dio_enabled) {
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SFR_FLASH_MODEB = 0x18;
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SFR_FLASH_CMD_R = 0xbb; // By default we read with Dual speed
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SFR_FLASH_DUMMYCICLES = 4;
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return;
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}
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0xb; // By default we read with single speed
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SFR_FLASH_DUMMYCICLES = 8;
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}
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/*
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* Initializes the flash controller for programmed control
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* The configuration options are not really understood, the SPI speed
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* seems to be directly linked to the CPU frequency
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* This configures uses fast single IO at 20.8 MHz when the CPU clock is at 20.8MHz
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* and 62.5MHz when the CPU clock is configured at 125MHz
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*/
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void flash_init(uint8_t enable_dio)
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{
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if (enable_dio) {
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// Configure fast DIO via divider/DIO/SIOconfig = 4 and read-cmd being 0xbb (for mmio)
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SFR_FLASH_CONFIG = 9; // There may be a chip-select in here
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SFR_FLASH_CONF_RCMD = 0xbb;
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SFR_FLASH_CONF_DIV = 4;
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} else {
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// Configure fast read via divider = 8 and read-cmd being 0xb (for mmio)
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SFR_FLASH_CONFIG = 9;
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SFR_FLASH_CONF_RCMD = 0xb;
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SFR_FLASH_CONF_DIV = 8;
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}
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// Test Controller Busy
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while(SFR_FLASH_EXEC_BUSY);
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// Write 0 to status register
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SFR_FLASH_DUMMYCICLES = 8;
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SFR_FLASH_MODEB = 0;
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SFR_FLASH_TCONF = 0x19;
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SFR_FLASH_CMD = 1;
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SFR_FLASH_DATA0 = 0;
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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dio_enabled = enable_dio;
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flash_configure_mmio();
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}
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uint8_t flash_read_status(void)
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{
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// Test Controller Busy (we might call this directly after executing a command)
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while(SFR_FLASH_EXEC_BUSY);
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// setup status read command
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SFR_FLASH_TCONF = 0x11;
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SFR_FLASH_CMD_R = 5;
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// execute and wait for controller done
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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return SFR_FLASH_DATA0;
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}
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void flash_read_uid(void)
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{
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while (flash_read_status() & 0x1);
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// Set slow read mode for UID
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0x4b;
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SFR_FLASH_DUMMYCICLES = 8;
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// Transfer 4 bytes (command + 3 dummy bytes)
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SFR_FLASH_TCONF = 4;
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SFR_FLASH_ADDR16 = 0;
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SFR_FLASH_ADDR8 = 0;
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SFR_FLASH_ADDR0 = 0;
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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print_byte(SFR_FLASH_DATA0);
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print_byte(SFR_FLASH_DATA8);
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print_byte(SFR_FLASH_DATA16);
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print_byte(SFR_FLASH_DATA24);
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SFR_FLASH_EXEC_GO = 1;
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SFR_FLASH_DUMMYCICLES = 24;
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while(SFR_FLASH_EXEC_BUSY);
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print_byte(SFR_FLASH_DATA0);
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print_byte(SFR_FLASH_DATA8);
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print_byte(SFR_FLASH_DATA16);
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print_byte(SFR_FLASH_DATA24);
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flash_configure_mmio();
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}
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void flash_read_jedecid(void)
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{
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while (flash_read_status() & 0x1);
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// Set read mode for JEDEC ID
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0x9f;
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SFR_FLASH_DUMMYCICLES = 0;
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// Transfer 3 bytes back
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SFR_FLASH_TCONF = 0x13;
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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print_byte(SFR_FLASH_DATA0);
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print_byte(SFR_FLASH_DATA8);
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print_byte(SFR_FLASH_DATA16);
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print_byte(SFR_FLASH_DATA24);
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// Reset slow read mode
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0xb;
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SFR_FLASH_DUMMYCICLES = 8;
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}
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void flash_write_enable(void)
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{
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short status;
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// Wait until busy bit clear
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do {
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status = flash_read_status();
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} while (status & 0x1);
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// while (flash_read_status() & 0x1);
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SFR_FLASH_TCONF = 0x18;
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SFR_FLASH_CMD = 6;
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/* The following is explicitly set for SIO, is this necessary?:
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SFR_FLASH_DUMMYCYCLES = 0;
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SFR_FLASH_MODEB = 0;
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*/
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SFR_FLASH_EXEC_GO = 1;
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// Wait for write status enabled
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do {
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status = flash_read_status();
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} while (!(status & 0x2));
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}
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void flash_dump(uint32_t addr, uint8_t len)
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{
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short status;
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do {
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status = flash_read_status();
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print_short(status);
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} while (status & 0x1);
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// Set fast read mode
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if (dio_enabled) {
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SFR_FLASH_MODEB = 0x18;
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SFR_FLASH_CMD_R = 0xbb;
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SFR_FLASH_DUMMYCICLES = 4;
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} else {
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0xb; // Fast read
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SFR_FLASH_DUMMYCICLES = 8; // Add 8 dummy clocks after read?
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}
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// Read 4 bytes
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SFR_FLASH_TCONF = 4;
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while (len) {
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SFR_FLASH_ADDR16 = addr >> 16;
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SFR_FLASH_ADDR8 = addr >> 8;
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SFR_FLASH_ADDR0 = addr;
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addr += 4;
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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print_short(SFR_FLASH_DATA0);
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if (len == 1)
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return;
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print_short(SFR_FLASH_DATA8);
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if (len == 2)
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return;
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print_short(SFR_FLASH_DATA16);
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if (len == 3)
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return;
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print_short(SFR_FLASH_DATA24);
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len -= 4;
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}
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}
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void flash_read_security(uint32_t addr, uint8_t len)
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{
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while (flash_read_status() & 0x1);
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// Set slow read mode
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SFR_FLASH_MODEB = 0x0;
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SFR_FLASH_CMD_R = 0x48; // read security register
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SFR_FLASH_DUMMYCICLES = 8; // Add 8 dummy clocks as for fast read
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// Transfer 4 bytes (command + 3byte address)
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SFR_FLASH_TCONF = 4;
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while (len) {
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SFR_FLASH_ADDR16 = addr >> 16;
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SFR_FLASH_ADDR8 = addr >> 8;
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SFR_FLASH_ADDR0 = addr;
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addr += 4;
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SFR_FLASH_EXEC_GO = 1;
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while(SFR_FLASH_EXEC_BUSY);
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print_byte(SFR_FLASH_DATA0);
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if (len == 1)
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return;
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print_byte(SFR_FLASH_DATA8);
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if (len == 2)
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return;
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print_byte(SFR_FLASH_DATA16);
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if (len == 3)
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return;
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print_byte(SFR_FLASH_DATA24);
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len -= 4;
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}
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}
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void flash_block_erase(uint32_t addr)
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{
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flash_write_enable();
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SFR_FLASH_TCONF = 8;
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SFR_FLASH_CMD = 0x20;
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SFR_FLASH_ADDR16 = addr >> 16;
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SFR_FLASH_ADDR8 = addr >> 8;
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SFR_FLASH_ADDR0 = addr;
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SFR_FLASH_EXEC_GO = 1;
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while (flash_read_status() & 0x1);
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flash_configure_mmio();
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}
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void flash_write_bytes(uint32_t addr, __xdata uint8_t *ptr, uint8_t len)
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{
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uint8_t exit_loop = 0;
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while(1) {
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flash_write_enable();
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SFR_FLASH_CMD = 2;
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SFR_FLASH_TCONF = 0x40 | 8 | 2; // Bytes written is is 4, 8 enables write, 0x2 is unkown
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// Last transfer?
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if (len < 5) {
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SFR_FLASH_TCONF = 8 | len;
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exit_loop = 1;
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}
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SFR_FLASH_ADDR16 = addr >> 16;
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SFR_FLASH_ADDR8 = addr >> 8;
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SFR_FLASH_ADDR0 = addr;
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SFR_FLASH_DATA0 = *ptr++;
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SFR_FLASH_DATA8 = *ptr++;
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SFR_FLASH_DATA16 = *ptr++;
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SFR_FLASH_DATA24 = *ptr++;
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// Execute transfer, we wait for completion at top of loop
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SFR_FLASH_EXEC_GO = 1;
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if (exit_loop)
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break;
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len -= 4;
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addr += 4;
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}
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while (flash_read_status() & 0x1);
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flash_configure_mmio();
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}
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