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A reserved-multicast trap goes to the port named in EXT_CPU_CTRL, which names no port out of reset, so trapped frames were dropped at ingress. trap_init() points it at the CPU port once at startup, and trap_rma_set() changes only the action field of an RMA register. A trapped frame arrives without the VLAN tag a forwarded one gets, so TRAP_RX_BODY() gives the offset of the payload for both forms. STP now traps its address while it runs instead of steering it with a static L2 entry per VLAN, so turning it on no longer walks the VLAN table and a pvid change no longer needs stp off and on. With STP off the flooding entries are restored as before. A trapped BPDU passes the tagged-only ingress filter that drops a forwarded one, so the stp_setup() warning about such ports goes.
102 lines
4.3 KiB
Markdown
102 lines
4.3 KiB
Markdown
# L2
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The RTL827x provides access and configuration options to an L2 table that
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is used to associate device-MACs with ports on which those devices can
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be reached in the LAN. The code so far configures automatic learning and
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uses a default for aging of the learned addresses.
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## L2 Tables
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Access to the tables is done using table access registers. The same access
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registers also provide access to the VLAN configuration tables. An idea of how
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the table works can be gained from the [RTL8369 Datasheet](http://realtek.info/pdf/rtl8366_8369_datasheet_1-1.pdf)
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section 8.17 and in particular table 20.
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The central table register is RTL837X_TBL_CTRL(0x5cac).
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```
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Register RTL837X_TBL_CTRL bytes: EE EE TT CC
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EE: Entry
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TT: Table type
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CC: Command (Bit 0: Execute, Bit 1: Write)
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TT: 04: TBL_L2_UNICAST, 03: TBL_VLAN
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```
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An entry is retrieved from the tables by setting the data in registers to the
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desired entry filter, then executing a table command by writing to RTL837X_TBL_CTRL
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with execute bit 0 set, table type set and entry identifier (VLAN-Id or hash for L2).
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Data will be fetched from the table and is available once the execute bit has been
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cleared by the ASIC. Data then is in the output data registers
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```
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#define RTL837x_L2_DATA_OUT_A 0x5ccc
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#define RTL837x_L2_DATA_OUT_B 0x5cd0
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#define RTL837x_L2_DATA_OUT_C 0x5cd4
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DATA_OUT_A DATA_OUT_B L2_DATA_OUT_C
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M2 M3 M4 M5 fV VV M0 M1 xx xF xx gg
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M0-M5: 6 bytes of MAC, M0 is MSB
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V: 12 bits of VLAN-ID
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f: bit 5 set: Entry is valid, otherwise stale
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bit 6: bit 0 of port-number
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bit 7: bit 1 of port-number
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g: bit 0: bit 2 of port-number
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bit 1: bit 3 of port-number (MSB)
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bit 2: bit 0 of entry-age
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bit 3: bit 1 of entry-age
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bit 4: bit 2 of entry-age (MSB)
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F: bit 0: entry is static(1) or learned (0)
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```
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The next entry can be now found in RTL837x_TBL_DATA_0 (entry = RTL837x_TBL_DATA_0_bits(0-11) + 1),
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which can be used to get the next entry by writing this value to RTL837X_TBL_CTRL
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and executing again for the given table type. This entry number is probably a hash, for which
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the algorithm is unknown.
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Deleting the entire L2 table is done by checking and setting 0x53dc to 0x0, then writing
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0x00010000 to register RTL837x_L2_TBL_CTRL and waiting until the bit 16 that was
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set has cleared.
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## API support in the code
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The RTLPlayground code provides support for reading the L2 tables from the
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ASIC and flushing the table in order to quickly forget the learned entries.
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```
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> l2
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MAC VLAN type port
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3c:18:a0:7e:11:00 0x0001 learned 5
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1c:2a:a3:23:00:02 0x0001 learned 7
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```
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## Static multicast entries
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Slow-protocol frames such as LACPDUs and STP BPDUs have to reach the CPU
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without being flooded to the other ports. No bridge relays these frames:
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their addresses are in the set that 802.1D-2004 clause 7.12.6 forbids a
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bridge to forward, and what travels the network is the information, with
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every bridge regenerating BPDUs of its own on its designated ports. The reserved-multicast *trap* action
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does that: it delivers to the port named in `EXT_CPU_CTRL` (0x6724), which
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`trap_init()` sets to 9, the CPU port, at startup; with the reset value 0xf it
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names no port and the trapped frame is dropped. STP traps its address while it
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runs (see stp.md). Where the action is left at *forward*, the egress can be
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constrained with a static L2 multicast entry instead: the lookup hits the
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entry's own port mask rather than the VLAN flood mask. Verified on a SWTGW218AS
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both ways, with the CPU bit cleared, where delivery stops, and with the CPU bit
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alone, where nothing egresses.
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`port_l2mc_set()` writes one such entry. The SMI layout is the L2 multicast
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variant of the table entry:
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```
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DATA_IN_A = MAC bytes 5..2 -> c2 00 00 <mac_last>
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DATA_IN_B = MAC[1..0] | vid<<16 | IVL<<29 | pmask[1:0]<<30
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DATA_IN_C = pmask[9:2]
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```
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Lookups are IVL, so an entry made for VID 0 is never matched and a caller adds
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one entry per PVID in use. The write goes through the table access register
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with the table selector set to the L2 lookup table, `TBL_L2_UNICAST` in the
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code, a name that despite appearances covers the multicast entries as well.
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The hardware hashes MAC and VID to pick the bucket slot by itself.
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Writing the same MAC and VID again replaces the entry rather than adding a
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second one, so a caller can retarget the mask at will, for instance back to all
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ports to restore flooding.
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