mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
René van Dorst
0d63b08f89
Pinout Spreedsheet, photos and wiki about my findings. GPIO number may be has endian problem.
95 lines
3.3 KiB
Markdown
95 lines
3.3 KiB
Markdown
### SWTG024AS
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SWTG024AS has at least 4 variants that look the same.
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Variants are `managed` and a` unmanaged` version.
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But both have pcb version `v1.0` and `v2.0`.
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Also the RJ45 connects can be all plastic or metal shielding.
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# Unmanaged Switch
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## Brands
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|Brand|Type|Managed|PCB|PCB Label|Flash|Chip RTL|
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|---|---|---|---|---|---|---|
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| LIANGUO |SWTG024AS |No| SWTG024AS-v2.0 | CM-23-11-2336 023-17453| 512kB| 8272 |
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# SWTG024AS-v2.0 managed vs unmanged
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Changed I found with my own board vs [Managed version](https://github.com/up-n-atom/SWTG118AS/tree/main/photos/SWGT024AS-v2.0) of the PCB.
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### Bottom
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* R105: Installed, goes to R10-PullDown SFP2 -> TX DISABLE
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* R85: Not Installed (Connected to K1)
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* R90: Not installed (PowerLed)
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* LED3: Not installed (PowerLed)
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### Top
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* K1: Not installed (Reset butten)
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* R95: Installed (SFP2 signal RX-LOS), mean that the manage version can use RX-LOS function.
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* R270: Installed (SFP1 signal RX-LOS)
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* R268: Installed (SFP2 signal TX_DISABLE, but R262 200R pull-down is to high to drive by the SOC, needs mod!)
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### Notes
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* `TX Disable`-SFP2 and Button `K1` share the same GPIO pin via `R105` and `R85`.
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But with `R88`, `TX Disable`-SFP2 can be mapped to `C4`.
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* `TX Disable` pull-down resistos on both SFP are to low to drive by the SOC.
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We need to make a `Best`-BOM variant so we can use all the featues.
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# Connectors
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|`J4` SFP1 PINs | Signal | Component | GPIO | Notes |
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|---|---|---|---|---|
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|2| TX_FAULT | B-R262 | --- | |
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|3| TX_DISABLE | B-R263, T-R268 | C6 | R262 = Pull-down 200R|
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|4| MODDEF2 – SDA | B-R261 | C7 | |
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|5| MODDEF1 – SCL | B-R260, T-R267 |--- | |
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|6| MODDEF0 – PRESENT | B-R259, T-R296 | B30 | |
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|7| RATE SEL | B-R257 | --- | |
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|8| LOS | B-R258, T-R270 | C5 | |
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|9| TO? | B-R256 | --- | |
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|`J2` SFP2 PINs | Signal | Component | GPIO | Notes |
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|---|---|---|---|---|
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|2| TX_FAULT | B-R70 | --- | |
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|3| TX_DISABLE | B-R10, T-R88-L | C22 | R10 = Pull-down 200R |
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|4| MODDEF2 – SDA | B-R26 | C9 | |
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|5| MODDEF1 – SCL | B-R15, T-R87 | --- | |
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|6| MODDEF0 – PRESENT | B-R14, T-R89 | C18 | |
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|7| RATE SEL | B-R12 | --- | |
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|8| LOS | B-R13, T-R95 | C19 | |
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|9| TO? | B-R11 | --- | |
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Note: component numbering `<L>-<REFDES>-<SIDE>`
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* L: Layer, T=Top, B=Bottom
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* REFDEES: full silkscreen like `R123`
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* SIDE: Side of the component. when the rj45 are facing towards you are you can read the silkscreen normal.
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L = Left, R=right, B=bottom, T=top or P with a pin number.
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### T3
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This connector seems to go to U4 and U10.
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I thing is used to connect a external CPU to controlle the SOC.
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Even to program the flash via the SOC.
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Signals are based on that `U4` is likely a I2C-EEPROM, `U10` is likely other SPI-chip.
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|`T3` pin|what|Signal|
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|---|---|---|
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| 1 | U4-P6, 33R U10-P6| I2C-SCL, SPI-CLK |
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|2| GND | --- |
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|3| U4-P5, U10-P5 | I2C-SDA, SPI-DI/DO |
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|4| VCC |
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|5| 33R -> U10-P2 | SPI-DO/D1 |
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|6| U10-P1 | SPI-CS |
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|`T8` pin|what|Signal|
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|---|---|---|
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| 1 | C14 | |
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| 2 | GND | |
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| 3 | C16 | |
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| 4 | 3V3 | |
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| 5 | C15 | |
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| 6 | C17 | |
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# Reset ciruit
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| Cmp | Function |
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|---|---|
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| R78 | 33k PullUp|
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| D3 | Discharge Diode |
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| C187 | RC-Delay |
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Reset-line found at `T-D3-D` active-low.
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