Currently only ASCII DEL (key code 127) is handled as backspace, but some terminal
emulators are sending ^H which is ASCII BS (key code 8). Looks like we can
safely treat both in the same matter.
The state of the SFP module is being already send in status.json,
but was not parsed via Web UI. When debuging SFP LOS/Signal detection
it is usefull to see what module is reporting back.
Extended the SFP mouse-over information with:
- RX LOS as reported in 0x02 bit of register 238
- External TX Disabled from 0x80 bit of register 238
- TX fault from 0x04 of the same register
- The last state of RX LOS pin (available also when there is no 0x40
option on the module)
This should help identify missing/incorrect setup of TX disabled pin.
Looks like the SFP numbers are reversed, since GPIOs were mapped
to SFP numbers, the need to be reversed too. This fixes swapped
display of SFP stats on the webpage.
Added support for all leds on the device.
Stock port sets are slightly differently configured, where additional
LED0 on SET_0 and LED1&LED2 where configured for link/collisions/duplex.
This has not been reproduced as those lines are probably not connected
anywhere.
We fix a bug in atoi_hex when parsing an unneven number of digits
by rotating the entire number 4 bits right as would have been
done if the number had been preceded by a 0 to make the number
of digits even.
I noticed that entering some vlan config, clicking "Update/Create", then
clicking "Get Configuration" resulted in Tagged/Untagged/PVID displaying
completely wrong data. It looks like the parisng in fetchVLAN() in
vlan.js was just completely disconnected from the layout of the
registers read by vlan_get() in rtl837x_port.c. Who knows how that
happened.
1. Fix fetchVLAN() member/untag parsing: the old code read bits [9:0]
as untagged and bits [10:19] as tagged, but the VLAN table register
layout is members in [9:0] and untag in [19:10]. Now correctly
derives tagged (member && !untag) and untagged (member && untag).
2. Add PVID to vlan.json response: PVID is stored per-port in separate
PVID registers (RTL837x_PVID_BASE_REG), not in the VLAN table entry.
The old code nonsensically tried to read it from bits [20:29] of the
VLAN table. Add port_pvid_get() and build a pvid bitmask in
send_vlan() so the JS can parse it correctly.
3. Remove auto-PVID logic from setC(): setC() is called by fetchVLAN()
while it's loading existing config, and so this logic mangled the
display of the existing config. Also, it doesn't make sense to
auto-set the PVID for tagged members (PVID relates to untagged
ingress.)
The presence of the main function is a hardcoded trigger in sdcc that causes
the interrupt vectors and atomic rollback helpers to be generated as part of
compilation of the file containing the main function.
This makes sure the runtime library is correctly initialized and reduces
crtstart.asm to contain only the banked call helpers.
To ensure that the __interrupt_vect in area HOME is located at the beginning
of the firmware, the linker flags are updated to set the HOME start to
0x00000 and the linker object order is modified to have rtlplayground.rel
first.
Generated code in rtlplayground.asm:
```
;--------------------------------------------------------
; interrupt vector
;--------------------------------------------------------
.area HOME (CODE)
__interrupt_vect:
ljmp __sdcc_gsinit_startup
ljmp _isr_ext0
.ds 5
ljmp _isr_timer0
.ds 5
ljmp _isr_ext1
.ds 5
reti
.ds 7
ljmp _isr_serial
.ds 5
ljmp _isr_timer2
.ds 5
reti
.ds 7
reti
.ds 7
ljmp _isr_ext2
.ds 5
ljmp _isr_ext3
; restartable atomic support routines
.ds 2
sdcc_atomic_exchange_rollback_start::
nop
nop
sdcc_atomic_exchange_pdata_impl:
movx a, @r0
mov r3, a
mov a, r2
movx @r0, a
sjmp sdcc_atomic_exchange_exit
nop
nop
sdcc_atomic_exchange_xdata_impl:
movx a, @dptr
mov r3, a
mov a, r2
movx @dptr, a
sjmp sdcc_atomic_exchange_exit
sdcc_atomic_compare_exchange_idata_impl:
mov a, @r0
cjne a, ar2, .+#5
mov a, r3
mov @r0, a
ret
nop
sdcc_atomic_compare_exchange_pdata_impl:
movx a, @r0
cjne a, ar2, .+#5
mov a, r3
movx @r0, a
ret
nop
sdcc_atomic_compare_exchange_xdata_impl:
movx a, @dptr
cjne a, ar2, .+#5
mov a, r3
movx @dptr, a
ret
sdcc_atomic_exchange_rollback_end::
sdcc_atomic_exchange_gptr_impl::
jnb b.6, sdcc_atomic_exchange_xdata_impl
mov r0, dpl
jb b.5, sdcc_atomic_exchange_pdata_impl
sdcc_atomic_exchange_idata_impl:
mov a, r2
xch a, @r0
mov dpl, a
ret
sdcc_atomic_exchange_exit:
mov dpl, r3
ret
sdcc_atomic_compare_exchange_gptr_impl::
jnb b.6, sdcc_atomic_compare_exchange_xdata_impl
mov r0, dpl
jb b.5, sdcc_atomic_compare_exchange_pdata_impl
sjmp sdcc_atomic_compare_exchange_idata_impl
```
This saves 508 bytes in the HOME area by:
- Getting rid of the expensive hex array indexing
- Having print_short and print_long delegate to print_byte
This is at the expense of increasing the stack depth a tiny bit.
Stack usage isn't an issue so far since I see ~96 bytes of
untouched stack memory.
This adds the MPAGE (sdcc _XPAGE) SFR, which is used by sdcc in `--xstack`
mode to provide the upper byte of the address for `MOVX A, @Ri` and
`MOVX @Ri, A` instructions.
Classic 8051 uses the P2 SFR value for this, but the RTL IP block does not
seem to be using the "Port 2 module".
From the databook:
```
To replace the function of the Port 2 latch in designs that do not use a
Port 2 module, the DW8051 provides an additional special function register,
MPAGE, at SFR address 92h. During MOVX A, @Ri and MOVX @Ri, A instructions,
the DW8051 places the contents of the MPAGE register on the upper 8 address
bits (mem_addr[15:8]). This provides the paging function that is normally
provided by the Port 2 latch. The MPAGE register has no function when a
Port 2 module is used to connect external RAM.
```
The SWTG018AS-A V2.0 is an 8x2.5GBit/s port + 1 SFP+ port unmanged device
It is sold in an unbranded casing e.g. by Ampcom.
Hardware:
SoC: RTL8373N
Additional PHY: RTL8224
Flash: Puya P25D40SH (4MBit, slimmer, not standard SOP-8 package!)
LEDs: 1 Green + 1 Orange per Ethernet port (green designates 2.5GBit)
1 Green LED for the SFP+ port
The photos already show a modified PCB: Unpopulated resistors R52 and R53
have been bridged in order to enable the serial console. The smaller flash
memory chip at U2 has been replaced with a Windbond 128MBit standard-sized
SOIC-8 chip in order to easily use SOIC clamps to flash the device. Also
the serial header has been populated.
feelfree69
diijkstra
logicog
René van Dorst
logicog
Mark H. Spatz
Tobias Diedrich