gitproxy/RTLPlayground
1
0
Fork 0
mirror of https://github.com/logicog/RTLPlayground.git synced 2026-08-30 14:52:51 +08:00
Code Issues Packages Projects Releases Wiki Activity
1,106 Commits 9 Branches 1 Tag
ee05cd400088b8adc42e4b0bccee98543bd4f1a2
Commit Graph
1106 Commits
This Branch
This Branch
All Branches
Author SHA1 Message Date
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog af3be9a067 Initial DHCP implementation 2026-01-18 07:39:49 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
René van Dorst e74c4f148a version: Also show the hardware profile. 2026-01-17 21:02:25 +01:00
logicog d1d5d5e18f Consistently use banked externally visible functions 2026-01-17 17:54:31 +01:00
logicog 892920a627 Mover phy code to bank 2 as bank 1 already overflows 2026-01-17 17:54:31 +01:00
logicog eb0e90df5c Enable bank 2 in Makefile 2026-01-17 17:54:31 +01:00
logicog 2ce168883b Add support for banks > 1 2026-01-17 17:54:31 +01:00
René van Dorst e54313eded Merge pull request #83 from logicog/l2 
Add support for L2 entry display and deletion in the web interface
 2026-01-17 16:00:37 +00:00
logicog 300f599551 Fix output of l2 command 2026-01-17 12:56:43 +01:00
logicog 73a355cff5 Add L2-table access method defintions 2026-01-17 12:56:43 +01:00
logicog e53f5e7134 Add L2 entry deletion support via web 2026-01-17 12:56:43 +01:00
logicog 3509f7da04 Add web functionality to delete L2 entries 2026-01-16 18:04:22 +01:00
logicog 55d10ae3fc Make L2 information page available in navigation menu 2026-01-16 18:04:22 +01:00
logicog 88e706c295 Add simulation support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e59158e006 Add backend support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e0c9338357 Add support in web-interface for displaying L2 entries 2026-01-16 18:04:22 +01:00
logicog e7df748b6a Fix error in calculating VLAN for L2 entries 2026-01-16 18:04:22 +01:00
logicog 5cb1acfc15 Merge pull request #82 from vDorst/fix_SWTG024AS_sfp_port_mapping 
SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped.
 2026-01-15 19:58:48 +01:00
René van Dorst 46864ca9a7 SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped. 
On SWGT024_V2_0, the SFP ports are arranged differently.
The port mapping should also reflect this.
 2026-01-15 19:46:04 +01:00
René van Dorst 00b42db5da Merge pull request #78 from logicog/nic_demagic 
MIB Counter fixes and Detailed Display
 2026-01-15 18:45:38 +00:00
logicog 84fe44cc9a Add httpd backend implementation for MIB counter requests 2026-01-15 18:07:56 +01:00
logicog 6326428406 Add simulation of MIB counters 2026-01-15 18:07:56 +01:00
logicog f33c4e3dc9 Add display of MIB counters to Web-Interface 2026-01-15 18:07:56 +01:00
logicog 4a615cb4bd Merge pull request #71 from vDorst/doc_mods 
DOCS: Add modification page and flash replacement.
 2026-01-15 07:43:33 +01:00
René van Dorst 030772f1ef Merge pull request #75 from vDorst/fix_serial_timer1 
Fix: Serial Timer1: GATE bit should be off.
 2026-01-13 19:10:22 +00:00
René van Dorst 4ce8adf954 Merge pull request #80 from logicog/fix_rldp_register 
Fix typo in register address for RLDP Leds
 2026-01-13 19:09:58 +00:00
logicog 66c58a50df Fix typo in register address for RLDP Leds 2026-01-13 18:02:21 +01:00
logicog 48c12fa0bb Correct TX and RX good MIB counter 
The counters for good TX and RX packages were swapped. Fix this
and also use propper names for the counters.
 2026-01-11 07:51:18 +01:00
logicog d2d7ab7ff1 De-magic NIC rx and tx registers, cleanup 2026-01-11 07:51:18 +01:00
René van Dorst f43bb4eac4 Fix: Serial Timer1: GATE bit should be off. 
Fixes PR#66, commit c5c6b97 and 4e8eb6d.

The GATE-bit should not be used. Timer1 must always be activated to
generate the baudrate clock for serial 0.
 2026-01-10 11:01:17 +01:00
logicog 4e8eb6d766 Merge pull request #66 from vDorst/fix_systick_asm 
Move SYS_TICK to Timer2 and SERIAL baudrate gen to Timer1.
 2026-01-09 08:22:30 +01:00
René van Dorst c5c6b97ad1 installer: SERIAL: Use Timer1 instead of Timer2 
Same as in the main code.

Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Only differance is that the serial is transmit only and poll-based so no
interrupts are used to transmit data.
 2026-01-09 07:52:35 +01:00
René van Dorst 229fad3809 Merge pull request #73 from logicog/dio 
Enable Flash Dual I/O command by default.
Speed up data transfers up to 2x.
 2026-01-08 21:52:52 +00:00
logicog 52522968c7 Restore SPI read registers after Jedec/Security Register reads 2026-01-08 22:42:50 +01:00
René van Dorst 7d04ea1980 doc: mods: Add note about command BBh. 
All the listed parts, support `BBh` command.
 2026-01-08 21:45:58 +01:00
René van Dorst 34d6024eeb DOCS: Add modification page and flash replacement. 
Document modifications like flash replacement.
 2026-01-08 21:35:40 +01:00
René van Dorst d52aeca609 Merge pull request #74 from logicog/dbg 
Convert unconditional prints to debug prints in httpd
 2026-01-08 20:12:21 +00:00
logicog e085fc9cc9 Convert unconditional prints to debug prints in httpd 2026-01-08 09:56:43 +01:00
logicog f621563479 Enable DIO by default 2026-01-08 06:44:38 +01:00
logicog 0fe70f6b62 Merge pull request #72 from vDorst/fix_flash_read 
Flash: fix: Don't use READ 0x03 flash command.
 2026-01-07 18:44:08 +01:00
René van Dorst 745c170f0a Flash: fix: Don't use READ 0x03 flash command. 
In commit 884bc18, `Fast Read 0x0b` was exchanged for `Read 0x03` command.
This was done because I did not see the difference between the commands
and the extra dummycycles looks like wasted time. But I overlooked that
many flash devices, the `Read 0x03` command can't run at the maximum
SPI-clock speed, but only half or less of the maximum SPI-clock speed.
This can cause in-transit data corruption while reading the device.

So change it back to `Fast Read 0x0b` command, so the SPI device is used
within the device specification.
 2026-01-06 19:45:33 +01:00
René van Dorst 5b4b0efb16 installer: remove unused sys_tick timer code. 2026-01-05 21:46:05 +01:00
René van Dorst b818a94202 SERIAL: Wrong use of TI-flag causes IRQ-storm. 
TI-interrupt flag is used in the code, this is only
fine when SERIAL-interrupt is not enabled/used but
when is it used, it generates an interrupt which is
not handled, so it keeps generating interrupts and
trashing the performance and caused starvation on
lower priority interrupts like TIMER 2.

Use an extra flag to signal to the code that the
TX-buffer is empty.
 2026-01-04 14:16:28 +01:00
René van Dorst bbd4656810 SERIAL: Use Timer1 instead of Timer2 
Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Timer2 16-bit auto-reload can now be used for other tasks like SYS_TICK.
 2026-01-04 14:15:30 +01:00
René van Dorst 8b061d5fb9 SYS_TICK: Use Timer2 instead of Timer0. 
Downside of Timer0 is, we have to manually reload
the timer value. Timer2 can do that automaticly.
This saves a lot of time in the interrupt-handler
of the Timer.

Currently Timer2 is used for baudrate-generation
but in a separete commit this is moved to Timer1.
 2026-01-04 14:14:52 +01:00
René van Dorst 5ed4d7afc7 Merge pull request #67 from logicog/docs 
Update Readme
 2025-12-29 21:05:05 +00:00
logicog e73d82ec33 Update Readme 2025-12-29 18:21:16 +01:00
logicog 52832ff299 Merge pull request #56 from vDorst/doc_SWTG024AS_update 
Doc swtg024 as update
 2025-12-27 19:25:43 +01:00
logicog 787a82e846 Create LICENSE 
Adding MIT license as discussed elsewhere
 2025-12-27 07:01:25 +01:00