With UIP_CONF_MAX_CONNECTIONS set to one, a verified upload can leave
reset intent set when its response is never acknowledged. A subsequent
TCP connection reuses that slot, and ACKing its plain GET response can
otherwise trigger reset_chip(). This is sequential slot reuse, not
concurrent HTTP connections.
Store reset intent in the connection appstate and initialize both tstate
and fw_reset_pending on every uip_connected() event, regardless of stale
appstate contents. Reset only after the verified upload response is fully
acknowledged.
Exercise the real HTTP callback for all stale tstate bytes, sequential
slot reuse and a later GET, partial/final ACKs, abort, timeout and CRC
failure. Keep the regression tests in the existing tab-indented style.
Address review by documenting regget 4 and RTL8373 N/non-N ID values under Step 4 of adding-a-device.md, without referring to a particular board or set of units. Keep the verified Horaco CPU and flash capacity in its device table and retain the unverified-chip caveat.
Read register 0x0004 on all three tested HC-SWTGW218AS units. Each returned 0x83730000, identifying RTL8373 rather than RTL8373N. Firmware reports 2 MB flash on all three.
Fill in the verified device-table fields and document the non-N/N register distinction. Leave PHY and flash-chip models explicitly unverified.
The HC-SWTGW218AS is listed only with the SWTG018AS-A V2.0 board, but it
also ships with SWTG118AS-V2.1, the board of the XikeStor SKS3200-8E1X.
That version runs MACHINE=SWTGW218AS: three such switches were flashed
through the OEM web upgrade and work.
Note in the device page that the model name alone does not tell which
firmware to build.
Add the assembled top, front and bottom of the case next to the PCB photos, and
record what the nameplate says (manufacturer, the model description translated
from the Chinese label, 12 V DC 2 A and the serial number format) so a device
can be identified by its label. The top of the case carries no model name.
Also point out where the three console through-holes sit in the top side photo
and note the PWR and SFP1/SFP2 LEDs on the front panel; the case legend for the
copper LEDs reads 1000M/2500M.
The hongyavision HYWS-SGT0204S is sold as an unmanaged 4x2.5G + 2x10G SFP+
switch and carries the 2G5F4_10G2_V1.01 marking on the PCB. It is a sibling of
the KP-9000-6XH-X2 (2M-PCB43-V1.1), so machine/2G5F4_10G2_V1_01.c is that board
definition with these changes:
- The two SFP+ cages (physical ports 5 and 6) are wired the other way round:
physical 5 is on SDS1 with GPIO30/GPIO37, physical 6 on SDS0 with
GPIO50/GPIO10. Copper ports 1-4 match the KP-9000 layout.
- No reset button is fitted and the case has no opening for one, so reset_pin
is GPIO_NA. GPIO54, the reset pin on the KP-9000 layout, reads as permanently
pressed here.
- The board definition sets flash_sio, so the flash is read with single-IO: the
fitted 512 KB Bright Moon T25S40 cannot be read in DIO mode on this board, an
image that leaves DIO enabled does not come up at all, while the same image
with single-IO boots and runs normally (two units).
- The board is added to the machine_custom_init() group that sets
LED_GLB_IO_EN bit 6, otherwise the RTL837x "solid" conditions (LINK/speed)
never drive the LEDs and the 2.5G LED glows faintly at 100M/1000M.
flash_sio is a new field of struct machine that rtlplayground.c hands to
flash_init(); only this board sets it, every other machine keeps DIO. It costs
management-plane speed only, the ASIC keeps forwarding in hardware.
The stock firmware runs a factory test console on the serial header at 9600
baud, whose silkscreen labels are shifted by one pin.
Verified: warning-free build, `make machine_check` passes for every target, the
host tests pass, and a control build of this target without the LED hook differs
from the KP-9000-6XH_X2_V1_1 image in 44 bytes: all inside the machine
description (including flash_sio) and the image CRC16, nothing else in the
firmware moved. On the board the single-IO image boots and runs on two units;
port order, SFP cages and LED behaviour come from the machine definition
verified on this board earlier.
UART is broken out to the unpopulated switch header at the front of the
board.
This isn't quite the same as the V2.0 definition as the system led is
always on, not routed through the CPU.
Additionally, document that the newer revision of the same "YS25-0402"
is supported via the existing PCB-K0402WS-V3.0 target.
bloq
René van Dorst
avicarmeli
João Silva
HL Yi
logicog
d00f
Andre Brait
Kamikaze94
Victor
Matt Merhar
feelfree69