14 Commits

Include renames

Author	SHA1	Message	Date
logicog	9a69fac07a	Adding support for 2.5Gbit Ethernet modules	2025-06-14 09:52:15 +02:00
logicog	37ca55392a	Add support for 10G Fiber	2025-06-14 09:12:24 +02:00
logicog	0485c21da0	Add support for reading SFP EEProm data via I2C, support for 1G SFP modules	2025-06-13 20:36:49 +02:00
logicog	b41410ce6b	Cleanup	2025-06-12 20:33:35 +02:00
logicog	8c8b92ed65	Add SerDes configuration support for the RTL8221B ethernet port to support 2.5 and 1GBit	2025-06-12 20:32:36 +02:00
logicog	8243a454de	Adding support for link status display	2025-06-10 17:57:28 +02:00
logicog	c54227f057	Fix SFR_DATA access, make internal switch work	2025-06-09 11:22:52 +02:00
logicog	c5d7628ea0	Adding support for the ASIC second counter register and sleeping	2025-06-06 20:49:15 +02:00
logicog	9f22c49af7	Make C45 PHY access work, support for suspected C22 access, switch to 115200 baud	2025-06-05 20:15:42 +02:00
logicog	73a6f0f311	Adding more flash functionality and image documentation	2025-05-14 20:40:44 +02:00
logicog	7493089c39	Adding DIO for flash access	2025-05-11 20:29:31 +02:00
logicog	3a953bba47	More commands, fixing strange sdcc behaviour for clock setting defines	2025-05-11 18:28:08 +02:00
logicog	6d3214d13d	More initial documentation	2025-05-10 17:01:33 +02:00
logicog	c4835b7a6c	Initial commit	2025-05-10 15:52:02 +02:00