Commit Graph
100 Commits
Author SHA1 Message Date
logicog 8d467b2099 Remove unused uIP neighbour code 2026-03-09 22:06:57 +01:00
logicog a45d0f659f Correctly handle incoming and outgoing IP packets in uip_arp.c 2026-03-09 22:06:57 +01:00
logicog 820477cd27 Better comments for rtlplayground.c 2026-03-09 22:06:57 +01:00
logicog e9171d7d22 Handle outgoing DHCP server messages correctly 2026-03-09 22:06:57 +01:00
logicog dd0ecc5438 Enable ARP processing for IP packets 2026-03-09 22:06:57 +01:00
logicog 5e1ea935a7 More DHCPD work 2026-03-09 22:06:57 +01:00
logicog 57e7d7dd2a Do not drop DHCP packets for a DHCP-server 2026-03-09 22:06:57 +01:00
logicog 855383052b Fix uip.c 2026-03-09 22:06:57 +01:00
logicog acaa80b732 Make dhcpd server implementation available 2026-03-09 22:06:57 +01:00
logicog 233ff5a728 Initial support for dhcp server 2026-03-09 22:06:57 +01:00
logicog ed8dc0f43c Fix bug in atoi_hex when uneven number of digits parsed
We fix a bug in atoi_hex when parsing an unneven number of digits
by rotating the entire number 4 bits right as would have been
done if the number had been preceded by a 0 to make the number
of digits even.
2026-03-09 06:48:24 +01:00
logicog 7949975191 Add backend support for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 1374272db6 Add simulation support for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 20fb626cc1 Make bandwidth control page accessible 2026-03-08 20:55:50 +01:00
logicog 31a488e4e9 Add web page for bandwidth control 2026-03-08 20:55:50 +01:00
logicog 14bc823024 Add reg_bit_test function 2026-03-08 20:55:50 +01:00
logicog 04ab083652 Add documentation for bandwidth control 2026-03-08 19:04:48 +01:00
logicog 1836c7dcb6 Add Bandwidth control for ingress/egreess at port 2026-03-08 19:04:48 +01:00
logicog eb13d4ab04 Add iniital implementation of bandwidth control 2026-03-05 07:43:11 +01:00
logicog dc16b25d62 Add support for the SWTG018AS-A V2.0 8+1 unmanged switch
The SWTG018AS-A V2.0 is an 8x2.5GBit/s port + 1 SFP+ port unmanged device
It is sold in an unbranded casing e.g. by Ampcom.
Hardware:
SoC: RTL8373N
Additional PHY: RTL8224
Flash: Puya P25D40SH (4MBit, slimmer, not standard SOP-8 package!)
LEDs: 1 Green + 1 Orange per Ethernet port (green designates 2.5GBit)
      1 Green LED for the SFP+ port

The photos already show a modified PCB: Unpopulated resistors R52 and R53
have been bridged in order to enable the serial console. The smaller flash
memory chip at U2 has been replaced with a Windbond 128MBit standard-sized
SOIC-8 chip in order to easily use SOIC clamps to flash the device. Also
the serial header has been populated.
2026-02-27 20:11:53 +01:00
logicog 70127018da Add device photos of KeepLink KP-9000-6XHML-X2 2026-02-25 18:07:54 +01:00
logicog 734cce381a Fix reset button GPIO-Number for MACHINE_KP_9000_6XHML_X2 2026-02-25 06:28:49 +01:00
logicog dfc96761b3 Add support for history editing 2026-02-24 19:57:22 +01:00
logicog 94d4ace88b Add support for command line editing
The current code for entering commands via the serial CLI is completely
refactored and moved out of rtlplayground.c into a separate file cmd_edit.c
putting code into BANK2.
The serial ring buffer sbuf[] is now exclusively used for receiving
keys, including escape sequences (DEL will generate a 4-byte escape
sequence). The command is now held in cmd_buffer. This reduces
XMEM use, because the serial buffer can be much smaller.

Supported is only editing the current command line via backspace, del,
cursor left and right.

Because the code cannot distinguish escape sequences which are not yet
complete (because the serial isr has not yet put all characters into
the serial buffer) from the dozens of unsupported ones (F-keys/home,
Page up/down, cursor up/down...) they are ignored and remain in the
serial buffer until the ring-pointer overwrites them. This is standard
behaviour for consoles, which will print out garbage for unsupported
characters. In this implementation, the command line buffer and the
visible command line in the terminal are always synced, so garbage
can be removed again by ediing the line.

The code makes several redundant checks in order to prevent race-conditions
between the serial ISR and the comand-editing code.
2026-02-24 19:57:22 +01:00
logicog 1b43addb11 Fix MACHINE_KP_9000_6XHML_X2: swap SFP-ports remove unnecessary LED-MUX
The left and right SFP ports were swapped in the machine structure. They
are now correctly identified a comment is added. The custo LED-mux
is removed again, as this was accidentally added for demonstration
purposes. It is not necessary, as the device uses the default.
2026-02-13 07:53:29 +01:00
logicog d29adafe3c Use generic led configuration 2026-02-08 20:25:01 +01:00
logicog 59894e68cb Add LED-pad mapping 2026-02-08 20:24:58 +01:00
logicog 6af072eb2c Add LED configuration in machine profile 2026-02-08 20:24:05 +01:00
logicog 8cae3f1212 Add generic LED configuration support 2026-02-08 20:23:30 +01:00
logicog 9aaddcd9b9 Reduce DSEG usage as we need 1 OSEG byte 2026-02-08 20:23:30 +01:00
logicog 196e430ec6 Remove debug output 2026-02-08 20:23:30 +01:00
logicog 9424aa3a3b LED configuration support 2026-02-08 20:23:30 +01:00
logicog 7a57416e4c Add MACHINE_HG0402XG_V1_1 2026-02-08 20:23:29 +01:00
logicog 47878ac580 Add more printout 2026-02-08 16:46:56 +01:00
logicog d83f91f9e8 Fix Auto-negotiation
Commit 7f4c276 used the wrong MMD device
for use with the auto-negotiation page:
- phy_write(port, PHY_MMD_AN, 0x00, 0x3200);	// Restart AN
+ phy_write(port, PHY_MMD31, PHY_ANEG_CTRL, 0x3200);	// Restart AN

Fix this.
2026-02-08 16:46:56 +01:00
logicog 708b6b7f28 Use new signatures for vlan_create and phy-settings 2026-02-08 16:46:56 +01:00
logicog 9d07416641 Convert phy_set_duplex phy_set_speed to use struct phy_settings 2026-02-08 16:46:56 +01:00
logicog 4747eac9bf Reduce DSEG usage for parameters used in port/vlan configuration
Currently 5 Bytes are used by the port and vlan configuration:
--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_port_ingress_filter_PARM_2:
	.ds 1
_vlan_create_PARM_2:
	.ds 2
_vlan_create_PARM_3:
	.ds 2

They are used for passing parameters. Use __xdata to pass the
parameters instead.
2026-02-08 16:03:37 +01:00
logicog ecf152990f Fix MACHINE_KP_9000_6XHML_X2: the SDS ids were swapped 2026-02-08 16:03:37 +01:00
logicog ea230615f9 Use a MAC address based on the SoC's UUID
We use the SoC's UUID to generate a fixed MAC for a particular
switch device. The MAC generated uses a Realtek prefix and then
is followed by 3 bytes genertaed from the first 3 bytes of the
UUID xored with the last byte in order to prevent being able
to deduce the UUID from the public MAC.
2026-02-08 15:49:49 +01:00
logicog 9d4eef2dd6 Add support for management vlan
This adds support for the verification of a mangement vlan.
When enabled, then the switch's CPU will not listen to any packets
that are not tagged with the respective VLAN tag.
On the command line this is enabled by setting:
> vlan <vlan> mgmt

Setting the vlan ID of the management VLAN to 0 or 1 disables
the mangement VLAN function.
2026-01-29 19:56:01 +01:00
logicog f48c84b18e Document checksum calculation offload in hardware 2026-01-18 07:50:38 +01:00
logicog 3bfcabbb99 Add main directory for includes 2026-01-18 07:50:38 +01:00
logicog 5eecab4844 Move SYS_TICK_HZ to rtl837x_common.h
The definition is needed everywhere in the code where the ticks
need to be related to seconds.
2026-01-18 07:50:38 +01:00
logicog fd1d14a3e7 Use main directory for includes in httpd 2026-01-18 07:50:38 +01:00
logicog 34cebe5971 Enable UDP for DHCP in uIP 2026-01-18 07:50:38 +01:00
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog af3be9a067 Initial DHCP implementation 2026-01-18 07:39:49 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
logicog d1d5d5e18f Consistently use banked externally visible functions 2026-01-17 17:54:31 +01:00
logicog 892920a627 Mover phy code to bank 2 as bank 1 already overflows 2026-01-17 17:54:31 +01:00
logicog eb0e90df5c Enable bank 2 in Makefile 2026-01-17 17:54:31 +01:00
logicog 2ce168883b Add support for banks > 1 2026-01-17 17:54:31 +01:00
logicog 300f599551 Fix output of l2 command 2026-01-17 12:56:43 +01:00
logicog 73a355cff5 Add L2-table access method defintions 2026-01-17 12:56:43 +01:00
logicog e53f5e7134 Add L2 entry deletion support via web 2026-01-17 12:56:43 +01:00
logicog 3509f7da04 Add web functionality to delete L2 entries 2026-01-16 18:04:22 +01:00
logicog 55d10ae3fc Make L2 information page available in navigation menu 2026-01-16 18:04:22 +01:00
logicog 88e706c295 Add simulation support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e59158e006 Add backend support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e0c9338357 Add support in web-interface for displaying L2 entries 2026-01-16 18:04:22 +01:00
logicog e7df748b6a Fix error in calculating VLAN for L2 entries 2026-01-16 18:04:22 +01:00
logicog 84fe44cc9a Add httpd backend implementation for MIB counter requests 2026-01-15 18:07:56 +01:00
logicog 6326428406 Add simulation of MIB counters 2026-01-15 18:07:56 +01:00
logicog f33c4e3dc9 Add display of MIB counters to Web-Interface 2026-01-15 18:07:56 +01:00
logicog 66c58a50df Fix typo in register address for RLDP Leds 2026-01-13 18:02:21 +01:00
logicog 48c12fa0bb Correct TX and RX good MIB counter
The counters for good TX and RX packages were swapped. Fix this
and also use propper names for the counters.
2026-01-11 07:51:18 +01:00
logicog d2d7ab7ff1 De-magic NIC rx and tx registers, cleanup 2026-01-11 07:51:18 +01:00
logicog 52522968c7 Restore SPI read registers after Jedec/Security Register reads 2026-01-08 22:42:50 +01:00
logicog e085fc9cc9 Convert unconditional prints to debug prints in httpd 2026-01-08 09:56:43 +01:00
logicog f621563479 Enable DIO by default 2026-01-08 06:44:38 +01:00
logicog e73d82ec33 Update Readme 2025-12-29 18:21:16 +01:00
logicog 7fdf9ca86d Add time command to show system time 2025-12-25 10:27:37 +01:00
logicog 2b364943c2 Fix system clock 2025-12-25 10:27:37 +01:00
logicog 34a0e2d338 Right align speed option selection 2025-12-25 09:46:59 +01:00
logicog 4878a36638 Use changed signatures in parse_port for PHY speed setting 2025-12-25 09:46:59 +01:00
logicog 2a7bfdc119 Add duplex setting in PHY speed configuration 2025-12-23 13:04:34 +01:00
logicog 367bef2b2f Add defines for duplex modes 2025-12-23 13:04:34 +01:00
logicog cad74017a9 Remove white space in machine.h 2025-12-23 13:04:34 +01:00
logicog 3af63af4a4 Add MTU setting in web-page 2025-12-23 13:04:34 +01:00
logicog b7cfc73752 Add support in simulator for mtus 2025-12-22 23:28:50 +01:00
logicog 51345a07e6 Add mtu support in http server 2025-12-22 23:28:50 +01:00
logicog 67fbad38ce Add mtu command 2025-12-22 23:28:50 +01:00
logicog 67439efd2b Correctly display 9-port machines 2025-12-22 23:28:50 +01:00
logicog b4b8ad5738 Simulate 9-port machines 2025-12-22 23:28:50 +01:00
logicog eb0106d9f4 Correct bits in advertised PHY speeds 2025-12-22 23:28:50 +01:00
logicog f0537d759f Correct PHY registers for speed selection 2025-12-22 23:28:50 +01:00
logicog 36d5ee3ddd Add port speed page 2025-12-22 23:28:50 +01:00
logicog 58c9af242d Cleanup code in rtl837x_phy.c 2025-12-17 06:44:11 +01:00
logicog dc9bc5ec7d Add SFP data to send_basic_info 2025-12-17 06:44:09 +01:00
logicog 44792699bf Add sfr_mask_data function header 2025-12-17 06:43:31 +01:00
logicog 12db61faf7 Add tooltips 2025-12-17 06:43:28 +01:00
logicog 519c224dd2 Use charset=UTF-8 in http header
This allows us to use the degree sign for the temperatur
readings of the SFP modules.
2025-12-16 20:08:47 +01:00
logicog b442417a8a Add tooltips for ports 2025-12-16 20:08:47 +01:00
logicog 87717a0790 Move drawing of ports into main.js
This reduces the number of .js which are pulled by the browser
when loading a http page, which should reduce the loading time.
Also prepare for device-dependent logical to physical port
mappings.
2025-12-16 20:08:47 +01:00
logicog 81fdb14213 Fix http_sim.c 2025-12-16 20:08:47 +01:00
logicog 6fd32d290c Printout of dynamic SFP information 2025-12-16 20:06:27 +01:00
logicog 6272d949cd Add readout of SFF-8472 A2h info from SFPs 2025-12-16 20:06:27 +01:00
logicog 95fae8bad2 Display actual link speed 2025-12-15 06:54:41 +01:00
logicog 6dfad825c0 Add IGMP documentation 2025-12-15 06:54:41 +01:00