Commit Graph
4 Commits
Author SHA1 Message Date
Andre Brait 7d7585fa6d fix(health): give the LLDP phase a valid slot in the phase arrays
In HEALTH=1 builds health_phase(HEALTH_LLDP) used id 7 while ph_max[] and
ph_slow[] had HEALTH_PHASES = 6 entries. The LLDP checkpoint therefore
wrote one byte past ph_max (into the high byte of ph_slow[0]) and, when
the phase took two ticks or more, incremented two bytes past ph_slow
(dhcp_state.state and transaction_id on KP_9000_6XHML_X2).

Rename it HEALTH_PH_LLDP = 6, derive HEALTH_PHASES from it so the arrays
always cover the last phase, print an lldp line in "health" and document
it.

Fixes #658
2026-10-22 11:32:05 +02:00
Andre Brait 34c0ef77d0 doc: move CPU identification guidance into the device guide
Address review by documenting regget 4 and RTL8373 N/non-N ID values under Step 4 of adding-a-device.md, without referring to a particular board or set of units. Keep the verified Horaco CPU and flash capacity in its device table and retain the unverified-chip caveat.
2026-10-19 22:17:07 +02:00
Andre Brait 1d5e4cd722 doc: identify the Horaco SWTG118AS-V2.1 CPU and flash capacity
Read register 0x0004 on all three tested HC-SWTGW218AS units. Each returned 0x83730000, identifying RTL8373 rather than RTL8373N. Firmware reports 2 MB flash on all three.

Fill in the verified device-table fields and document the non-N/N register distinction. Leave PHY and flash-chip models explicitly unverified.
2026-10-19 22:09:42 +02:00
Andre Brait eacf13690c doc: Horaco HC-SWTGW218AS on PCB SWTG118AS-V2.1
The HC-SWTGW218AS is listed only with the SWTG018AS-A V2.0 board, but it
also ships with SWTG118AS-V2.1, the board of the XikeStor SKS3200-8E1X.
That version runs MACHINE=SWTGW218AS: three such switches were flashed
through the OEM web upgrade and work.

Note in the device page that the model name alone does not tell which
firmware to build.
2026-10-19 03:45:29 +02:00