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Author SHA1 Message Date
René van Dorst b7b4594406 N-type SOC need to swap some Serdes lines to make it work. 
Without this fix N-type SOC devices like RTL8372N, RTL8383N and also the
4-port PHY RTL8224N, don't have a functional Serdes. Although the SOC
sees a link, there is no packet flow on both SFP-port nor RTL8224 ports.

Added helper functions to read/write to the RTL8224.
RTL8224 has the same register layout so we can use the same register
defines as for the main SOC.
 2026-01-25 17:22:51 +01:00
René van Dorst aa750d8ff1 Detect SOC type and use detected SOC type to init the hardware. 
Detect the SOC type and variant. RTL8372 vs RTL8373 and also is it as
non-N/N variant of the SOC.
Even if the machine profile is wrong the hardware will be initilised on
the detected type.
 2026-01-25 16:55:43 +01:00
logicog 17b428a603 Merge pull request #90 from feelfree69/fix-FW-Upload 
make fw upload working; nicer debug outputs for console
 2026-01-24 09:54:07 +01:00
feelfree69 0345bf7bf2 Use DIO mode for normal operation; disable DIO before flashing. Use SYS_LED for indicating booting (slow), flashing (fast) and normal operation (on) 2026-01-22 19:38:17 +01:00
feelfree69 1e8382bd56 Add output of build time stamp 2026-01-22 10:24:07 +01:00
feelfree69 8dc914eb07 make fw upload working; nicer debug outputs for console 2026-01-22 08:17:07 +01:00
chriz a528436572 Add HiSource HI-K0402WS pictures 2026-01-21 14:43:04 +01:00
René van Dorst 2cdeda3bc9 Merge pull request #87 from feelfree69/patch-1 
Move SW version print after flash initialization
 2026-01-20 18:55:27 +00:00
logicog a72528b724 Merge pull request #84 from vDorst/feat_version_hardware 
version: Also show the hardware profile.
 2026-01-20 18:37:17 +01:00
feelfree69 1e073b20b6 do flash_init() earlier 
As suggested in review comment
 2026-01-20 08:13:22 +01:00
feelfree69 efcbc8b4a8 Move SW version print after flash initialization 
The code of print_sw_version() is in BANK1 and needs a proper configured flash controller.
 2026-01-19 20:32:20 +01:00
René van Dorst 13e9dbbc7b Merge pull request #68 from logicog/dhcp 
Add a DHCP client implementation and validate BANKS code size.
 2026-01-18 11:08:17 +00:00
logicog f48c84b18e Document checksum calculation offload in hardware 2026-01-18 07:50:38 +01:00
logicog 3bfcabbb99 Add main directory for includes 2026-01-18 07:50:38 +01:00
logicog 5eecab4844 Move SYS_TICK_HZ to rtl837x_common.h 
The definition is needed everywhere in the code where the ticks
need to be related to seconds.
 2026-01-18 07:50:38 +01:00
logicog fd1d14a3e7 Use main directory for includes in httpd 2026-01-18 07:50:38 +01:00
logicog 34cebe5971 Enable UDP for DHCP in uIP 2026-01-18 07:50:38 +01:00
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog af3be9a067 Initial DHCP implementation 2026-01-18 07:39:49 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
René van Dorst e74c4f148a version: Also show the hardware profile. 2026-01-17 21:02:25 +01:00
logicog d1d5d5e18f Consistently use banked externally visible functions 2026-01-17 17:54:31 +01:00
logicog 892920a627 Mover phy code to bank 2 as bank 1 already overflows 2026-01-17 17:54:31 +01:00
logicog eb0e90df5c Enable bank 2 in Makefile 2026-01-17 17:54:31 +01:00
logicog 2ce168883b Add support for banks > 1 2026-01-17 17:54:31 +01:00
René van Dorst e54313eded Merge pull request #83 from logicog/l2 
Add support for L2 entry display and deletion in the web interface
 2026-01-17 16:00:37 +00:00
logicog 300f599551 Fix output of l2 command 2026-01-17 12:56:43 +01:00
logicog 73a355cff5 Add L2-table access method defintions 2026-01-17 12:56:43 +01:00
logicog e53f5e7134 Add L2 entry deletion support via web 2026-01-17 12:56:43 +01:00
logicog 3509f7da04 Add web functionality to delete L2 entries 2026-01-16 18:04:22 +01:00
logicog 55d10ae3fc Make L2 information page available in navigation menu 2026-01-16 18:04:22 +01:00
logicog 88e706c295 Add simulation support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e59158e006 Add backend support for L2 entries in web 2026-01-16 18:04:22 +01:00
logicog e0c9338357 Add support in web-interface for displaying L2 entries 2026-01-16 18:04:22 +01:00
logicog e7df748b6a Fix error in calculating VLAN for L2 entries 2026-01-16 18:04:22 +01:00
logicog 5cb1acfc15 Merge pull request #82 from vDorst/fix_SWTG024AS_sfp_port_mapping 
SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped.
 2026-01-15 19:58:48 +01:00
René van Dorst 46864ca9a7 SWGT024_V2_0: Fix .phys_to_log_port, sfp-ports have to be swapped. 
On SWGT024_V2_0, the SFP ports are arranged differently.
The port mapping should also reflect this.
 2026-01-15 19:46:04 +01:00
René van Dorst 00b42db5da Merge pull request #78 from logicog/nic_demagic 
MIB Counter fixes and Detailed Display
 2026-01-15 18:45:38 +00:00
logicog 84fe44cc9a Add httpd backend implementation for MIB counter requests 2026-01-15 18:07:56 +01:00
logicog 6326428406 Add simulation of MIB counters 2026-01-15 18:07:56 +01:00
logicog f33c4e3dc9 Add display of MIB counters to Web-Interface 2026-01-15 18:07:56 +01:00
logicog 4a615cb4bd Merge pull request #71 from vDorst/doc_mods 
DOCS: Add modification page and flash replacement.
 2026-01-15 07:43:33 +01:00
René van Dorst 030772f1ef Merge pull request #75 from vDorst/fix_serial_timer1 
Fix: Serial Timer1: GATE bit should be off.
 2026-01-13 19:10:22 +00:00
René van Dorst 4ce8adf954 Merge pull request #80 from logicog/fix_rldp_register 
Fix typo in register address for RLDP Leds
 2026-01-13 19:09:58 +00:00
logicog 66c58a50df Fix typo in register address for RLDP Leds 2026-01-13 18:02:21 +01:00
logicog 48c12fa0bb Correct TX and RX good MIB counter 
The counters for good TX and RX packages were swapped. Fix this
and also use propper names for the counters.
 2026-01-11 07:51:18 +01:00
logicog d2d7ab7ff1 De-magic NIC rx and tx registers, cleanup 2026-01-11 07:51:18 +01:00
René van Dorst f43bb4eac4 Fix: Serial Timer1: GATE bit should be off. 
Fixes PR#66, commit c5c6b97 and 4e8eb6d.

The GATE-bit should not be used. Timer1 must always be activated to
generate the baudrate clock for serial 0.
 2026-01-10 11:01:17 +01:00
logicog 4e8eb6d766 Merge pull request #66 from vDorst/fix_systick_asm 
Move SYS_TICK to Timer2 and SERIAL baudrate gen to Timer1.
 2026-01-09 08:22:30 +01:00
René van Dorst c5c6b97ad1 installer: SERIAL: Use Timer1 instead of Timer2 
Same as in the main code.

Use Timer1 as baudrate generator.
Timer1 can be programmed to have the same accuracy and deviation as
Timer2, up to 115200 at F_SYS = 125 Mhz. See comment
setup_serial_timer1() comment for valid baudrates and settings.
Timer1 is used in 8-bit auto-reload mode.

Only differance is that the serial is transmit only and poll-based so no
interrupts are used to transmit data.
 2026-01-09 07:52:35 +01:00