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115 Commits 9 Branches 1 Tag
multcon
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5 Commits
Author SHA1 Message Date
logicog c9a82b550a Fix for issue #3 reported by airjinkela: wrong register ID exceeding 16bit 2025-08-06 08:22:19 +02:00
logicog 995deb313c Cleanup of unused code 2025-07-22 09:41:44 +02:00
logicog 6f90e1db53 Add support for changing Ethernet speeds 2025-06-29 20:06:53 +02:00
logicog b59f51b3ca Cleanup of initialitation, make debug code conditional 2025-06-29 11:10:29 +02:00
logicog 5faf31cdb8 Moving PHY code to BANK1 2025-06-25 15:30:50 +02:00