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Cleanup and fix flushing of L2 UC entries

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logicog committed 2025-08-24 19:26:24 +02:00
1 parent 81b7e4fa87
commit ef742f8f19
3 files changed
+29 -21
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rtl837x_regs.h
+4 -1
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@@ -105,9 +105,12 @@
#define RTL837x_L2_DATA_OUT_B 0x5cd0
#define RTL837x_L2_DATA_OUT_C 0x5cd4
#define RTL837x_TBL_DATA_IN_A 0x5cb8
#define RTL837x_L2_TBL_CTRL 0x53d4
#define RTL837x_PVID_BASE_REG 0x4e1c
#define RTL837x_L2_TBL_FLUSH_CTRL 0x53d4
#define L2_TBL_FLUSH_EXEC 0x10000
#define RTL837x_L2_TBL_FLUSH_CNF 0x53dc
/*
* Egress / ingress filtering
*/