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update doc/l2.md

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air jinkela
2025-08-11 08:49:56 +08:00
parent 93723b0061
commit d79ac79f2f
1 changed files with 4 additions and 1 deletions
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doc/l2.md
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@@ -32,7 +32,7 @@ cleared by the ASIC. Data then is in the output data registers
#define RTL837x_L2_DATA_OUT_C 0x5cd4 #define RTL837x_L2_DATA_OUT_C 0x5cd4
DATA_OUT_A DATA_OUT_B L2_DATA_OUT_C DATA_OUT_A DATA_OUT_B L2_DATA_OUT_C
M2 M3 M4 M5 fV VV M0 M1 xx xF xx xg M2 M3 M4 M5 fV VV M0 M1 xx xF xx gg
M0-M5: 6 bytes of MAC, M0 is MSB M0-M5: 6 bytes of MAC, M0 is MSB
V: 12 bits of VLAN-ID V: 12 bits of VLAN-ID
@@ -41,6 +41,9 @@ f: bit 5 set: Entry is valid, otherwise stale
bit 7: bit 1 of port-number bit 7: bit 1 of port-number
g: bit 0: bit 2 of port-number g: bit 0: bit 2 of port-number
bit 1: bit 3 of port-number (MSB) bit 1: bit 3 of port-number (MSB)
bit 2: bit 0 of entry-age
bit 3: bit 1 of entry-age
bit 4: bit 2 of entry-age (MSB)
F: bit 0: entry is static(1) or learned (0) F: bit 0: entry is static(1) or learned (0)
``` ```
The next entry can be now found in RTL837x_TBL_DATA_0 (entry = RTL837x_TBL_DATA_0_bits(0-11) + 1), The next entry can be now found in RTL837x_TBL_DATA_0 (entry = RTL837x_TBL_DATA_0_bits(0-11) + 1),