Merge pull request #489 from DrDoof/feat/port-media-pause

port: report link role and negotiated pause per port

cmd_parser.c

@@ -893,7 +893,10 @@ void parse_port(void)
 		print_string_x(port_names[phy_settings.port]);
 		if (!machine.is_sfp[phy_settings.port]) {
 			phy_show(phy_settings.port);
+		} else {
+			write_char('\n');
 		}
+		port_media_show(phy_settings.port);
 	} else if (cmd_compare(2, "name")) {
 		uint8_t i = 0;
 		while ( (i < PORT_NAME_SIZE-1) && (cmd_buffer[cmd_words_b[3] + i] != NUL) ) {

rtl837x_port.c

@@ -487,6 +487,38 @@ void port_l2_setup(void) __banked
 }
 
 
+void port_media_show(uint8_t port) __banked
+{
+	uint8_t pause;
+
+	if (!machine.is_sfp[port]) {
+		reg_read_m(RTL837X_REG_LINKS_STS);
+		if (sfr_data[(port / 8) + 1] >> (port % 8) & 1) {
+			print_string("Link role: ");
+			reg_read_m(RTL837X_MAC_MSTR_SLV_STS);
+			if (sfr_data[3 - (port >> 3)] & (1 << (port & 7)))
+				print_string("master\n");
+			else
+				print_string("slave\n");
+		}
+	}
+
+	print_string("Pause negotiated:");
+	reg_read_m(RTL837X_MAC_TX_PAUSE_STS);
+	pause = sfr_data[3 - (port >> 3)] & (1 << (port & 7));
+	if (pause)
+		print_string(" TX");
+	reg_read_m(RTL837X_MAC_RX_PAUSE_STS);
+	if (sfr_data[3 - (port >> 3)] & (1 << (port & 7))) {
+		print_string(" RX");
+		pause = 1;
+	}
+	if (!pause)
+		print_string(" none");
+	write_char('\n');
+}
+
+
 void port_stats_print(void) __banked
 {
 	print_string("\nPort\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\n");

rtl837x_port.h

@@ -49,6 +49,7 @@ extern __xdata struct vlan_settings vlan_settings;
 uint8_t port_l2_forget(void) __banked;
 void port_l2_learned(void) __banked;
 void port_stats_print(void) __banked;
+void port_media_show(uint8_t port) __banked;
 int8_t vlan_get(uint16_t vlan) __banked;
 __xdata uint16_t vlan_name(uint16_t vlan) __banked;
 void vlan_name_remove(uint16_t vlan) __banked;

rtl837x_regs.h

@@ -83,6 +83,10 @@
 #define RTL837X_REG_LINKS	0x63f0
 #define RTL837X_REG_LINKS_89	0x63f4
 #define RTL837X_REG_LINKS_STS	0x63E8
+/* Per-port status bits: bit N is chip port N */
+#define RTL837X_MAC_TX_PAUSE_STS	0x63FC
+#define RTL837X_MAC_RX_PAUSE_STS	0x6400
+#define RTL837X_MAC_MSTR_SLV_STS	0x6408
 
 /* Each nibble encodes the link state of a port.
    Port 0 appears to be the CPU port