mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
Enable 10g EEE on init
This commit is contained in:
+4
-4
@@ -91,7 +91,7 @@ void static sds_init(void)
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}
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}
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void rtl8373_init(void)
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void rtl8373_init(void) __banked
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{
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{
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print_string("\nrtl8373_init called\n");
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print_string("\nrtl8373_init called\n");
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@@ -168,7 +168,7 @@ void rtl8373_init(void)
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reg_bit_set(RTL837X_REG_HW_CONF, 0);
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reg_bit_set(RTL837X_REG_HW_CONF, 0);
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// enable EEE for all ports at 2.5G and 10G, but don't reset the PHYs
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// enable EEE for all ports at 2.5G, but don't reset the PHYs
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port_eee_enable_all(EEE_2G5 | EEE_NORESET);
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port_eee_enable_all(EEE_2G5 | EEE_NORESET);
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// TODO: patch the PHYs
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// TODO: patch the PHYs
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@@ -188,7 +188,7 @@ void rtl8373_init(void)
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}
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}
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void rtl8372_init(void)
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void rtl8372_init(void) __banked
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{
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{
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print_string("\nrtl8372_init called\n");
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print_string("\nrtl8372_init called\n");
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@@ -246,7 +246,7 @@ void rtl8372_init(void)
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// enable EEE for all ports at 2.5G and 10G, but don't reset the PHYs
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// enable EEE for all ports at 2.5G and 10G, but don't reset the PHYs
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port_eee_enable_all(EEE_2G5 | EEE_NORESET);
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port_eee_enable_all(EEE_10G | EEE_NORESET);
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// TODO: patch the PHYs
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// TODO: patch the PHYs
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+15
-6
@@ -495,7 +495,7 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked
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REG_SET(RTL837X_EEE_CTRL_BASE + (port << 8), EEE_RX_ENABLE | EEE_TX_ENABLE);
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REG_SET(RTL837X_EEE_CTRL_BASE + (port << 8), EEE_RX_ENABLE | EEE_TX_ENABLE);
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print_string("EEE on for "); print_byte(port); print_string(" speed ");
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print_string("EEE on for "); print_byte(port); print_string(" speed ");
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// Enable all speeds up to the specified speed
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// Enable all speeds up to the specified speed
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if ((speed & (EEE_100 | EEE_1000 | EEE_2G5 | EEE_5G | EEE_10G)) == EEE_100) {
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if (speed & EEE_100) {
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print_string("100m\n");
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print_string("100m\n");
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// Enable EEE advertisement for 100BASE-T via EEE Advertisement Reg
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// Enable EEE advertisement for 100BASE-T via EEE Advertisement Reg
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_100M);
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_100M);
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@@ -503,7 +503,7 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked
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phy_reset(port);
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phy_reset(port);
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return;
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return;
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}
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}
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if ((speed & (EEE_100 | EEE_1000 | EEE_2G5 | EEE_5G | EEE_10G)) == EEE_1000) {
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if (speed & EEE_1000) {
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print_string("1g\n");
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print_string("1g\n");
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// Disable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2
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// Disable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, 0);
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, 0);
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@@ -513,7 +513,7 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked
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phy_reset(port);
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phy_reset(port);
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return;
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return;
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}
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}
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if ((speed & (EEE_100 | EEE_1000 | EEE_2G5 | EEE_5G | EEE_10G)) == EEE_2G5) {
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if (speed & EEE_2G5) {
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print_string("2g5\n");
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print_string("2g5\n");
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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@@ -523,7 +523,7 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked
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phy_reset(port);
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phy_reset(port);
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return;
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return;
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}
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}
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if ((speed & (EEE_100 | EEE_1000 | EEE_2G5 | EEE_5G | EEE_10G)) == EEE_5G) {
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if (speed & EEE_5G) {
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print_string("5g\n");
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print_string("5g\n");
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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@@ -533,7 +533,7 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked
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phy_reset(port);
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phy_reset(port);
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return;
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return;
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}
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}
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if ((speed & (EEE_100 | EEE_1000 | EEE_2G5 | EEE_5G | EEE_10G)) == EEE_10G) {
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if (speed & EEE_10G) {
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print_string("10g\n");
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print_string("10g\n");
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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// Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_10G | PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_10G | PHY_EEE_BIT_1G | PHY_EEE_BIT_100M);
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@@ -650,7 +650,16 @@ void port_eee_status(uint8_t port) __banked
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void port_eee_enable_all(__xdata uint8_t speed) __banked
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void port_eee_enable_all(__xdata uint8_t speed) __banked
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{
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{
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for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
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for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
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port_eee_enable(i, speed);
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if (i == 3 && machine.n_10g) {
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port_eee_enable(i, speed);
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} else if (i == 8 && machine.n_10g == 2) {
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port_eee_enable(i, speed);
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} else {
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if (speed & EEE_10G)
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port_eee_enable(i, speed & EEE_NORESET | EEE_2G5);
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else
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port_eee_enable(i, speed);
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}
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}
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}
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}
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}
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