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https://github.com/logicog/RTLPlayground.git
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use uint types
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+3
-3
@@ -7,7 +7,7 @@
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#include "rtl837x_stdio.h"
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#include "rtl837x_sfr.h"
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__xdata unsigned char dio_enabled;
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__xdata uint8_t dio_enabled;
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/*
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@@ -36,7 +36,7 @@ void flash_configure_mmio(void)
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* This configures uses fast single IO at 20.8 MHz when the CPU clock is at 20.8MHz
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* and 62.5MHz when the CPU clock is configured at 125MHz
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*/
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void flash_init(unsigned char enable_dio)
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void flash_init(uint8_t enable_dio)
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{
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if (enable_dio) {
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// Configure fast DIO via divider/DIO/SIOconfig = 4 and read-cmd being 0xbb (for mmio)
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@@ -271,7 +271,7 @@ void flash_block_erase(uint32_t addr)
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void flash_write_bytes(uint32_t addr, __xdata uint8_t *ptr, uint8_t len)
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{
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unsigned char exit_loop = 0;
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uint8_t exit_loop = 0;
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while(1) {
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flash_write_enable();
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+1
-1
@@ -3,7 +3,7 @@
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#include <stdint.h>
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uint8_t flash_read_status(void);
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void flash_init(unsigned char enable_dio);
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void flash_init(uint8_t enable_dio);
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void flash_read_uid(void);
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void flash_write_enable(void);
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void flash_dump(uint32_t addr, uint8_t len);
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+4
-3
@@ -20,10 +20,11 @@
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/*
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* 5 Bits each give the state of the 2 SerDes of the RTL8372
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* Values are:
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* 0x1A: 10GBit USXGMII?
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* 0x5: 2.5GBit: HISGMII ???
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* 0x4: 1GBit: SGMII
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*/
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#define SDS_SGMII 0x02
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#define SDS_1000BX_FIBER 0x04
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#define SDS_HISGMII 0x12
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#define SDS_10GR 0x1a
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#define RTL837X_REG_LINKS 0x63f0
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/* Each nibble encodes the link state of a port.
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+2
-2
@@ -2,7 +2,7 @@
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#define _RTL837X_STDIO_H_
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void print_string(__code char *p);
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void print_short(unsigned short a);
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void print_byte(unsigned char a);
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void print_short(uint16_t a);
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void print_byte(uint8_t a);
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#endif
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