diff --git a/rtl837x_flash.c b/rtl837x_flash.c index 3f429b3..59d9de6 100644 --- a/rtl837x_flash.c +++ b/rtl837x_flash.c @@ -7,7 +7,7 @@ #include "rtl837x_stdio.h" #include "rtl837x_sfr.h" -__xdata unsigned char dio_enabled; +__xdata uint8_t dio_enabled; /* @@ -36,7 +36,7 @@ void flash_configure_mmio(void) * This configures uses fast single IO at 20.8 MHz when the CPU clock is at 20.8MHz * and 62.5MHz when the CPU clock is configured at 125MHz */ -void flash_init(unsigned char enable_dio) +void flash_init(uint8_t enable_dio) { if (enable_dio) { // Configure fast DIO via divider/DIO/SIOconfig = 4 and read-cmd being 0xbb (for mmio) @@ -271,7 +271,7 @@ void flash_block_erase(uint32_t addr) void flash_write_bytes(uint32_t addr, __xdata uint8_t *ptr, uint8_t len) { - unsigned char exit_loop = 0; + uint8_t exit_loop = 0; while(1) { flash_write_enable(); diff --git a/rtl837x_flash.h b/rtl837x_flash.h index 8e20c22..1b4d867 100644 --- a/rtl837x_flash.h +++ b/rtl837x_flash.h @@ -3,7 +3,7 @@ #include uint8_t flash_read_status(void); -void flash_init(unsigned char enable_dio); +void flash_init(uint8_t enable_dio); void flash_read_uid(void); void flash_write_enable(void); void flash_dump(uint32_t addr, uint8_t len); diff --git a/rtl837x_regs.h b/rtl837x_regs.h index 8d98a58..8f66391 100644 --- a/rtl837x_regs.h +++ b/rtl837x_regs.h @@ -20,10 +20,11 @@ /* * 5 Bits each give the state of the 2 SerDes of the RTL8372 * Values are: - * 0x1A: 10GBit USXGMII? - * 0x5: 2.5GBit: HISGMII ??? - * 0x4: 1GBit: SGMII */ +#define SDS_SGMII 0x02 +#define SDS_1000BX_FIBER 0x04 +#define SDS_HISGMII 0x12 +#define SDS_10GR 0x1a #define RTL837X_REG_LINKS 0x63f0 /* Each nibble encodes the link state of a port. diff --git a/rtl837x_stdio.h b/rtl837x_stdio.h index 0f25c77..708dcd4 100644 --- a/rtl837x_stdio.h +++ b/rtl837x_stdio.h @@ -2,7 +2,7 @@ #define _RTL837X_STDIO_H_ void print_string(__code char *p); -void print_short(unsigned short a); -void print_byte(unsigned char a); +void print_short(uint16_t a); +void print_byte(uint8_t a); #endif