Merge branch 'logicog:main' into bugfix/sidebar-scrolling

.gitignore

@@ -7,6 +7,7 @@ version.h
 tools/httpd_sim
 tools/injector
 tools/fileadder
+build/
 
 # host-test stand-ins for the two generated headers
 !test/stub/html_data.h

CHANGELOG.md

@@ -4,6 +4,17 @@
 
 ## Added
 
+- Devices
+  - Support the hongyavision HYWS-SGT0204S (PCB marking `2G5F4_10G2_V1.01`), an
+    RTL8372 based 4x2.5G + 2xSFP+ unmanaged switch with a 512 KB Bright Moon
+    `T25S40` flash. It is a sibling of the KP-9000-6XH-X2 (2M-PCB43-V1.1) with
+    the two SFP+ cages wired the other way round (physical 5 is on SDS1,
+    physical 6 on SDS0), no reset button fitted, wrong silkscreen labels on the
+    serial header, `LED_GLB_IO_EN` bit 6 has to be set for the port LEDs to
+    work, and the fitted T25S40 cannot be read in DIO mode on this board, so the
+    target selects single-IO flash reads (`flash_sio`). New machine target
+    `MACHINE_2G5F4_10G2_V1_01`, see `doc/devices/2G5F4_10G2_V1.01.md`.
+
 - Web UI
   - Compress the embedded assets (minify + gzip) and switch to a single-page layout. #315
   - Replace the multi-page UI with a themed single-page app: light, dark and Selenized themes following the browser by default,

Makefile

@@ -103,6 +103,7 @@ SRCS += \
 	rtl837x_flash.c \
 	rtl837x_igmp.c \
 	rtl837x_init.c \
+	rtl837x_nic.c \
 	rtl837x_leds.c \
 	rtl837x_leds_dump.c \
 	rtl837x_phy.c \

boot.c

@@ -125,18 +125,6 @@ void early_boot_handle_button(void) __banked
 void sds_config(uint8_t sds, uint8_t mode) __banked
 {
 	print_string("sds_config sds: "); print_byte(sds); print_string(", mode: "); print_byte(mode); write_char('\n');
-	sds_config_mac(sds, mode);
-
-	if (mode == SDS_10GR || mode == SDS_QXGMII)
-		sds_write_v(sds, 0x21, 0x10, 0x4480); // Q002110:6480
-	else
-		sds_write_v(sds, 0x21, 0x10, 0x6480); // Q002110:6480
-	sds_write_v(sds, 0x21, 0x13, 0x0400); // Q002113:0400
-	sds_write_v(sds, 0x21, 0x18, 0x6d02); // Q002118:6d02
-	sds_write_v(sds, 0x21, 0x1b, 0x424e); // Q00211b:424e
-	sds_write_v(sds, 0x21, 0x1d, 0x0002); // Q00211d:0002
-	sds_write_v(sds, 0x36, 0x1c, 0x1390); // Q00361c:1390
-	sds_write_v(sds, 0x36, 0x14, 0x003f); // Q003614:003f
 
 	uint8_t page = 0;
 	uint16_t v = 0;
@@ -165,6 +153,21 @@ void sds_config(uint8_t sds, uint8_t mode) __banked
 		print_string("Error in SDS Mode\n");
 		return;
 	}
+
+	sds_config_mac(sds, mode);
+
+	if (mode == SDS_10GR || mode == SDS_QXGMII)
+		sds_write_v(sds, 0x21, 0x10, 0x4480); // Q002110:6480
+	else
+		sds_write_v(sds, 0x21, 0x10, 0x6480); // Q002110:6480
+
+	sds_write_v(sds, 0x21, 0x13, 0x0400); // Q002113:0400
+	sds_write_v(sds, 0x21, 0x18, 0x6d02); // Q002118:6d02
+	sds_write_v(sds, 0x21, 0x1b, 0x424e); // Q00211b:424e
+	sds_write_v(sds, 0x21, 0x1d, 0x0002); // Q00211d:0002
+	sds_write_v(sds, 0x36, 0x1c, 0x1390); // Q00361c:1390
+	sds_write_v(sds, 0x36, 0x14, 0x003f); // Q003614:003f
+
 	sds_write_v(sds, 0x36, 0x10, v); // Q003610:0200
 
 	if (page == 0x2e) {  // 10G Fiber / SDS_QXGMII
@@ -257,7 +260,7 @@ void nic_setup(void) __banked
 
 	// This sets the size of the RX buffer, the filling level is in 0x7874
 	// R7848-000004ff
-	REG_SET(RTL837X_REG_NIC_RXBUFF_RX, 0x4ff);
+	REG_SET(RTL837X_REG_NIC_RXBUFF_RX, RTL837X_NIC_RX_LAST_SLOT);
 
 	// R7844-000007fe
 	REG_SET(RTL837X_REG_NIC_BUFFSIZE_TX, 0x7fe);

doc/CpuPort.md

@@ -34,6 +34,21 @@ Next, transfer the actual packet over by repeating the SFR function with a
 pointer to the frame on the ASIC directly after the frame header and a
 length as given by the length in the frame header + 7, again divided by 8.
 
+The RX ring's inclusive last slot is configured as `0x4ff`, giving a byte
+range of `0x0000` through `0x27ff`. If the descriptor occupies the last slot
+at `0x27f8`, its payload starts at `0x0000`, not `0x2800`. The RX copy code
+normalizes that starting address before DMA. It relies on the hardware to
+wrap transfers that start inside the ring and cross its end, as observed
+on SWTGW218AS. Programming an initial address of `0x2800` does not wrap
+and can instead read zeros or stale TX data outside the RX ring.
+
+Frame lengths are checked against `UIP_CONF_BUFFER_SIZE` before copying.
+DMA works in whole eight-byte units. `UIP_CONF_BUFFER_ALLOC_SIZE` rounds
+the backing storage up to the next complete word: 1,560 bytes for the
+1,556-byte logical frame limit. This padding allows a maximum-size frame
+to be transferred directly without a separate tail copy. The logical
+frame limit and advertised MSS are unchanged.
+
 The received frame will have an RTL proprietary Ethernet frame type of
 0x8899 (RRPC) where normally the frame type 0x0800 for IPv4 would be located.
 Further 6 bytes follow describing the frame, before the normal IPv4 data

doc/adding-a-device.md

@@ -1,6 +1,6 @@
 # Adding a new device
 
-A device is supported by adding one board definition `.h` and board configuration `.c` file
+A device is supported by adding one board header `.h` and board definition `.c` file
 under `machine/`. 
 the build selects the definition by name, and CI compiles every file it finds.
 
@@ -14,27 +14,34 @@ make MACHINE=<NAME>
 | File | Purpose |
 |------|---------|
 | `machine/<NAME>.c` | the `struct machine machine` board definition |
-| `machine/<NAME>.h` | `MACHINE_MODEL`, the model string shown in the UI and the CLI |
+| `machine/<NAME>.h` | `MACHINE_MODEL` (the model string shown in the UI and the CLI) and `MACHINE_CHIPSET` (`RTL8372` or `RTL8373`) |
 | `doc/devices/<name>.md` + `doc/supported_devices.md` | (only if the board is verified and you want to support it publicly) user-facing documentation |
 
 `<NAME>` is the machine symbol without its `MACHINE_` prefix, so `MACHINE` is
 passed exactly as spelled on the command line: `make MACHINE=MY_BOARD_1_0`
 needs `machine/MY_BOARD_1_0.c` and `machine/MY_BOARD_1_0.h`.
 
-## Step 1: the model header
+## Step 1: the board header
 
-`machine/<NAME>.h` only carries the product string. Use the existing files as
-the template:
+`machine/<NAME>.h` carries the product string and the SoC family. Use the
+existing files as the template:
 
 ```c
 #ifndef _MACHINE_MY_BOARD_1_0_H_
 #define _MACHINE_MY_BOARD_1_0_H_
 
 #define MACHINE_MODEL "Brand Model V1.0"
+#define MACHINE_CHIPSET RTL8373
 
 #endif
 ```
 
+`MACHINE_CHIPSET` is `RTL8373` or `RTL8372`; a build without it will fail. It selects the default
+logical port range: `min_port` is `0` for RTL8373 and `3` for RTL8372, while `max_port` is `8`,
+the highest logical port index. A board with a different range defines
+`MACHINE_MIN_PORT` and/or `MACHINE_MAX_PORT` in its header to override the
+defaults.
+
 The device product string is what the CLI or the Web-Interface will print to identify the device; `machine.h` includes it by name.
 
 > [!NOTE]
@@ -55,10 +62,7 @@ ports and the same number of SFP+ cages.
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
@@ -89,13 +93,16 @@ __code const struct machine machine = {
 };
 ```
 
+`MACHINE_COMMON_SETTING` (from `machine_defs.h`) initializes `machine_name`,
+`isRTL8373`, `min_port` and `max_port` from the header's `MACHINE_MODEL` and
+`MACHINE_CHIPSET`. Keep it as the first initializer and list the
+board-specific fields after it.
+
 ### Fields
 
 | Field | Meaning |
 |-------|---------|
-| `machine_name` | always `MACHINE_MODEL` |
-| `isRTL8373` | `1` for an RTL8373 SoC, `0` for RTL8372 |
-| `min_port` / `max_port` | range of logical port numbers the device has; `min_port` is `0` for RTL8373 boards and `3` for RTL8372 boards (logical ports 1–2 are the SoC's internal ports on the 8372), `max_port` is usually 8. |
+| `MACHINE_COMMON_SETTING` | expands to `machine_name` (`MACHINE_MODEL`), `isRTL8373` (`1` for `RTL8373`, `0` for `RTL8372`), `min_port` and `max_port`; all are derived from the header's `MACHINE_CHIPSET` (see Step 1) |
 | `n_sfp` | number of SFP+ cages |
 | `n_10g` | SerDes 10G capability used by the RTL837xN init: `0` none, `1` one, `2` two 10G-capable SerDes |
 | `log_to_phys_port[9]` | logical port (0-based index) → physical front-panel port number |
@@ -130,8 +137,10 @@ apart:
 ln -s KP_9000_6XHML_X2.c machine/MY_BOARD_1_0.c
 ```
 
-The new board still needs `machine/MY_BOARD_1_0.h` (pick the version number on the PCB) with its own
-`MACHINE_MODEL`, because `MACHINE_MODEL` is what distinguishes the products.
+The new board still needs `machine/MY_BOARD_1_0.h` (pick the version number on
+the PCB) with its own `MACHINE_MODEL` and `MACHINE_CHIPSET`: `MACHINE_MODEL` is
+what distinguishes the products, and `MACHINE_CHIPSET` must match the SoC of
+the board definition being reused.
 Existing examples: `machine/PCB_K0402WS_V3.c`, `machine/KP_9000_9XHML_X_V3_2.c`
 and the six `KP_9000_*` revision variants.
 
@@ -177,3 +186,20 @@ Once the board has been tested on hardware:
    `doc/devices/KP-9000-6XH-X2.md` and document which `MACHINE` to pick for
    which silkscreen.
 
+### Identifying the CPU variant
+
+For RTL8373-based devices, use the read-only console command below to distinguish
+the N and non-N CPU variants:
+
+```text
+regget 4
+```
+
+| Register 0x0004 value | CPU |
+|---|---|
+| `0x83730000` | RTL8373 (non-N) |
+| `0x83737000` | RTL8373N |
+
+Record the identified CPU in the device documentation. These values identify
+only the CPU variant; document PHY and flash-chip models separately when verified.
+

doc/devices/2G5F4_10G2_V1.01.md

@@ -0,0 +1,178 @@
+hongyavision HYWS-SGT0204S
+
+RTL8372-based 4×2.5G + 2×SFP+ unmanaged switch.
+
+Also marked on the PCB as `2G5F4_10G2_V1.01`.
+
+Stock firmware runs a factory test console on UART at 9600 baud 8N1 (banner
+`RTL8371B start`, prompt `RTL8371B:`). There is no management CLI and no Web
+interface.
+
+Using SPI clamp in-board is the only method for initial installation and update.
+Erase the whole chip and verify the write (`flashrom -v`) before powering the
+board, so an incomplete write is caught before the board is powered up.
+
+Stock flash chip is 512 KB (Bright Moon `T25S40`, 4 Mbit, SOP-8), which the
+RTLPlayground image fills exactly.
+
+### Label specifications
+
+Case, top / front / nameplate:
+
+<img src="photos/2G5F4_10G2_V1.01/assembled-top.jpg" width="300" />
+<img src="photos/2G5F4_10G2_V1.01/assembled-front.jpg" width="300" />
+<img src="photos/2G5F4_10G2_V1.01/assembled-bottom.jpg" width="300" />
+
+- **Manufacturer**: hongyavision (Shenzhen Hongyavision Electronic Technology
+  Co., Ltd.)
+- **Model**: HYWS-SGT0204S — the nameplate is printed in Chinese and reads
+  "10/100/1000/2500M fibre switch" and "4x 2.5G copper port + 2x 10G SFP+
+  optical port"
+- **Ports**:
+  - 4 × RJ45: 10/100/1000/2500 Mbps
+  - 2 × SFP+: 1G / 2.5G / 10G
+- **Power**: 12 V DC, 2 A
+- **Serial number**: `S/N-YYYYMMDDNNNN`, e.g. `S/N-202312010028`
+
+The top of the case only carries generic printing ("2.5G+10G High Speed Fiber
+Transceiver / 4-Port 2.5G Ethernet Switch+10G Fiber"), so the nameplate on the
+bottom is what identifies the device.
+
+### What works
+
+- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
+- Both SFP+ ports supporting 1G, 2.5G and 10G modules
+- Copper LEDs: white (2.5G) and blue (link/activity)
+- SFP LEDs: one single LED per port (link/activity)
+- SFP EEPROM and DDM readable on both cages, verified with a 10G module
+  (`Rate: 0x67`, module identity and DDM values via the `sfp` console command)
+- Serial console at 115200 8N1 (RTLPlayground) / 9600 8N1 (stock)
+
+### Not verified
+
+- The reset button footprint is unpopulated and the case has no opening for it,
+  so it could not be tested.
+
+### PCB overview
+
+**Board markings**
+- Top silkscreen: `2G5F4_10G2_V1.01`
+
+**Key components**
+- Main switch: RTL8372 (RTL8371B family), reported as `RTL8372` (non-N) by
+  RTLPlayground. The chip sits under a heatsink and its package marking is not
+  readable.
+- U1: SPI NOR flash, Bright Moon `T25S40`, 4 Mbit / 512 KB, SOP-8
+- A 3-hole reset button footprint is present but unpopulated, and the case has
+  no opening for it, so there is no usable reset button
+
+Top side:
+
+<img src="photos/2G5F4_10G2_V1.01/pcb_top.jpg" width="600" />
+
+Bottom:
+
+<img src="photos/2G5F4_10G2_V1.01/pcb_bottom.jpg" width="600" />
+
+The stock flash chip, Bright Moon `T25S40` (SOP-8, 4 Mbit / 512 KB):
+
+<img src="photos/2G5F4_10G2_V1.01/flash_t25s40.jpg" width="300" />
+
+### Port layout
+
+| Front panel position | Logical port | Physical port | Type    |
+|----------------------|--------------|---------------|---------|
+| SFP left             | 8            | 5             | SFP+    |
+| RJ45 1               | 4            | 1             | Copper  |
+| RJ45 2               | 5            | 2             | Copper  |
+| RJ45 3               | 6            | 3             | Copper  |
+| RJ45 4               | 7            | 4             | Copper  |
+| SFP right            | 3            | 6             | SFP+    |
+
+Copper ports 1–4 match the KP-9000-6XH-X2 (2M-PCB43-V1.1) layout, which this
+board is a sibling of. The two SFP+ cages are wired the other way round
+compared to that board: physical port 5 is on SDS1 and physical port 6 is on
+SDS0.
+
+### Serial console
+
+The board has three through-holes used as the serial console, next to the
+heatsink in the middle of the board and visible in the top side photo above (the
+silkscreen labels are printed rotated by 90°). **The silkscreen labels are
+wrong**: they are shifted relative to the actual signals.
+
+| Silkscreen label | Actual signal |
+|------------------|---------------|
+| TX               | GND           |
+| RX               | TX            |
+| GND              | RX            |
+
+Wiring (following the measured signals, not the labels):
+
+| USB-TTL adapter | Board pad            |
+|-----------------|----------------------|
+| GND             | pad labelled `TX`    |
+| RX              | pad labelled `RX`    |
+| TX              | pad labelled `GND`   |
+
+- **Settings**: 115200 baud / 8N1 / 3.3V TTL (RTLPlayground), 9600 baud for the
+  stock firmware
+- The stock firmware only prints a few bytes and a factory test menu
+  (`?`, `rst`, `f`, `r`, `10`, `100`, `g1`, `sd`, `eye`, …); it is not an
+  interactive management console
+
+### LED configuration
+
+Case silkscreen, below the RJ45 ports:
+
+```
+White : 2.5G    Blue : 1000M/2500M L/A
+```
+
+The front panel also carries a `PWR` LED and one LED per SFP cage (`SFP1`,
+`SFP2`) on the right hand side.
+
+| Port       | LED          | Linked, idle | With traffic |
+|------------|--------------|--------------|--------------|
+| Copper     | white        | 2.5G only    | same         |
+| Copper     | blue         | solid        | blinks (L/A) |
+| SFP        | single LED   | solid        | blinks (L/A) |
+
+Measured LED-ID mapping (from the RTL837x LED set registers):
+
+| LED-ID | Function                        |
+|--------|---------------------------------|
+| LED-ID0| copper blue LED                 |
+| LED-ID1| copper white LED                |
+| LED-ID2| SFP single LED                  |
+
+**Important**: `RTL837X_REG_LED_GLB_IO_EN` bit 6 must be set in
+`machine_custom_init()`. Without it the RTL837x "solid" conditions (LINK/speed)
+do not drive the LEDs at all and only `ACT` does, which makes the white LED
+glow faintly at non-2.5G speeds.
+
+### SFP GPIO assignments
+
+| SFP               | pin\_detect (ModAbs)          | pin\_los         | SerDes | I2C SDA                 | I2C SCL                  |
+|-------------------|-------------------------------|------------------|--------|-------------------------|--------------------------|
+| Left (logical 8, physical 5) | GPIO30\_ACL\_BIT3\_EN | GPIO37   | SDS1   | GPIO39\_I2C\_SDA4       | GPIO40\_I2C\_SCL3\_MDC1  |
+| Right (logical 3, physical 6)| GPIO50\_I2C\_SCL2\_UART1\_TX | GPIO10\_LED10 | SDS0 | GPIO41\_I2C\_SDA3\_MDIO1 | GPIO40\_I2C\_SCL3\_MDC1 |
+
+`pin_tx_disable` is GPIO\_NA on both ports. Both I2C buses are confirmed
+working: with the same 10G module inserted, the `sfp` console command reads its
+vendor and model from the left cage (`Slot 1`) and from the right cage
+(`Slot 2`), DDM values included. The insertion also shows which SerDes drives
+each cage - the left cage reports `sds_config sds: 01` and the right cage
+`sds: 00`, which matches the table above.
+
+### Machine target
+
+Build for this device with `make MACHINE=2G5F4_10G2_V1_01`, which selects the
+`machine/2G5F4_10G2_V1_01.c` board definition. It is derived from
+`machine/KP_9000_6XHML_X2.c` with the SFP cage order and the reset pin changed.
+The fitted T25S40 cannot be read in DIO mode on this board: an image that leaves
+DIO enabled does not come up at all, both at the default read clock divider of 4
+and at 8 (two boards tested), while the same image with single-IO boots and runs
+normally. The board definition therefore sets `flash_sio`, which makes
+`flash_init()` use `CMD_FREAD` at divider 8. Only the management plane is
+slower, the ASIC keeps forwarding in hardware.

doc/devices/Hasivo-S1100P-8GT-1SX-S.md

@@ -0,0 +1,41 @@
+# Hasivo S1100P-8GT-1SX-S
+
+RTL8373N switch with 8 × 2.5G RJ45 ports and 1 × SFP port. GD25Q16 2 MiB flash.
+
+## Port mapping
+
+| Front port | ASIC MAC | Interface |
+| --- | --- | --- |
+| 1–8 | 0–7 | RJ45 |
+| 9 | 8 | SFP (SDS1) |
+
+## Board signals
+
+| Function | GPIO |
+| --- | --- |
+| SFP detect | 38 |
+| SFP LOS | 37 |
+| SFP TX disable | Not connected (`GPIO_NA`) |
+| SFP I2C SDA / SCL | 39 / 40 |
+| Reset | 54 |
+
+PoE is managed by an RTL8238B and a separate STC8H8K64U controller, not directly by the RTL8373N. RTLPlayground does not control PoE on this board.
+
+## Build
+
+`make MACHINE=HASIVO_S1100P_8GT_1SX_S CI=1`
+
+## Photos
+
+Front panel:
+
+![Front panel](photos/Hasivo-S1100P-8GT-1SX-S/front.jpg)
+
+PCB top:
+
+![PCB top](photos/Hasivo-S1100P-8GT-1SX-S/pcb_top.jpg)
+
+PCB bottom:
+
+![PCB bottom](photos/Hasivo-S1100P-8GT-1SX-S/pcb_bottom.jpg)
+

doc/devices/SIRIVISION_S25G2206FP_V1_1.md

@@ -0,0 +1,32 @@
+### SIRIVISION_S25G2206FP_V1_1
+
+## Brands
+|Brand|Type|Managed|PCB|Flash|Chip RTL|
+|---|---|---|---|---|---|
+| YuanLey | YS25-0402M | Yes | SIRIVISION_S25G2206FP_V1_1 | 2M | 8372 |
+
+### Label specifications
+
+- **Name**:
+- **Ports**:
+  - 4 × RJ45: 10/100/1000/2500 Mbps
+  - 2 × SFP+: 1000 / 2500 / 10000 Mbps
+- **Power**: 12V DC, 1A  5525 connector
+
+### What works
+The device is fully supported:
+- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps
+- ALL SFP+ ports support 1G, 2.5G and 10G modules
+- LEDs work with the same indiciations as the OEM firmware
+### PCB overview
+
+**Board markings**
+- Top silkscreen: SIRIVISION S25G2206FP V1.1
+
+Top side
+
+<img src="photos/SIRIVISION_S25G2206FP_V1_1/dev_pcb_top.jpg" width="300" />
+
+## Power supply
+
+Input power is delivered via barell plug, `12V 1A` adapter was provided.

doc/devices/SWTG018AS_A_V2_0.md

@@ -5,6 +5,7 @@
 | Ampcom  | SWTG018AS-A V2.0 | No    | SWTG018AS-A V2.0 | 2MB             | 8273N + 8224N |
 | Horaco  | HC-SWTGW218AS-A  | Yes   | SWTG018AS-A V2.0 | 2MB(25Q16JVSIQ) | 8273N + 8224N |
 | GoodTop | GT-ST018M        | Yes   | SWTG018AS-A V2.0 | 2MB             | 8273N + 8224N |
+| MokerLink | 2G08110GSN     | No    | SWTG018AS-A V2.0 | 512KB(25Q40)    | 8273N + 8224N |
 
 
 The following is a documentation for the unmanaged switch marked as `SWTG018AS-A V2.0`.

doc/devices/SWTG024AS-A-V2.0.1_4C_2SFP.md

@@ -2,10 +2,11 @@
 It is highly similar to SWTG024AS-V2.0, with the only difference being the GPIO configuration for the SFP port.
 
 ## Brands
-|Brand|Type|Managed|PCB|Flash|Chip RTL|
-|---|---|---|---|---|---|
-| Horaco | ZX-SG4T2 |  | PCB-SWTG024AS-A-V2.0.1_19650 | P25D40SH | ??? |
-| GoodTop | GT-ST024M | Yes | PCB-SWTG024AS-A-V2.0.1 | 2M | ??? |
+|Brand    |Type          |Managed|PCB                           |Flash           |Chip RTL|
+|---------|--------------|-------|------------------------------|----------------|--------|
+| Horaco  | ZX-SG4T2     | No    | PCB-SWTG024AS-A-V2.0.1_19650 | 512K (P25D40SH)| 8372N  |
+| Horaco  | HC-SWTG124AS | Yes   | PCB-SWTG024AS-A-V2.0.1       | 2M   (W25Q16JV)| 8372N  |
+| GoodTop | GT-ST024M    | Yes   | PCB-SWTG024AS-A-V2.0.1       | 2M             | 8372N  |
 
 ### Label specifications
 

doc/devices/SWTG024AS-V2.0.md

@@ -46,4 +46,4 @@ Note,`R52`、`R53`may not be installed.You need to bridge them using either sold
 
 ## Power supply
 
-Input power is delivered via barell plug, `12V 1A` adapter was provided.
+Input power is delivered via barell plug, `12V 1A` adapter was provided.

doc/devices/SWTGW218AS.md

@@ -5,9 +5,15 @@
 |---|---|---|---|---|---|
 | Mokerlink | ZX-SWTGW218AS | Yes|  SWTG118AS-V2.0-16029 | 2MB (FM25Q16A)| 8273N + 8224N |
 | Sodola | | | | | |
-| Horaco | | | | | |
+| Horaco | HC-SWTGW218AS | Yes | SWTG118AS-V2.1 | 2MB | 8373 (non-N) |
 | XikeStor | SKS3200-8E1X | Yes | SWTG118AS-V2.1-17462 | 2MB (25Q16JVSIQ) | |
 
+All boards in this table use `MACHINE=SWTGW218AS`. The Horaco HC-SWTGW218AS is also sold with the
+[SWTG018AS-A V2.0](SWTG018AS_A_V2_0.md) board, which needs a different firmware. Check the marking
+on the PCB before flashing.
+
+The PHY and flash-chip models for the tested Horaco units remain unverified.
+
 
 ## Photos
 

doc/supported_devices.md

@@ -15,9 +15,12 @@ The following devices have been tested and are fully working:
 | Hisource | Hi-K0402WS      | No      | [PCB-K0402WS-V2.0](devices/PCB-K0402WS-V2.0.md)                           | 2M    | 4 + 2 |
 | Hisource | Hi-K0402WS      | No      | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md)                           |       | 4 + 2 |
 | Hisource | Hi-K0801WS      | No      | [PCB-KO801W-V2.0](devices/HI-K0801WS.md)                                  |       | 8 + 1 |
+| hongyavision | HYWS-SGT0204S | No    | [2G5F4_10G2_V1.01](devices/2G5F4_10G2_V1.01.md)                           | 0.5M  | 4 + 2 |
 | hongyavision | LG-SG5T1    | No      | [PCB-SWTG024AS-V2.0_16895](devices/SWTG024AS-V2.0.md)                     | 0.5M  | 5 + 1 |
+| Horaco   | HC-SWTG124AS    | Yes     | [SWTG024AS-A-V2.0.1](devices/SWTG024AS-A-V2.0.1_4C_2SFP.md)               | 2M    | 4 + 2 |
 | Horaco   | HC-SWTGW215AS   | Yes     | [SWTG024AS-A-V2.0.1_19650 5C 1SFP](devices/SWTG024AS-A-V2.0.1_5C_1SFP.md) | ?     | 5 + 1 |
 | Horaco   | HC-SWTGW218AS   | Yes     | [SWTG018AS-A V2.0](devices/SWTG018AS_A_V2_0.md)                           |       | 8 + 1 |
+| Horaco   | HC-SWTGW218AS   | Yes     | [SWTG118AS-V2.1](devices/SWTGW218AS.md)                                   | 2M    | 8 + 1 |
 | Horaco   | ZX310S-4T2XH    | Yes     | [PCB-SL310S-4T1T1X-V1.0.1-24107](devices/ZX310S-4T2XH.md)                 | 2M    | 5 + 1 |
 | Horaco   | ZX310S-4T2XT    | Yes     | [PCB-SL310S-4T2XT-V1.0.0-22273](devices/ZX310S-4T2XT.md)                  | 2M    | 6     |
 | Horaco   | ZX-SG4T2        | No      | [SWTG024AS-A-V2.0.1_19650_4C_2SFP](devices/SWTG024AS-A-V2.0.1_4C_2SFP.md) | 0.5M  | 4 + 2 |
@@ -32,6 +35,7 @@ The following devices have been tested and are fully working:
 | MokerLink| 2G040210GSM     | Yes     | [2M-PCB43-V1.1](devices/2M-PCB43-V1.1.md)                                 |       | 4 + 2 |
 | MokerLink| POE-2G080110GS  | No      | [2M-PCB51-ML-V1.1](devices/2M-PCB51-ML-V1_1.md)                           | 4M    | 8 + 1 |
 | MokerLink| ZX-SWTGW218AS   | Yes     | [SWTG118AS-V2.0-16029](devices/SWTGW218AS.md)                             | 2M    | 8 + 1 |
+| MokerLink| 2G08110GSN      | No      | [SWTG018AS-A V2.0](devices/SWTG018AS_A_V2_0.md)                           | 0.5M  | 8 + 1 |
 | Netcore  | GS9             | No      | [PB-2132](devices/PB-2132.md)                                             | 4M    | 8 + 1 |
 | ONT      | ONT-S207CW-62TS-SE | No   | [PCB-SWTG024AS-A-2.0.1](devices/ONT-S207CW-62TS-SE.md)                    | 0.5M  | 4 + 2 |
 | Ruiying  | RY-4GT-2SX      | No      | [FG-4GT-2SX_V2.0](devices/FG-4GT-2SX_V2.0.md)                             | 4M    | 4 + 2 |
@@ -44,6 +48,7 @@ The following devices have been tested and are fully working:
 | XikeStor | SKS3200-8E1X    | Yes     | [SWTG118AS-V2.1-17462](devices/SWTGW218AS.md)                             | 2M    | 8 + 1 |
 | YuanLey  | YS25-0402       | No      | [PCB-K0402WS-V1.0](devices/PCB-K0402WS-V1.0.md)                           | 2M    | 4 + 2 |
 | YuanLey  | YS25-0402       | No      | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md)                           | 2M    | 4 + 2 |
+| YuanLey | YS25-0402M       | Yes     | [SIRIVISION_S25G2206FP_V1_1](devices/SIRIVISION_S25G2206FP_V1_1.md)       | 2M    | 4 + 2 |
 | Ztyuav   | Z-QWYT0402      | No      | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md)                           |       | 4 + 2 |
 
 For KP-9000-6XH-X2 / KP-9000-6XHML-X2 / Mokerlink 2G040210GSM devices, select

httpd/httpd.c

@@ -55,8 +55,8 @@ __xdata uint8_t boundary[72];
 #define CONFIG_UPLOAD_BUF (CONFIG_LEN + 384)
 __xdata uint8_t config_upload;
 __xdata uint8_t config_buf[CONFIG_UPLOAD_BUF];
-// bytes buffered in config_buf so far (config body, or a firmware part
-// header); accumulates across TCP segments
+// bytes buffered in config_buf so far (HTTP header, POST body, or a firmware
+// part header); accumulates across TCP segments
 __xdata uint16_t pre_acc;
 __xdata uint8_t * __xdata content_type = 0;
 __xdata uint8_t * __xdata session = 0;
@@ -75,9 +75,6 @@ __xdata uint8_t postbody_endpoint;
 __xdata uint16_t postbody_start;
 
 __xdata char passwd[21];
-// Set when a verified firmware upload awaits its response ACK, after
-// which the chip resets to apply the staged image
-__xdata uint8_t fw_reset_pending;
 __xdata char session_id[SESSION_ID_LENGTH + 1];
 __xdata uint8_t authenticated;
 __xdata uint32_t now;
@@ -90,6 +87,7 @@ __xdata uint32_t last_session_use;
 #define TSTATE_POST 		4
 #define TSTATE_MULTIPART	5
 #define TSTATE_POSTBODY		6
+#define TSTATE_HEADER		7
 
 extern __xdata uint16_t crc_value;
 __xdata uint16_t crc_final;
@@ -109,8 +107,8 @@ void httpd_init(void) __banked
 	uip_listen(HTONS(80));
 	// Not through uip_conn: it only points at a connection while uIP is
 	// handling one, and nothing has set it yet at init time.
-	uip_conns[0].appstate.tstate = TSTATE_CLOSED;
-	fw_reset_pending = 0; // xdata is not zeroed by the startup code
+	for (uint8_t i = 0; i < UIP_CONNS; i++)
+		uip_conns[i].appstate.tstate = TSTATE_CLOSED;
 }
 
 
@@ -511,7 +509,7 @@ uint8_t stream_upload(void)
 						"Content-Type: text/plain\r\n\r\n"
 						"OK: checksum verified, rebooting\n");
 					// Reset once the response is fully ACKed
-					fw_reset_pending = 1;
+					s->fw_reset_pending = 1;
 				} else {
 					print_string("Checksum incorrect! Aborting.\n");
 					slen = strtox(outbuf, "HTTP/1.1 400 Bad Request\r\nContent-Length: 33\r\n"
@@ -746,7 +744,42 @@ static void post_body_continue(void)
 }
 
 
-void handle_post(void)
+
+/*
+ * Buffer an HTTP request header across TCP receive events. Stop copying at
+ * CRLFCRLF so any body bytes in the final segment stay in uip_appdata.
+ *
+ * Return the body offset in the current receive buffer, 0 while incomplete,
+ * or 0xffff after sending an error response.
+ */
+static uint16_t request_header_take(void)
+{
+	uint16_t i;
+
+	for (i = 0; i < uip_len; i++) {
+		if (pre_acc + 1 >= CONFIG_UPLOAD_BUF) {
+			uip_conn->appstate.tstate = TSTATE_NONE;
+			send_bad_request();
+			return 0xffff;
+		}
+		config_buf[pre_acc++] = ((__xdata uint8_t *)uip_appdata)[i];
+		config_buf[pre_acc] = NUL;
+		if (pre_acc >= 4
+		    && config_buf[pre_acc - 4] == '\r'
+		    && config_buf[pre_acc - 3] == '\n'
+		    && config_buf[pre_acc - 2] == '\r'
+		    && config_buf[pre_acc - 1] == '\n') {
+			uip_conn->appstate.tstate = TSTATE_NONE;
+			return i + 1;
+		}
+	}
+
+	postbody_start = ticks;
+	uip_conn->appstate.tstate = TSTATE_HEADER;
+	return 0;
+}
+
+void handle_post(uint16_t body_off)
 {
 	__xdata struct httpd_state * __xdata s = &(uip_conn->appstate);
 	__xdata uint8_t *p = uip_appdata;
@@ -759,6 +792,9 @@ void handle_post(void)
 
 	// Was the multipart header sent in multiple packets?
 	if (s->tstate != TSTATE_MULTIPART) {
+		p = config_buf;
+		request_path = p + 6;
+
 		dbg_string("Is POST\n");
 		p += 5;  // Skip post
 		// Find end of request path
@@ -772,9 +808,12 @@ void handle_post(void)
 		dbg_string("Boundary: >"); dbg_string_x(boundary); dbg_string("<\n");
 		if (!*p || !content_type) {
 			dbg_string("Bad Request!\n");
-			send_not_found();
+			send_bad_request();
 			return;
 		}
+
+		pre_acc = 0;
+		p = (__xdata uint8_t *)uip_appdata + body_off;
 		if (is_word(request_path, "upload")) {
 			if (!authenticated) {
 				send_unauthorized();
@@ -800,7 +839,10 @@ void handle_post(void)
 			dbg_string("Configuration upload\n");
 			verify_crc = 0;
 			config_upload = 1;
-			pre_acc = 0;
+			// config_take() matches CRLF-prefixed delimiters, including the first.
+			config_buf[0] = '\r';
+			config_buf[1] = '\n';
+			pre_acc = 2;
 		}
 		// Check for other POST requests, which are not multipart, below
 	} else {
@@ -824,7 +866,6 @@ void handle_post(void)
 			handle_firmware_fragment(p);
 		return;
 	} else if (is_word(request_path, "cmd")) {
-		p += 4;
 		if (!authenticated) {
 			send_unauthorized();
 			return;
@@ -843,7 +884,6 @@ void handle_post(void)
 			return;
 		}
 
-		p += 4;
 		postbody_endpoint = POSTBODY_LOGIN;
 		if (!post_body_take(p))
 			return;
@@ -874,9 +914,10 @@ void httpd_appcall(void)
 	print_byte(s->tstate);
 	write_char(' ');
 #endif
-	if(uip_connected() && s->tstate == TSTATE_CLOSED) {
+	if(uip_connected()) {
 		dbg_string("Connected...\n");
 		s->tstate = TSTATE_NONE;
+		s->fw_reset_pending = 0; // explicitly initialize reused XDATA appstate
 	} else if (uip_closed()) {
 		dbg_string("Connection closed\n");
 		s->tstate = TSTATE_CLOSED;
@@ -890,9 +931,9 @@ void httpd_appcall(void)
 			dbg_string("Closing because everything has been transmitted\n");
 			uip_close();
 			s->tstate = TSTATE_CLOSED;
-		} else if (s->tstate == TSTATE_POSTBODY
+		} else if ((s->tstate == TSTATE_POSTBODY || s->tstate == TSTATE_HEADER)
 			   && (uint16_t)ticks - postbody_start > POSTBODY_TIMEOUT) {
-			dbg_string("Body never arrived\n");
+			dbg_string("HTTP request never completed\n");
 			uip_abort();
 			s->tstate = TSTATE_CLOSED;
 		}
@@ -928,7 +969,7 @@ void httpd_appcall(void)
 			cont_len -= slen;
 			cont_addr += slen;
 			s->tstate = TSTATE_TX;
-		} else if (fw_reset_pending) {
+		} else if (s->fw_reset_pending) {
 			// The upload verdict has been fully ACKed by the client;
 			// now it is safe to reset and apply the staged image
 			print_string("Resetting to apply update\n");
@@ -955,6 +996,7 @@ void httpd_appcall(void)
 		cont_len = 0;
 		dbg_char('<'); dbg_short(uip_len); dbg_char('\n');
 		__xdata uint8_t *p = uip_appdata;
+		uint16_t body_off = 0;
 		// Mark end of request header with \0
 		p[uip_len] = 0;
 #ifdef DEBUG
@@ -963,9 +1005,21 @@ void httpd_appcall(void)
 		dbg_char('\n');
 #endif
 		p = uip_appdata;
-		if (is_word(p, "POST") || s->tstate == TSTATE_MULTIPART
-		    || s->tstate == TSTATE_POSTBODY) {
-			handle_post();
+		if (s->tstate != TSTATE_MULTIPART && s->tstate != TSTATE_POSTBODY) {
+			if (s->tstate != TSTATE_HEADER)
+				pre_acc = 0;
+			body_off = request_header_take();
+			if (!body_off) {
+				uip_len = 0;
+				return;
+			}
+			if (body_off == 0xffff)
+				goto do_send;
+		}
+
+		if (s->tstate == TSTATE_MULTIPART || s->tstate == TSTATE_POSTBODY
+		    || is_word(config_buf, "POST")) {
+			handle_post(body_off);
 			// If this is an ongoing post stream, then wait for the next packet
 			if (s->tstate == TSTATE_POST || s->tstate == TSTATE_MULTIPART
 			    || s->tstate == TSTATE_POSTBODY) {
@@ -975,12 +1029,11 @@ void httpd_appcall(void)
 			goto do_send;
 		}
 
-		// We only expect a GET request here.
+		p = config_buf;
 		if (!is_word(p, "GET")) {
 			send_bad_request();
 			goto do_send;
 		}
-
 		dbg_string("GET request ");
 		p += 4;
 		scan_header(p);

httpd/httpd.h

@@ -12,6 +12,7 @@
    for each TCP connection. */
 typedef struct httpd_state {
    uint8_t tstate;
+   uint8_t fw_reset_pending;
 } uip_tcp_appstate_t;
 
 /* Finally we define the application function to be called by uIP. */

machine.h

@@ -15,8 +15,48 @@
 
 #define MACHINE_INC(dir,file) MACHINE_STR(dir/file)
 
+#define RTL8370 0x70
+#define RTL8372 0x72
+#define RTL8373 0x73
+
 #include  MACHINE_INC(MACHINE_DEF_DIR,MACHINE_NAME.h)
 
+
+#ifndef MACHINE_CHIPSET
+#error "MACHINE_CHIPSET shall be defined in <machine>.h file"
+#endif
+
+#ifndef MACHINE_MIN_PORT
+#if MACHINE_CHIPSET == RTL8372
+#define MACHINE_MIN_PORT 3
+#else
+#define MACHINE_MIN_PORT 0
+#endif
+#endif
+
+#ifndef MACHINE_MAX_PORT
+#if MACHINE_CHIPSET == RTL8370
+#define MACHINE_MAX_PORT 7
+#else
+#define MACHINE_MAX_PORT 8
+#endif
+#endif
+
+// auto derive SOC_FAMILY
+#define RTL836X 6
+#define RTL837X 7
+
+#ifdef SOC_FAMILY
+#error "SOC_FAMILY can not be manually defined, shall be auto derived"
+#endif
+#if (MACHINE_CHIPSET == RTL8372) || (MACHINE_CHIPSET == RTL8373)
+#define SOC_FAMILY RTL837X
+#elif (MACHINE_CHIPSET == RTL8370 )
+#define SOC_FAMILY RTL836X
+#else
+#error "Unsupported MACHINE_CHIPSET is specified!"
+#endif
+
 #define LED_27 1
 // SYSTEM LED
 #define LED_28_SYS 2
@@ -64,6 +104,12 @@ struct machine {
 	uint8_t led_mux_custom;
 	uint8_t led_mux[28];
 	uint32_t mac_flash_offset;
+	// Read the flash with single-IO (CMD_FREAD) instead of DIO for MMIO/code
+	// fetch. Set for boards whose flash chip is not usable in DIO mode, which
+	// shows up as a board that does not boot at all, garbled console output or
+	// random resets. Costs management-plane speed only, the ASIC keeps
+	// forwarding in hardware.
+	uint8_t flash_sio;
 };
 
 struct machine_runtime

machine/2G08110GSN.c

@@ -0,0 +1 @@
+SWTG018AS_A_V_2_0.c

machine/2G08110GSN.h

@@ -0,0 +1,7 @@
+#ifndef _MACHINE_2G08110GSN_H_
+#define _MACHINE_2G08110GSN_H_
+
+#define MACHINE_MODEL "MokerLink 2G08110GSN"
+#define MACHINE_CHIPSET RTL8373
+
+#endif

machine/2G5F4_10G2_V1_01.c

@@ -0,0 +1,51 @@
+#include "machine_defs.h"
+
+__code const struct machine machine = {
+	MACHINE_COMMON_SETTING,
+	.n_sfp = 2,
+	/* Same 2M-PCB43-V1.1 board family as the KP-9000-6XH-X2 (see
+	 * machine/KP_9000_6XHML_X2.c), but the two SFP+ cages (physical ports 5 and
+	 * 6) are wired the other way round: physical 5 is on SDS1, physical 6 on
+	 * SDS0. Copper ports 1-4 match the KP-9000 layout. */
+	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
+	.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},
+	.is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
+	// Left SFP cage (physical port 5) = SDS1
+	.sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
+	.sfp_port[0].pin_los = GPIO37,
+	.sfp_port[0].pin_tx_disable = GPIO_NA,
+	.sfp_port[0].sds = 1,
+	.sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
+	// Right SFP cage (physical port 6) = SDS0
+	.sfp_port[1].pin_detect = GPIO50_I2C_SCL2_UART1_TX,
+	.sfp_port[1].pin_los = GPIO10_LED10,
+	.sfp_port[1].pin_tx_disable = GPIO_NA,
+	.sfp_port[1].sds = 0,
+	.sfp_port[1].i2c = I2CBUS( GPIO41_I2C_SDA3_MDIO1, GPIO40_I2C_SCL3_MDC1 ),
+	/* The board has a 3-hole reset button footprint, but it is unpopulated and
+	 * the case has no opening for it, so reset_pin stays GPIO_NA. GPIO54, the
+	 * reset pin on the KP-9000 layout, reads as permanently pressed here. */
+	.reset_pin = GPIO_NA,
+	/* The fitted T25S40 does not work in DIO mode on this board, so read the flash
+	 * with single-IO; see doc/devices/2G5F4_10G2_V1.01.md. */
+	.flash_sio = 1,
+	.high_leds = { .mux = LED_27 | LED_29, .enable = LED_28_SYS | LED_29 },
+	.port_led_set = { 0, 0, 0, 0, 0, 0, 0, 0, 0},
+	/* Conditions for LED on:
+	 * dual led orange: ledset_0 & ledset_2
+	 * dual led green: ledset_2 & !ledset_0
+	 * single right led green: ledset_0 & !ledset_1
+	 *
+	 * Measured on this board: LED-ID0 is the copper blue LED, LED-ID1 the
+	 * copper white one (setting LED-ID0 to 0 killed blue while leaving white on
+	 * at 2.5G only) and LED-ID2 carries the SFP single LED. The "solid"
+	 * conditions (LINK/speed) barely drive the LEDs here and ACT is what
+	 * actually lights them, which is why the white LED used to glow faintly at
+	 * non-2.5G speeds; the fix for that is LED_GLB_IO_EN bit 6, set in
+	 * machine_init.c. */
+	.led_sets = { { LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT | LEDS_10G,
+			LEDS_2G5 | LEDS_LINK | LEDS_10G,
+			LEDS_1G | LEDS_LINK,
+			0 },
+		    },
+};

machine/2G5F4_10G2_V1_01.h

@@ -0,0 +1,7 @@
+#ifndef _MACHINE_2G5F4_10G2_V1_01_H_
+#define _MACHINE_2G5F4_10G2_V1_01_H_
+
+#define MACHINE_MODEL "2G5F4_10G2_V1.01 / SGT0204S"
+#define MACHINE_CHIPSET RTL8372
+
+#endif

machine/DEFAULT_8C_1SFP.c

@@ -1,25 +0,0 @@
-#include "machine_defs.h"
-
-__code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
-	.n_sfp = 1,
-	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
-	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
-	.is_sfp = {0, 0, 0, 0, 0, 0, 0, 0, 1},
-	.sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
-	.sfp_port[0].pin_los = GPIO37,
-	.sfp_port[0].pin_tx_disable = GPIO_NA,
-	.sfp_port[0].sds = 1,
-	.sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
-	.reset_pin = GPIO_NA,
-	.high_leds = { .mux = LED_27 | LED_29, .enable = LED_28_SYS | LED_29 },
-	.port_led_set = { 0, 0, 0, 0, 0, 0, 0, 0, 0},
-	.led_sets = { { LEDS_2G5 | LEDS_TWO_PAIR_1G | LEDS_1G | LEDS_500M | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT | LEDS_10G | LEDS_TWO_PAIR_5G | LEDS_5G | LEDS_TWO_PAIR_2G5,
-			LEDS_2G5 | LEDS_LINK,
-			LEDS_1G | LEDS_LINK,
-			LEDS_2G5 | LEDS_LINK | LEDS_ACT },
-		    },
-};

machine/DEFAULT_8C_1SFP.c

@@ -0,0 +1 @@
+KP_9000_9XH_X_EU.c

machine/DEFAULT_8C_1SFP.h

@@ -2,5 +2,6 @@
 #define _MACHINE_DEFAULT_8C_1SFP_H_
 
 #define MACHINE_MODEL "8+1 SFP Port Switch"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/F7008_2_5.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/F7008_2_5.h

@@ -2,5 +2,6 @@
 #define _MACHINE_F7008_2_5_H_
 
 #define MACHINE_MODEL "F7008-2.5 8+1 SFP Port Switch"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/FG_4GT_2SX_V2_0.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
 	.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},

machine/FG_4GT_2SX_V2_0.h

@@ -2,5 +2,6 @@
 #define _MACHINE_FG_4GT_2SX_V2_0_H_
 
 #define MACHINE_MODEL "FG-4GT-2SX_V2.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/FG_8GT_1SX.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/FG_8GT_1SX.h

@@ -2,5 +2,6 @@
 #define _MACHINE_FG_8GT_1SX_H_
 
 #define MACHINE_MODEL "FG-8GT-1SX"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/FNS1200P.c

@@ -1,55 +0,0 @@
-#include "machine_defs.h"
-
-__code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 0,
-    .min_port = 3,
-    .max_port = 8,
-    .n_sfp = 2,
-    .log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
-    .phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},
-    .is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
-
-    /* Left SFP (logical 8, SDS1): GPIO30=ModAbs, GPIO37=RX_LOS */
-    .sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
-    .sfp_port[0].pin_los = GPIO37,
-    .sfp_port[0].pin_tx_disable = GPIO_NA,
-    .sfp_port[0].sds = 1,
-    .sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
-
-    /* Right SFP (logical 3, SDS0): GPIO50=ModAbs, GPIO51=RX_LOS */
-    .sfp_port[1].pin_detect = GPIO50_I2C_SCL2_UART1_TX,
-    .sfp_port[1].pin_los = GPIO51_I2C_SDA2_UART1_RX,
-    .sfp_port[1].pin_tx_disable = GPIO_NA,
-    .sfp_port[1].sds = 0,
-    .sfp_port[1].i2c = I2CBUS( GPIO41_I2C_SDA3_MDIO1, GPIO40_I2C_SCL3_MDC1 ),
-
-    .reset_pin = GPIO_NA,
-
-    .high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
-
-    /* Copper ports use SET0; SFP ports use SET1 */
-    .port_led_set = {0, 0, 0, 1, 0, 0, 0, 0, 1},
-
-    .led_sets = {
-        {   /* SET0: copper — LED0=amber (2.5G), LED2=green (1G/100M/10M) */
-            LEDS_2G5 | LEDS_LINK | LEDS_ACT,
-            0,
-            LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
-            0
-        },
-        {   /* SET1: SFP — all speeds link/act */
-            LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
-            0,
-            0, 0
-        },
-    },
-
-    .led_mux_custom = 1,
-    .led_mux = {
-        0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,  /* GPIO0-7: unused */
-        0x0f, 0x0c, 0x0d, 0x0e, 0x10, 0x11, 0x12,          /* GPIO8-14 */
-        0x14, 0x15, 0x16, 0x18, 0x19, 0x1a,                 /* GPIO15-20 */
-        0x1c, 0x1d, 0x1e, 0x20, 0x21, 0x22, 0x23            /* GPIO21-27 */
-    },
-};

machine/FNS1200P.c

@@ -0,0 +1 @@
+PCB_K0402WS_V2.c

machine/FNS1200P.h

@@ -2,5 +2,6 @@
 #define _MACHINE_FNS1200P_H_
 
 #define MACHINE_MODEL "FNS-1200P"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/GT_ST018M.h

@@ -2,5 +2,6 @@
 #define _MACHINE_GT_ST018M_H_
 
 #define MACHINE_MODEL "GoodTop GT-ST018M"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/GT_ST024M.h

@@ -2,5 +2,6 @@
 #define _MACHINE_GT_ST024M_H_
 
 #define MACHINE_MODEL "GoodTop GT-ST024M"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/HASIVO_S1100P_8GT_1SX_S.c

@@ -0,0 +1,37 @@
+#include "machine_defs.h"
+
+__code const struct machine machine = {
+	MACHINE_COMMON_SETTING,
+	.mac_flash_offset = 0x1FC000,
+	.n_sfp = 1,
+	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
+	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
+	.is_sfp = {0, 0, 0, 0, 0, 0, 0, 0, 1},
+	.sfp_port[0].pin_detect = GPIO38,
+	.sfp_port[0].pin_los = GPIO37,
+	.sfp_port[0].pin_tx_disable = GPIO_NA,
+	.sfp_port[0].sds = 1,
+	.sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
+	.reset_pin = GPIO54_ACL_BIT2_EN,
+	.high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
+	.port_led_set = {0, 0, 0, 0, 0, 0, 0, 0, 1},
+	.led_sets = {
+		{
+			LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT, // LED0: orange
+			0,
+			LEDS_2G5 | LEDS_LINK | LEDS_ACT, // LED2: green
+			0
+		},
+		{
+			LEDS_10G | LEDS_5G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_LINK | LEDS_ACT, // SFP LED0: green (both SFP LEDs are green)
+			0, 0, 0
+		}
+	},
+	.led_mux_custom = 1,
+	.led_mux = {
+		0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x09,
+		0x0e, 0x10, 0x12, 0x0e, 0x14, 0x11, 0x12, 0x16,
+		0x15, 0x16, 0x18, 0x19, 0x1a, 0x1a, 0x1d, 0x1e,
+		0x1c, 0x1e, 0x20, 0x21
+	},
+};

machine/HASIVO_S1100P_8GT_1SX_S.h

@@ -0,0 +1,7 @@
+#ifndef _MACHINE_HASIVO_S1100P_8GT_1SX_S_H_
+#define _MACHINE_HASIVO_S1100P_8GT_1SX_S_H_
+
+#define MACHINE_MODEL "Hasivo S1100P-8GT-1SX-S"
+#define MACHINE_CHIPSET RTL8373
+
+#endif

machine/HASIVO_S1100WP_8GT_1SX_SE.c

@@ -1,32 +0,0 @@
-#include "machine_defs.h"
-
-__code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.mac_flash_offset = 0x1FC000,
-	.min_port = 0,
-	.max_port = 8,
-	.n_sfp = 1,
-	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
-	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
-	.is_sfp = {0, 0, 0, 0, 0, 0, 0, 0, 1},
-	.sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
-	.sfp_port[0].pin_los = GPIO37,
-	.sfp_port[0].pin_tx_disable = GPIO_NA,
-	.sfp_port[0].sds = 1,
-	.sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
-	.reset_pin = GPIO54_ACL_BIT2_EN,
-	.high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
-	.port_led_set = { 0, 0, 0, 0, 0, 0, 0, 0, 1},
-	.led_sets = { { LEDS_2G5 | LEDS_LINK | LEDS_ACT, // Green LED (right)
-					0,
-					LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT, // Amber LED (left)
-					0
-				  },
-				  { LEDS_10G | LEDS_5G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_LINK | LEDS_ACT, // SFP LED
-					0, 
-					0,
-					0
-				  },
-				},
-};

machine/HASIVO_S1100WP_8GT_1SX_SE.c

@@ -0,0 +1 @@
+SWTGW218AS.c

machine/HASIVO_S1100WP_8GT_1SX_SE.h

@@ -2,5 +2,6 @@
 #define _MACHINE_HASIVO_S1100WP_8GT_1SX_SE_H_
 
 #define MACHINE_MODEL "Hasivo S1100WP-8GT-1SX-SE"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/HASIVO_S600W_4GT_2XGT_SE.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 0,
-    .min_port = 3,
-    .max_port = 8,
+    MACHINE_COMMON_SETTING,
     .n_sfp = 0,
     .n_10g = 2,
     .log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},

machine/HASIVO_S600W_4GT_2XGT_SE.h

@@ -2,5 +2,6 @@
 #define _MACHINE_HASIVO_S600W_4GT_2XGT_SE_H_
 
 #define MACHINE_MODEL "Hasivo S600W-4GT-2XGT-SE"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/HC_SWTG124AS.c

@@ -0,0 +1 @@
+PCB_SWTG024AS_A_2_0_1.c

machine/HC_SWTG124AS.h

@@ -0,0 +1,7 @@
+#ifndef _MACHINE_HC_SWTG124AS_H_
+#define _MACHINE_HC_SWTG124AS_H_
+
+#define MACHINE_MODEL "Horaco HC-SWTG124AS"
+#define MACHINE_CHIPSET RTL8372
+
+#endif

machine/HG0402XG_V1_1.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
 	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/HG0402XG_V1_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_HG0402XG_V1_1_H_
 
 #define MACHINE_MODEL "HG0402XG V1.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/HI_K0402WS.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
 	.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},

machine/HI_K0402WS.h

@@ -2,5 +2,6 @@
 #define _MACHINE_HI_K0402WS_H_
 
 #define MACHINE_MODEL "PCB-K0402WS-V3.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/HI_K0801WS.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 1,
-    .min_port = 0,
-    .max_port = 8,
+    MACHINE_COMMON_SETTING,
     .n_sfp = 1,
     .log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
     .phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/HI_K0801WS.h

@@ -2,5 +2,6 @@
 #define _MACHINE_HI_K0801WS_H_
 
 #define MACHINE_MODEL "Hi-Source HI-k0801WS"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/K0501W_V2_0.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
 	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/K0501W_V2_0.h

@@ -2,5 +2,6 @@
 #define _MACHINE_K0501W_V2_0_H_
 
 #define MACHINE_MODEL "K0501W V2.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XHML_X2.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
 	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/KP_9000_6XHML_X2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XHML_X2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XHML-X2"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XHML_X2_V1_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XHML_X2_V1_1_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XHML V1.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XHML_X2_V1_2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XHML_X2_V1_2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XHML V1.2"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XHML_X2_V2_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XHML_X2_V2_1_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XHML V2.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XH_X.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
 	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/KP_9000_6XH_X.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XH_X_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XH-X"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XH_X2.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
 	.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},

machine/KP_9000_6XH_X2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XH_X2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XH-X2"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XH_X2_V1_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XH_X2_V1_1_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XH V1.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XH_X2_V1_2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XH_X2_V1_2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XH V1.2"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_6XH_X2_V2_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_6XH_X2_V2_1_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-6XH-X2 V2.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/KP_9000_9XHML_X_V2_2.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = { 1, 2, 3, 4, 5, 6, 7, 8, 9 },
 	.phys_to_log_port = { 0, 1, 2, 3, 4, 5, 6, 7, 8 },

machine/KP_9000_9XHML_X_V2_2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_9XHML_X_V2_2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-9XHML-X V2.2"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/KP_9000_9XHML_X_V3_1.c

@@ -2,10 +2,7 @@
 
 // 2M-PCB23-V3.2 is wired like V3.1 (SFP detection, LEDs, factory MAC location)
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/KP_9000_9XHML_X_V3_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_9XHML_X_V3_1_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-9XHML-X V3.1"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/KP_9000_9XHML_X_V3_2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_9XHML_X_V3_2_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-9XHML-X V3.2"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/KP_9000_9XH_X_EU.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/KP_9000_9XH_X_EU.h

@@ -2,5 +2,6 @@
 #define _MACHINE_KP_9000_9XH_X_EU_H_
 
 #define MACHINE_MODEL "keepLink KP-9000-9XH-X-EU"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/LIANGUO_HYWS_SGT0108S.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 1,
-    .min_port = 0,
-    .max_port = 8,
+    MACHINE_COMMON_SETTING,
     .n_sfp = 1,
     .log_to_phys_port = {2, 1, 4, 3, 5, 6, 7, 8, 9},
     .phys_to_log_port = {1, 0, 3, 2, 4, 5, 6, 7, 8},

machine/LIANGUO_HYWS_SGT0108S.h

@@ -2,5 +2,6 @@
 #define _MACHINE_LIANGUO_HYWS_SGT0108S_H_
 
 #define MACHINE_MODEL "Lianguo HYWS-SGT0108S"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/LIANGUO_ZX_SWTGW215AS.c

@@ -1,11 +1,8 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
+	MACHINE_COMMON_SETTING,
 	.mac_flash_offset = 0x1FC000,
-	.min_port = 3,
-	.max_port = 8,
 	.n_sfp = 1,
 	.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
 	.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/LIANGUO_ZX_SWTGW215AS.h

@@ -2,5 +2,6 @@
 #define _MACHINE_LIANGUO_ZX_SWTGW215AS_H_
 
 #define MACHINE_MODEL "Lianguo ZX-SWTGW215AS"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/ONT_S207CW_62TS_SE.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 0,
-    .min_port = 3,
-    .max_port = 8,
+    MACHINE_COMMON_SETTING,
     .n_sfp = 2,
     .log_to_phys_port = {0, 0, 0, 5, 4, 3, 2, 1, 6},
     .phys_to_log_port = {7, 6, 5, 4, 3, 8, 0, 0, 0},

machine/ONT_S207CW_62TS_SE.h

@@ -2,5 +2,6 @@
 #define _MACHINE_ONT_S207CW_62TS_SE_H_
 
 #define MACHINE_MODEL "ONT-S207CW-62TS-SE / Binardat 2G06-04210GSM / Binardat 2G06-04210GS"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/PB_2132.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/PB_2132.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PB_2132_H_
 
 #define MACHINE_MODEL "PB-2132"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/PCB_K0402WS_V1.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 0,
-	.min_port = 3,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 2,
 	.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
 	.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},

machine/PCB_K0402WS_V1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PCB_K0402WS_V1_H_
 
 #define MACHINE_MODEL "PCB-K0402WS-V1.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/PCB_K0402WS_V2.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-    .isRTL8373 = 0,
-    .min_port = 3,
-    .max_port = 8,
+	MACHINE_COMMON_SETTING,
     .n_sfp = 2,
     .log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
     .phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},

machine/PCB_K0402WS_V2.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PCB_K0402WS_V2_H_
 
 #define MACHINE_MODEL "PCB-K0402WS-V2.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/PCB_K0402WS_V3.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PCB_K0402WS_V3_H_
 
 #define MACHINE_MODEL "PCB-K0402WS-V3.0"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/PCB_SWTG018AS_V2_1_0.c

@@ -2,11 +2,8 @@
 
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
+	MACHINE_COMMON_SETTING,
 	.mac_flash_offset = 0x1FC000,
-	.min_port = 0,
-	.max_port = 8,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/PCB_SWTG018AS_V2_1_0.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PCB_SWTG018AS_V2_1_0_H_
 
 #define MACHINE_MODEL "SWTGW218AS (SWTG018AS-V2.1.0)"
+#define MACHINE_CHIPSET RTL8373
 
 #endif

machine/PCB_SWTG024AS_A_2_0_1.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-    .machine_name = MACHINE_MODEL,
-    .isRTL8373 = 0,
-    .min_port = 3,
-    .max_port = 8,
+    MACHINE_COMMON_SETTING,
     .n_sfp = 2,
     .log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
     .phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},

machine/PCB_SWTG024AS_A_2_0_1.h

@@ -2,5 +2,6 @@
 #define _MACHINE_PCB_SWTG024AS_A_2_0_1_H_
 
 #define MACHINE_MODEL "PCB-SWTG024AS-A-2.0.1"
+#define MACHINE_CHIPSET RTL8372
 
 #endif

machine/POE_2G080110GS.c

@@ -1,10 +1,7 @@
 #include "machine_defs.h"
 
 __code const struct machine machine = {
-	.machine_name = MACHINE_MODEL,
-	.isRTL8373 = 1,
-	.min_port = 0,
-	.max_port = 8,
+	MACHINE_COMMON_SETTING,
 	.n_sfp = 1,
 	.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
 	.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},

machine/POE_2G080110GS.h

@@ -2,5 +2,6 @@
 #define _MACHINE_POE_2G080110GS_H_
 
 #define MACHINE_MODEL "MokerLink POE-2G080110GS"
+#define MACHINE_CHIPSET RTL8373
 
 #endif