mirror of https://github.com/logicog/RTLPlayground.git synced 2026-08-30 14:52:51 +08:00

Files

T

Taiga Ogawa f6cb1152f9 Add support for FOXNEO FNS-1200P (RTL8372, 4x2.5G PoE+ + 2x SFP+)

- machine.c/h: add MACHINE_FNS1200P with verified GPIO assignments for
  both SFP ports, LED SET0 (amber 2.5G / green 1G-100M-10M) and SET1
  (SFP all-speeds), led_mux from original firmware register dump, and
  machine_custom_init() enabling LED_GLB_IO_EN bit 6
- doc/devices/FNS-1200P.md: device overview, port layout, serial
  console (S1 three through-holes = UART0 115200 8N1 3.3V),
  LED and SFP GPIO tables
- doc/devices/photos/FNS-1200P/: chassis front panel and PCB top photos
- doc/supported_devices.md: add FNS-1200P to the list

GPIO assignments and LED register values were cross-checked between
live GPIO observation (RTLPlayground gpio command) and an original
firmware register dump.

2026-05-16 17:53:32 +09:00

3.9 KiB

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FOXNEO FNS-1200P

RTL8372-based 4×2.5G PoE+ + 2×SFP+ unmanaged switch.

Using SPI clamp in-board is the only method for initial installation.

Label specifications

Manufacturer: FOXNEO
Model: FNS-1200P
Ports:
- 4 × RJ45: 10/100/1000/2500 Mbps with PoE+
- 2 × SFP+: 1G / 2.5G / 10G

What works

All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps (PoE+ is not configurable via RTLPlayground)
Both SFP+ ports supporting 1G, 2.5G and 10G modules
LEDs: amber (2.5G) and green (1G/100M/10M) per copper port; combined link/act on SFP ports

PCB overview

Board markings

Top silkscreen: PCB-K0402W-U13-V2.0 / DIP-K0402WB-V2.0

Key components

U3: SPI NOR flash, 2 MiB
U7: unpopulated SOP8 footprint — I2C bus (RTL8372 slave at 0x5c) is accessible from its pads, useful for register dumps
S1: unpopulated slide switch footprint (three through-holes used as serial console)

Front panel

Top side (PCB)

Port layout

Front panel position	Logical port	Physical port	Type
SFP left	8	5	SFP+
RJ45 1	4	1	Copper
RJ45 2	5	2	Copper
RJ45 3	6	3	Copper
RJ45 4	7	4	Copper
SFP right	3	6	SFP+

Serial console

The PCB has three unpopulated through-holes intended for a slide switch, directly connected to UART0. Numbered from the left (SFP port side), the pinout is:

Position (left→right)	Signal	GPIO
1 (leftmost)	RX	GPIO32_UART0_RX (32)
2 (middle)	GND	GND
3 (rightmost)	TX	GPIO31_UART0_TX (31)

Settings: 115200 baud / 8N1 / 3.3V TTL
Connect a USB-TTL adapter: adapter TX → pin 1, GND → pin 2, adapter RX → pin 3

LED configuration

Copper ports use LED SET0, SFP ports use LED SET1.

SET	LED0	LED2
SET0	Amber — lights on 2.5G link	Green — lights on 1G / 100M / 10M link
SET1	All speeds — lights on any link with activity	—

LED pad to physical port mapping:

GPIO pads	Port
GPIO8–11	Physical port 5 (left SFP)
GPIO12–14	Physical port 1 (RJ45 1)
GPIO15–17	Physical port 2 (RJ45 2)
GPIO18–20	Physical port 3 (RJ45 3)
GPIO21–23	Physical port 4 (RJ45 4)
GPIO24–27	Physical port 6 (right SFP)

SFP GPIO assignments

SFP	pin_detect (ModAbs)	pin_los	SerDes	I2C SDA	I2C SCL
Left (logical 8)	GPIO30_ACL_BIT3_EN	GPIO37	SDS1	GPIO39_I2C_SDA4	GPIO40_I2C_SCL3_MDC1
Right (logical 3)	GPIO50_I2C_SCL2_UART1_TX	GPIO51_I2C_SDA2_UART1_RX	SDS0	GPIO41_I2C_SDA3_MDIO1	GPIO40_I2C_SCL3_MDC1

GPIO assignments were verified by observing GPIO state changes during SFP module insertion/removal and cross-checked against an original firmware register dump. pin_tx_disable is GPIO_NA on both ports (original firmware keeps all GPIOs as inputs).

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