Commit Graph
979 Commits
Author SHA1 Message Date
logicog 196e430ec6 Remove debug output 2026-02-08 20:23:30 +01:00
logicog 9424aa3a3b LED configuration support 2026-02-08 20:23:30 +01:00
logicog 7a57416e4c Add MACHINE_HG0402XG_V1_1 2026-02-08 20:23:29 +01:00
René van Dorst fc53003022 Merge pull request #116 from logicog/speed_fixes
Fix Speed Setting using Auton-Neg
2026-02-08 18:26:43 +00:00
logicog 47878ac580 Add more printout 2026-02-08 16:46:56 +01:00
logicog d83f91f9e8 Fix Auto-negotiation
Commit 7f4c276 used the wrong MMD device
for use with the auto-negotiation page:
- phy_write(port, PHY_MMD_AN, 0x00, 0x3200);	// Restart AN
+ phy_write(port, PHY_MMD31, PHY_ANEG_CTRL, 0x3200);	// Restart AN

Fix this.
2026-02-08 16:46:56 +01:00
logicog 708b6b7f28 Use new signatures for vlan_create and phy-settings 2026-02-08 16:46:56 +01:00
logicog 9d07416641 Convert phy_set_duplex phy_set_speed to use struct phy_settings 2026-02-08 16:46:56 +01:00
logicog 4747eac9bf Reduce DSEG usage for parameters used in port/vlan configuration
Currently 5 Bytes are used by the port and vlan configuration:
--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_port_ingress_filter_PARM_2:
	.ds 1
_vlan_create_PARM_2:
	.ds 2
_vlan_create_PARM_3:
	.ds 2

They are used for passing parameters. Use __xdata to pass the
parameters instead.
2026-02-08 16:03:37 +01:00
logicog ecf152990f Fix MACHINE_KP_9000_6XHML_X2: the SDS ids were swapped 2026-02-08 16:03:37 +01:00
René van Dorst d4ed753715 Merge pull request #117 from logicog/uuid_mac
Generate a random stable locally administered addresses (LAA) MAC address based on the SoC's UUID + LOT number.
2026-02-08 14:58:36 +00:00
logicog ea230615f9 Use a MAC address based on the SoC's UUID
We use the SoC's UUID to generate a fixed MAC for a particular
switch device. The MAC generated uses a Realtek prefix and then
is followed by 3 bytes genertaed from the first 3 bytes of the
UUID xored with the last byte in order to prevent being able
to deduce the UUID from the public MAC.
2026-02-08 15:49:49 +01:00
TylerDurden-23 8f3cabdaff Merge branch 'logicog:main' into opt-system-settings 2026-02-07 18:57:32 +01:00
logicog eafe2e96e8 Merge pull request #113 from diijkstra/trendnet_limited
Partial TRENDNET TEG-S562 support
2026-02-07 16:58:32 +01:00
logicog c4dc930ca8 Merge pull request #114 from TylerDurden-23/eee-on-boot
Add EEE speed option and enable EEE with 2g5 as default at boot
2026-02-07 16:49:49 +01:00
TylerDurden-23 180de32060 Merge branch 'logicog:main' into opt-system-settings 2026-02-07 14:22:20 +01:00
chriz 68fd5d41a7 Add additional output. 2026-02-07 14:06:06 +01:00
logicog 6263b7e4c6 Merge pull request #112 from diijkstra/enable_sfp_setup
Enable SFP GPIO pins setup
2026-02-06 19:56:07 +01:00
logicog ee190a86a1 Merge pull request #88 from TylerDurden-23/main
Add Hisource HI-K0402WS pictures
2026-02-06 18:31:17 +01:00
TylerDurden-23 97b46071e0 Merge branch 'logicog:main' into opt-system-settings 2026-02-06 10:50:46 +01:00
chriz ed37d75aba Enable EEE on boot, do not reset interfaces immediately to save boot time. 2026-02-05 17:23:50 +01:00
chriz 3496d12111 Extend command parser. 2026-02-05 16:47:58 +01:00
TylerDurden-23 cfb7a589a8 Merge branch 'logicog:main' into eee-on-boot 2026-02-05 16:12:43 +01:00
diijkstra 5391d3ec32 Partial TRENDNET TEG-S562 support
Mostly working, lacking LED initialization changes.
LEDs will be added later once #107 is merged.

Closes #76.
2026-02-04 18:25:07 +01:00
diijkstra f6e4f13ebd Enable SFP GPIO pins
Previous changes addded initialization rotine, which was never called.
2026-02-04 18:17:25 +01:00
René van Dorst dbb8fe1249 Merge pull request #104 from diijkstra/i2c_gpio
Advanced I2C SFP pins definition
2026-02-01 20:48:34 +00:00
diijkstra 620edc1ba3 Initialize GPIOs with PIN defines
+ Support in MUX setup (not used thou)
2026-02-01 14:32:54 +01:00
diijkstra 48455a57b2 PIN module
Added GPIO defines, moved GPIO MUX initialization to new module.
Converted if/else to switch in GPIO initialization.
2026-02-01 14:32:50 +01:00
diijkstra 7d62b24a42 Advanced I2C pin definition
RTL has up to 3 SCL pins and up to 4 SDA pins. Lets allow configuring
I2C with individual BUS numbers instead of 0/1 I2C.

This enables support for devices where SCL line is not shared between
SFP modules. MUX registry is now initialized depending on needed
pin function.

More over, some SFP pins require special MUX settings, lets initialize
those depending on SFP configuration. This adds TX Disable pin,
which right now is set to low at startup.

Caveats:
 - We may still override MUX registry later
 - Not sure how to handle invalid bus definitions
 - Without SFP is it fine to *not* initialize anything?
 - Do to RAM limitation we do inititalize output GPIO to low
2026-02-01 12:58:16 +01:00
logicog 2c200417b5 Merge pull request #98 from vDorst/fix_soc_init
Fix soc init
2026-01-30 23:29:32 +01:00
René van Dorst 2a5f1de8f7 Merge pull request #105 from logicog/mgmt_vlan
Add support for pin switch management features to a VLAN.
2026-01-29 19:31:32 +00:00
logicog 9d4eef2dd6 Add support for management vlan
This adds support for the verification of a mangement vlan.
When enabled, then the switch's CPU will not listen to any packets
that are not tagged with the respective VLAN tag.
On the command line this is enabled by setting:
> vlan <vlan> mgmt

Setting the vlan ID of the management VLAN to 0 or 1 disables
the mangement VLAN function.
2026-01-29 19:56:01 +01:00
chriz 55fd2d5fb6 Add speed option to EEE function. 2026-01-28 09:21:03 +01:00
logicog aae055123e Merge pull request #99 from TylerDurden-23/vlan-pvid-clean
Add ability to configure PVID on VLAN page.
2026-01-28 06:18:37 +01:00
chriz 5a11515c36 Improve firefox compatibility. 2026-01-27 14:59:57 +01:00
chriz 934014c68c Label rename. 2026-01-26 23:42:36 +01:00
chriz 5662285a3e Clear command log after saving. 2026-01-26 23:29:23 +01:00
René van Dorst 1d94e99612 Demagic 0x7, 0x3e to PHY_MMD_AN, PHY_EEE_ADV2 2026-01-26 23:00:29 +01:00
René van Dorst a134335308 Demagic PHY_MMD31, 0xa432 to PHY_MMD31, PHY_MMD31_PHYCR2 2026-01-26 22:58:57 +01:00
René van Dorst 6495310ba9 Demagic PHY_MMD31, 0xa434 to PHY_MMD31, PHY_MMD31_PHYSR 2026-01-26 22:48:04 +01:00
René van Dorst 5962c3a8a6 Demagic PHY_MMD31, 0xa414 to PHY_MMD31, PHY_MMD31_GANLPAR 2026-01-26 22:45:44 +01:00
René van Dorst a6e452e638 Demagic PHY_MMD_AN, 33 to PHY_MMD_AN, PHY_ANEG_MGBASE_ADV 2026-01-26 22:42:54 +01:00
René van Dorst 7f4c276285 Demagic PHY_MMD_AN, 0x00 to PHY_MMD_AN, PHY_ANEG_CTRL 2026-01-26 22:41:49 +01:00
René van Dorst f9fdc6b81d Demagic PHY_MMD_AN, 0x13 to PHY_MMD_AN, PHY_ANEG_LP_ABILITY 2026-01-26 22:39:16 +01:00
René van Dorst d9185b3505 Demagic PHY_MMD31, 0xa400 to PHY_MMD31, PHY_MMD31_FEDCR 2026-01-26 22:37:16 +01:00
René van Dorst 3d7ef55ced Demagic PHY_MMD31, 0xa412 to PHY_MMD31, PHY_MMD31_GBCR 2026-01-26 22:35:03 +01:00
René van Dorst 44779404df Demagic PHY_MMD_AN, 0x20 to PHY_MMD_AN, PHY_ANEG_MGBASE_CTRL 2026-01-26 22:31:44 +01:00
René van Dorst 1997d7379b Demagic PHY_MMD_AN, 0x10 to PHY_MMD_AN, PHY_ANEG_ADV 2026-01-26 22:28:33 +01:00
chriz b5c249995f Add startup config editor. 2026-01-26 20:40:30 +01:00
René van Dorst c61fb6d2fe Forgot to replace so machine.isRTL8373 to machine_detected.isRTL8373 2026-01-26 20:39:42 +01:00