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Author SHA1 Message Date
logicog 2c200417b5 Merge pull request #98 from vDorst/fix_soc_init 
Fix soc init
 2026-01-30 23:29:32 +01:00
René van Dorst 2a5f1de8f7 Merge pull request #105 from logicog/mgmt_vlan 
Add support for pin switch management features to a VLAN.
 2026-01-29 19:31:32 +00:00
logicog 9d4eef2dd6 Add support for management vlan 
This adds support for the verification of a mangement vlan.
When enabled, then the switch's CPU will not listen to any packets
that are not tagged with the respective VLAN tag.
On the command line this is enabled by setting:
> vlan <vlan> mgmt

Setting the vlan ID of the management VLAN to 0 or 1 disables
the mangement VLAN function.
 2026-01-29 19:56:01 +01:00
chriz 55fd2d5fb6 Add speed option to EEE function. 2026-01-28 09:21:03 +01:00
logicog aae055123e Merge pull request #99 from TylerDurden-23/vlan-pvid-clean 
Add ability to configure PVID on VLAN page.
 2026-01-28 06:18:37 +01:00
chriz 5a11515c36 Improve firefox compatibility. 2026-01-27 14:59:57 +01:00
chriz 934014c68c Label rename. 2026-01-26 23:42:36 +01:00
chriz 5662285a3e Clear command log after saving. 2026-01-26 23:29:23 +01:00
René van Dorst 1d94e99612 Demagic 0x7, 0x3e to PHY_MMD_AN, PHY_EEE_ADV2 2026-01-26 23:00:29 +01:00
René van Dorst a134335308 Demagic PHY_MMD31, 0xa432 to PHY_MMD31, PHY_MMD31_PHYCR2 2026-01-26 22:58:57 +01:00
René van Dorst 6495310ba9 Demagic PHY_MMD31, 0xa434 to PHY_MMD31, PHY_MMD31_PHYSR 2026-01-26 22:48:04 +01:00
René van Dorst 5962c3a8a6 Demagic PHY_MMD31, 0xa414 to PHY_MMD31, PHY_MMD31_GANLPAR 2026-01-26 22:45:44 +01:00
René van Dorst a6e452e638 Demagic PHY_MMD_AN, 33 to PHY_MMD_AN, PHY_ANEG_MGBASE_ADV 2026-01-26 22:42:54 +01:00
René van Dorst 7f4c276285 Demagic PHY_MMD_AN, 0x00 to PHY_MMD_AN, PHY_ANEG_CTRL 2026-01-26 22:41:49 +01:00
René van Dorst f9fdc6b81d Demagic PHY_MMD_AN, 0x13 to PHY_MMD_AN, PHY_ANEG_LP_ABILITY 2026-01-26 22:39:16 +01:00
René van Dorst d9185b3505 Demagic PHY_MMD31, 0xa400 to PHY_MMD31, PHY_MMD31_FEDCR 2026-01-26 22:37:16 +01:00
René van Dorst 3d7ef55ced Demagic PHY_MMD31, 0xa412 to PHY_MMD31, PHY_MMD31_GBCR 2026-01-26 22:35:03 +01:00
René van Dorst 44779404df Demagic PHY_MMD_AN, 0x20 to PHY_MMD_AN, PHY_ANEG_MGBASE_CTRL 2026-01-26 22:31:44 +01:00
René van Dorst 1997d7379b Demagic PHY_MMD_AN, 0x10 to PHY_MMD_AN, PHY_ANEG_ADV 2026-01-26 22:28:33 +01:00
chriz b5c249995f Add startup config editor. 2026-01-26 20:40:30 +01:00
René van Dorst c61fb6d2fe Forgot to replace so machine.isRTL8373 to machine_detected.isRTL8373 2026-01-26 20:39:42 +01:00
René van Dorst c11099b9ec Rename PHY_SDS_CTRL and RTL8224_DEV_ID to PHY_MMD30. 
So demagic the `phy_(, 0x1e, )` to `phy_(, PHY_MMD30, )`.
Use `rg -tc phy | rg -i 0x1e` to find to most locations.
 2026-01-25 23:44:03 +01:00
René van Dorst 13d0781455 Rename PHY_MMD_CTRL to PHY_MMD31. 
So demagic the `phy_(, 0x1f, )` to `phy_(, PHY_MMD31, )`.
 2026-01-25 23:38:04 +01:00
chriz b2514bf176 Rename and auto select. 2026-01-25 22:04:59 +01:00
chriz c36136047c Add support for configuring PVID on VLAN page. 2026-01-25 22:04:05 +01:00
René van Dorst fc327810ed Add more comments about the SDS-settings for RTL8224. 
Remove the unused array `rtl8224_cb`.
Rename `rtl8224_ca` to `rtl8224_sds0_setttings`.
 2026-01-25 20:24:40 +01:00
René van Dorst b7b4594406 N-type SOC need to swap some Serdes lines to make it work. 
Without this fix N-type SOC devices like RTL8372N, RTL8383N and also the
4-port PHY RTL8224N, don't have a functional Serdes. Although the SOC
sees a link, there is no packet flow on both SFP-port nor RTL8224 ports.

Added helper functions to read/write to the RTL8224.
RTL8224 has the same register layout so we can use the same register
defines as for the main SOC.
 2026-01-25 17:22:51 +01:00
René van Dorst aa750d8ff1 Detect SOC type and use detected SOC type to init the hardware. 
Detect the SOC type and variant. RTL8372 vs RTL8373 and also is it as
non-N/N variant of the SOC.
Even if the machine profile is wrong the hardware will be initilised on
the detected type.
 2026-01-25 16:55:43 +01:00
logicog 17b428a603 Merge pull request #90 from feelfree69/fix-FW-Upload 
make fw upload working; nicer debug outputs for console
 2026-01-24 09:54:07 +01:00
René van Dorst a0313eab87 doc: gpio overview and mux settings 2026-01-22 23:04:07 +01:00
feelfree69 0345bf7bf2 Use DIO mode for normal operation; disable DIO before flashing. Use SYS_LED for indicating booting (slow), flashing (fast) and normal operation (on) 2026-01-22 19:38:17 +01:00
feelfree69 1e8382bd56 Add output of build time stamp 2026-01-22 10:24:07 +01:00
feelfree69 8dc914eb07 make fw upload working; nicer debug outputs for console 2026-01-22 08:17:07 +01:00
chriz a528436572 Add HiSource HI-K0402WS pictures 2026-01-21 14:43:04 +01:00
René van Dorst 2cdeda3bc9 Merge pull request #87 from feelfree69/patch-1 
Move SW version print after flash initialization
 2026-01-20 18:55:27 +00:00
logicog a72528b724 Merge pull request #84 from vDorst/feat_version_hardware 
version: Also show the hardware profile.
 2026-01-20 18:37:17 +01:00
feelfree69 1e073b20b6 do flash_init() earlier 
As suggested in review comment
 2026-01-20 08:13:22 +01:00
feelfree69 efcbc8b4a8 Move SW version print after flash initialization 
The code of print_sw_version() is in BANK1 and needs a proper configured flash controller.
 2026-01-19 20:32:20 +01:00
René van Dorst 13e9dbbc7b Merge pull request #68 from logicog/dhcp 
Add a DHCP client implementation and validate BANKS code size.
 2026-01-18 11:08:17 +00:00
logicog f48c84b18e Document checksum calculation offload in hardware 2026-01-18 07:50:38 +01:00
logicog 3bfcabbb99 Add main directory for includes 2026-01-18 07:50:38 +01:00
logicog 5eecab4844 Move SYS_TICK_HZ to rtl837x_common.h 
The definition is needed everywhere in the code where the ticks
need to be related to seconds.
 2026-01-18 07:50:38 +01:00
logicog fd1d14a3e7 Use main directory for includes in httpd 2026-01-18 07:50:38 +01:00
logicog 34cebe5971 Enable UDP for DHCP in uIP 2026-01-18 07:50:38 +01:00
logicog 4269745521 Make dhcp client implementation available 2026-01-18 07:50:38 +01:00
logicog af3be9a067 Initial DHCP implementation 2026-01-18 07:39:49 +01:00
logicog e8a719d911 Add itoa function 2026-01-18 07:39:49 +01:00
René van Dorst e74c4f148a version: Also show the hardware profile. 2026-01-17 21:02:25 +01:00
logicog d1d5d5e18f Consistently use banked externally visible functions 2026-01-17 17:54:31 +01:00
logicog 892920a627 Mover phy code to bank 2 as bank 1 already overflows 2026-01-17 17:54:31 +01:00