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Author SHA1 Message Date
chriz 98f3f15e7e Fix sfp marker. 2026-02-11 20:03:38 +01:00
TylerDurden-23 6f223d3f66 Merge branch 'logicog:main' into hs-add-clean 2026-02-11 20:00:45 +01:00
logicog fe1df83a88 Merge pull request #120 from vDorst/dev_keeplink_kp-9000-9xhml-x_3 
Add Keeplink KP-9000-9XHML-X (RTL8373N + RTL8224N) to machine file.
 2026-02-11 19:57:48 +01:00
logicog e7b7cb0253 Merge pull request #118 from TylerDurden-23/fix-link-speed 
Fix no 10Mbit link speed shown
 2026-02-11 19:55:25 +01:00
René van Dorst 4a3cd7b73c Update Keeplink KP-9000-9XHML-X docs. 2026-02-11 19:19:38 +01:00
René van Dorst f538a9344b Add Keeplink KP-9000-9XHML-X to machine-file. 2026-02-11 19:18:24 +01:00
feelfree69 f2b81af702 Do not set default machine in machine.h to force the user to choose one 2026-02-11 19:01:53 +01:00
feelfree69 651bdb6489 Add MACHINE_SWTGW218AS; do not set a default MACHINE, but force the user the choose one 2026-02-11 18:51:06 +01:00
feelfree69 841e1bf95e set sysled to slow blinking directly after leds have been configured 2026-02-11 18:21:19 +01:00
TylerDurden-23 7e652f3fb7 Merge branch 'logicog:main' into opt-system-settings 2026-02-11 12:31:00 +01:00
TylerDurden-23 90be2f47a3 Merge branch 'logicog:main' into fix-link-speed 2026-02-11 12:30:26 +01:00
chriz 859a50bd82 fix-link-speed 2026-02-10 23:17:04 +01:00
chriz 75b06ac90a Add support for HiSource K0402WS-V3.0 2026-02-10 22:52:03 +01:00
René van Dorst d2edb92ddf Merge pull request #107 from logicog/hg0502xg 
Generic Port LED configuration based on machine-configuration
 2026-02-10 16:58:42 +00:00
chriz 0099c2a03a Fix no 10Mbit link speed shown. Determine link state and speed seperately. Additional handling for port > 8. 2026-02-09 20:16:57 +01:00
logicog d29adafe3c Use generic led configuration 2026-02-08 20:25:01 +01:00
logicog 59894e68cb Add LED-pad mapping 2026-02-08 20:24:58 +01:00
logicog 6af072eb2c Add LED configuration in machine profile 2026-02-08 20:24:05 +01:00
logicog 8cae3f1212 Add generic LED configuration support 2026-02-08 20:23:30 +01:00
logicog 9aaddcd9b9 Reduce DSEG usage as we need 1 OSEG byte 2026-02-08 20:23:30 +01:00
logicog 196e430ec6 Remove debug output 2026-02-08 20:23:30 +01:00
logicog 9424aa3a3b LED configuration support 2026-02-08 20:23:30 +01:00
logicog 7a57416e4c Add MACHINE_HG0402XG_V1_1 2026-02-08 20:23:29 +01:00
René van Dorst fc53003022 Merge pull request #116 from logicog/speed_fixes 
Fix Speed Setting using Auton-Neg
 2026-02-08 18:26:43 +00:00
logicog 47878ac580 Add more printout 2026-02-08 16:46:56 +01:00
logicog d83f91f9e8 Fix Auto-negotiation 
Commit 7f4c276 used the wrong MMD device
for use with the auto-negotiation page:
- phy_write(port, PHY_MMD_AN, 0x00, 0x3200);	// Restart AN
+ phy_write(port, PHY_MMD31, PHY_ANEG_CTRL, 0x3200);	// Restart AN

Fix this.
 2026-02-08 16:46:56 +01:00
logicog 708b6b7f28 Use new signatures for vlan_create and phy-settings 2026-02-08 16:46:56 +01:00
logicog 9d07416641 Convert phy_set_duplex phy_set_speed to use struct phy_settings 2026-02-08 16:46:56 +01:00
logicog 4747eac9bf Reduce DSEG usage for parameters used in port/vlan configuration 
Currently 5 Bytes are used by the port and vlan configuration:
--------------------------------------------------------
; internal ram data
;--------------------------------------------------------
	.area DSEG    (DATA)
_port_ingress_filter_PARM_2:
	.ds 1
_vlan_create_PARM_2:
	.ds 2
_vlan_create_PARM_3:
	.ds 2

They are used for passing parameters. Use __xdata to pass the
parameters instead.
 2026-02-08 16:03:37 +01:00
logicog ecf152990f Fix MACHINE_KP_9000_6XHML_X2: the SDS ids were swapped 2026-02-08 16:03:37 +01:00
René van Dorst d4ed753715 Merge pull request #117 from logicog/uuid_mac 
Generate a random stable locally administered addresses (LAA) MAC address based on the SoC's UUID + LOT number.
 2026-02-08 14:58:36 +00:00
logicog ea230615f9 Use a MAC address based on the SoC's UUID 
We use the SoC's UUID to generate a fixed MAC for a particular
switch device. The MAC generated uses a Realtek prefix and then
is followed by 3 bytes genertaed from the first 3 bytes of the
UUID xored with the last byte in order to prevent being able
to deduce the UUID from the public MAC.
 2026-02-08 15:49:49 +01:00
TylerDurden-23 8f3cabdaff Merge branch 'logicog:main' into opt-system-settings 2026-02-07 18:57:32 +01:00
logicog eafe2e96e8 Merge pull request #113 from diijkstra/trendnet_limited 
Partial TRENDNET TEG-S562 support
 2026-02-07 16:58:32 +01:00
logicog c4dc930ca8 Merge pull request #114 from TylerDurden-23/eee-on-boot 
Add EEE speed option and enable EEE with 2g5 as default at boot
 2026-02-07 16:49:49 +01:00
TylerDurden-23 180de32060 Merge branch 'logicog:main' into opt-system-settings 2026-02-07 14:22:20 +01:00
chriz 68fd5d41a7 Add additional output. 2026-02-07 14:06:06 +01:00
logicog 6263b7e4c6 Merge pull request #112 from diijkstra/enable_sfp_setup 
Enable SFP GPIO pins setup
 2026-02-06 19:56:07 +01:00
logicog ee190a86a1 Merge pull request #88 from TylerDurden-23/main 
Add Hisource HI-K0402WS pictures
 2026-02-06 18:31:17 +01:00
TylerDurden-23 97b46071e0 Merge branch 'logicog:main' into opt-system-settings 2026-02-06 10:50:46 +01:00
chriz ed37d75aba Enable EEE on boot, do not reset interfaces immediately to save boot time. 2026-02-05 17:23:50 +01:00
chriz 3496d12111 Extend command parser. 2026-02-05 16:47:58 +01:00
TylerDurden-23 cfb7a589a8 Merge branch 'logicog:main' into eee-on-boot 2026-02-05 16:12:43 +01:00
diijkstra 5391d3ec32 Partial TRENDNET TEG-S562 support 
Mostly working, lacking LED initialization changes.
LEDs will be added later once #107 is merged.

Closes #76.
 2026-02-04 18:25:07 +01:00
diijkstra f6e4f13ebd Enable SFP GPIO pins 
Previous changes addded initialization rotine, which was never called.
 2026-02-04 18:17:25 +01:00
René van Dorst dbb8fe1249 Merge pull request #104 from diijkstra/i2c_gpio 
Advanced I2C SFP pins definition
 2026-02-01 20:48:34 +00:00
diijkstra 620edc1ba3 Initialize GPIOs with PIN defines 
+ Support in MUX setup (not used thou)
 2026-02-01 14:32:54 +01:00
diijkstra 48455a57b2 PIN module 
Added GPIO defines, moved GPIO MUX initialization to new module.
Converted if/else to switch in GPIO initialization.
 2026-02-01 14:32:50 +01:00
diijkstra 7d62b24a42 Advanced I2C pin definition 
RTL has up to 3 SCL pins and up to 4 SDA pins. Lets allow configuring
I2C with individual BUS numbers instead of 0/1 I2C.

This enables support for devices where SCL line is not shared between
SFP modules. MUX registry is now initialized depending on needed
pin function.

More over, some SFP pins require special MUX settings, lets initialize
those depending on SFP configuration. This adds TX Disable pin,
which right now is set to low at startup.

Caveats:
 - We may still override MUX registry later
 - Not sure how to handle invalid bus definitions
 - Without SFP is it fine to *not* initialize anything?
 - Do to RAM limitation we do inititalize output GPIO to low
 2026-02-01 12:58:16 +01:00
logicog 2c200417b5 Merge pull request #98 from vDorst/fix_soc_init 
Fix soc init
 2026-01-30 23:29:32 +01:00