René van Dorst
22dccbad8c
Replace phy_write_mask(0x1 with phy_write(0x00.
...
Also added define `RTL8224_PHY_ID` for RTL8224 phy_id.
So it is more clear that we want to talk to that phy.
Replaced in the function which contains `8224` in the name the
`phy_write(0x00, ...)` with `phy_write(RTL8224_PHY_ID, ...)`, same for the
`phy_read(0x00, ...)` with `phy_read(RTL8224_PHY_ID, ...)`.
Removed the extra `phy_read()` in `rtl8224_phy_enable()`.
2025-09-01 12:26:27 +02:00
René van Dorst
94cf079fcb
PHY: also use SFR_DATA_U16.
...
Again less error prone and easier to read.
Also see a lot of better optimalizations.
A snipped.
390c390
< ;pval Allocated to registers r3 r4
---
> ;pval Allocated to registers
838,852c838,844
< ; rtl837x_phy.c:181: pval = SFR_DATA_8 & 0xbf;
< mov r7,_SFR_DATA_8
< anl ar7,#0xbf
< ; rtl837x_phy.c:182: pval <<= 8;
< mov ar4,r7
< mov r7,#0x00
< ; rtl837x_phy.c:183: pval |= SFR_DATA_0;
< mov r2,_SFR_DATA_0
< mov r3,#0x00
< mov a,r2
< orl a,r7
< mov _phy_write_PARM_4,a
< mov a,r3
< orl a,r4
< mov (_phy_write_PARM_4 + 1),a
---
> ; rtl837x_phy.c:181: pval = SFR_DATA_U16 & 0xbfff;
> mov r4,((_SFR_DATA_U16 >> 0) & 0xFF)
> mov a,#0xbf
> anl a,((_SFR_DATA_U16 >> 8) & 0xFF)
> mov r7,a
> mov _phy_write_PARM_4,r4
> mov (_phy_write_PARM_4 + 1),r7
864c856
< mov _phy_write_PARM_3,r7
---
> mov _phy_write_PARM_3,#0x00
2025-09-01 09:25:33 +02:00
René van Dorst
7ff028303d
Add phy_write() with bit_mask lookup inside the function.
...
Move the lookup saves a lot of instructions for every phy_write() call.
Assembly diff for one change.
< ; rtl837x_phy.c:240: phy_write_mask(bit_mask[port], 0x07, 0x00, 0x3200); // Enable AN
< mov dpl,r5
< mov dph,r6
---
> ; rtl837x_phy.c:240: phy_write(port, 0x07, 0x00, 0x3200); // Enable AN
> mov _phy_write_PARM_2,#0x07
1345,1359c1019,1024
< movc a,@a+dptr
< mov r5,a
< inc dptr
< clr a
< movc a,@a+dptr
< mov r6,a
< mov _phy_write_mask_PARM_2,#0x07
< clr a
< mov _phy_write_mask_PARM_3,a
< mov (_phy_write_mask_PARM_3 + 1),a
< mov _phy_write_mask_PARM_4,a
< mov (_phy_write_mask_PARM_4 + 1),#0x32
< mov dpl, r5
< mov dph, r6
< lcall _phy_write_mask
---
> mov _phy_write_PARM_3,a
> mov (_phy_write_PARM_3 + 1),a
> mov _phy_write_PARM_4,a
> mov (_phy_write_PARM_4 + 1),#0x32
> mov dpl, r7
> lcall _phy_write
Replace all phy_write_mask(bit_mask[<var>], ...) to phy phy_write(<var>, ...).
2025-09-01 00:12:12 +02:00