René van Dorst
f187261085
Fix all compiler warnings.
...
- Many times we need help the compiler to reason about variable type or
define.
2026-08-30 21:41:30 +02:00
logicog
a3dd25e0fe
Add SDS parameter for RTL8261 setup
2026-04-24 10:53:05 +02:00
logicog
ec5f74bbed
Add is10g_port field in phy_settings
2026-04-24 10:53:05 +02:00
logicog
fd3a272255
Add RTL8261BE PHY configuration
...
Add configuration of the RTL8261BE PHY on startup.
2026-04-24 10:52:24 +02:00
logicog
9d07416641
Convert phy_set_duplex phy_set_speed to use struct phy_settings
2026-02-08 16:46:56 +01:00
René van Dorst
b7b4594406
N-type SOC need to swap some Serdes lines to make it work.
...
Without this fix N-type SOC devices like RTL8372N, RTL8383N and also the
4-port PHY RTL8224N, don't have a functional Serdes. Although the SOC
sees a link, there is no packet flow on both SFP-port nor RTL8224 ports.
Added helper functions to read/write to the RTL8224.
RTL8224 has the same register layout so we can use the same register
defines as for the main SOC.
2026-01-25 17:22:51 +01:00
logicog
2a7bfdc119
Add duplex setting in PHY speed configuration
2025-12-23 13:04:34 +01:00
logicog
2ed9974c04
Add more options to Link configuration and status display
2025-12-14 11:41:50 +01:00
logicog
31c61faa60
Use PHY page definitions, add PHY reset routine
2025-10-11 11:32:23 +02:00
logicog
6f90e1db53
Add support for changing Ethernet speeds
2025-06-29 20:06:53 +02:00
logicog
5faf31cdb8
Moving PHY code to BANK1
2025-06-25 15:30:50 +02:00
René van Dorst
logicog