mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
Console: Add Ingress type & VLAN show table
Added new `vlan show` command to dump current VLAN settings. Supports printing PVID & ingress filtering per port. Added new `ingress [p]<mode>` command to setup ingress filtering. Added wrappers for enabling/disabling vlan filtering. Currently not configurable, but state in console is read via ASIC registers. Full VLAN dump & web support of new commands will be added later.
This commit is contained in:
+104
-6
@@ -48,16 +48,38 @@ void port_mirror_del(void) __banked
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}
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void port_ingress_filter(__xdata uint8_t port, __xdata uint8_t type) __banked
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bool port_ingress_filter(__xdata uint8_t port, __xdata vlan_ingress_mode_t type) __banked
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{
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if (type & 0x1)
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if (port > 9 || type >= VLAN_INVALID) {
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print_string("Invalid port or ingress filter type\n");
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return false;
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}
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if (type & 0x1) {
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reg_bit_set(RTL837x_REG_INGRESS, port << 1);
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else
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} else {
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reg_bit_clear(RTL837x_REG_INGRESS, port << 1);
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if (type & 0x2)
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}
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if (type & 0x2) {
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reg_bit_set(RTL837x_REG_INGRESS, (port << 1) + 1);
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else
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} else {
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reg_bit_clear(RTL837x_REG_INGRESS, (port << 1) + 1);
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}
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return true;
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}
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vlan_ingress_mode_t port_ingress_filter_get(__xdata uint8_t port) __banked
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{
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reg_read_m(RTL837x_REG_INGRESS);
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if (port > 9) {
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return VLAN_INVALID;
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}
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// Each port is represented by 2 bits in the ingress register, starting from bit 0 for port 0
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const uint8_t sfr_index = 3 - (port / 4);
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const uint8_t shift = (port % 4) << 1;
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return (vlan_ingress_mode_t)((sfr_data[sfr_index] >> shift) & 0x03);
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}
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@@ -210,7 +232,8 @@ void vlan_setup(void) __banked
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// EGRESS filtering for port: removal of additional VLAN tag (mode 0x3 for each port)
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reg_bit_clear(RTL837X_VLAN_PORT_EGR_TAG, i << 1);
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reg_bit_clear(RTL837X_VLAN_PORT_EGR_TAG, (i << 1) + 1);
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reg_bit_set(RTL837X_VLAN_PORT_IGR_FLTR, i);
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// Enable INGRESS filtering for port: discard packets not belonging to member VLAN on that port
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port_ingress_vlan_filter_set(i, true);
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#ifdef DEBUG
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print_string("\n");
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@@ -235,6 +258,7 @@ void vlan_setup(void) __banked
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#ifdef DEBUG
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print_string("\nvlan_setup, REG 0x6738: "); print_reg(0x6738);
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print_string("\nvlan_setup, REG 0x4e10: "); print_reg(0x4e10);
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print_string("\nvlan_setup, REG 0x4e18: "); print_reg(0x4e18);
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print_string("\nvlan_setup, REG 0x4e14: "); print_reg(0x4e14);
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print_string("\nvlan_setup, REG 0x4e30: "); print_reg(0x4e30);
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@@ -636,3 +660,77 @@ void port_lag_hash_set(__xdata uint8_t lag, __xdata uint8_t hash_bits) __banked
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print_string("Link aggregation group must be 0-3!");
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REG_WRITE(RTL837X_TRK_HASH_CTRL_BASE + (lag << 2), 0, 0, 0, hash_bits);
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}
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void print_port_ingress_filter_mode(vlan_ingress_mode_t mode) __banked
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{
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switch (mode) {
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case VLAN_UNTAGGED:
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print_string("Untag.");
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break;
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case VLAN_TAGGED:
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print_string("Tagged");
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break;
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case VLAN_ALL:
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print_string("Any");
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break;
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default:
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print_string("!!err!!");
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}
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}
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static void print_phys_port(uint8_t port) __banked
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{
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if (port >= machine.min_port && port <= machine.max_port)
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write_char(machine.log_to_phys_port[port] + '0');
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else if (port == 9)
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write_char('9');
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else
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write_char('?');
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}
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void print_vlan_ingress_port(uint8_t log_port) __banked
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{
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print_phys_port(log_port);write_char('\t');
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print_short(port_pvid_get(log_port));write_char('\t');
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print_port_ingress_filter_mode(port_ingress_filter_get(log_port));write_char('\t');
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port_ingress_vlan_filter_get(log_port) ? print_string("Enabled") : print_string("Disabled");
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write_char('\n');
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}
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/*
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* Dumps the VLAN ingress configuration
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*/
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void vlan_dump(void) __banked
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{
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print_string("Ingress VLAN configuration:\n");
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print_string("Port\tPVID\tType\tFiltering\n");
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for (uint8_t port = machine.min_port; port <= machine.max_port; port++) {
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print_vlan_ingress_port(port);
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}
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print_vlan_ingress_port(9);
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write_char('\n');
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print_string("Type - Which frame types are allowed: untagged, tagged or any\n");
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print_string("Filtering - Whether packets not belonging to member VLANs on that port are dropped\n");
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print_string("PVID - Assumed VLAN for untagged packets\n");
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}
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/** Set the ingress VLAN filtering */
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bool port_ingress_vlan_filter_set(__xdata uint8_t port, __xdata bool enabled) __banked
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{
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if (port < machine.min_port || port > machine.max_port && port != 9) {
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return false;
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}
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reg_bit_set(RTL837X_VLAN_PORT_IGR_FLTR, port);
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return true;
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}
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/** Get the ingress VLAN filtering status */
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bool port_ingress_vlan_filter_get(__xdata uint8_t port) __banked
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{
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if (port < machine.min_port || port > machine.max_port && port != 9) {
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return false;
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}
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return reg_bit_test(RTL837X_VLAN_PORT_IGR_FLTR, port);
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}
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