diff --git a/doc/devices/FNS-1200P.md b/doc/devices/FNS-1200P.md
new file mode 100644
index 0000000..c348d58
--- /dev/null
+++ b/doc/devices/FNS-1200P.md
@@ -0,0 +1,93 @@
+# FOXNEO FNS-1200P
+
+RTL8372-based 4×2.5G PoE+ + 2×SFP+ unmanaged switch.
+
+Using SPI clamp in-board is the only method for initial installation.
+
+### Label specifications
+
+- **Manufacturer**: FOXNEO
+- **Model**: FNS-1200P
+- **Ports**:
+ - 4 × RJ45: 10/100/1000/2500 Mbps with PoE+
+ - 2 × SFP+: 1G / 2.5G / 10G
+
+### What works
+
+- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps (PoE+ is not configurable via RTLPlayground)
+- Both SFP+ ports supporting 1G, 2.5G and 10G modules
+- LEDs: amber (2.5G) and green (1G/100M/10M) per copper port; combined link/act on SFP ports
+
+### PCB overview
+
+**Board markings**
+- Top silkscreen: PCB-K0402W-U13-V2.0 / DIP-K0402WB-V2.0
+
+**Key components**
+- U3: SPI NOR flash, 2 MiB
+- U7: unpopulated SOP8 footprint — I2C bus (RTL8372 slave at 0x5c) is accessible from its pads, useful for register dumps
+- S1: unpopulated slide switch footprint (three through-holes used as serial console)
+
+Front panel
+
+
+
+Top side (PCB)
+
+
+
+### Port layout
+
+| Front panel position | Logical port | Physical port | Type |
+|----------------------|--------------|---------------|---------|
+| SFP left | 8 | 5 | SFP+ |
+| RJ45 1 | 4 | 1 | Copper |
+| RJ45 2 | 5 | 2 | Copper |
+| RJ45 3 | 6 | 3 | Copper |
+| RJ45 4 | 7 | 4 | Copper |
+| SFP right | 3 | 6 | SFP+ |
+
+### Serial console
+
+The PCB has three unpopulated through-holes intended for a slide switch, directly connected to UART0.
+Numbered from the left (SFP port side), the pinout is:
+
+| Position (left→right) | Signal | GPIO |
+|-----------------------|--------|--------------------------|
+| 1 (leftmost) | RX | GPIO32\_UART0\_RX (32) |
+| 2 (middle) | GND | GND |
+| 3 (rightmost) | TX | GPIO31\_UART0\_TX (31) |
+
+- **Settings**: 115200 baud / 8N1 / 3.3V TTL
+- Connect a USB-TTL adapter: adapter TX → pin 1, GND → pin 2, adapter RX → pin 3
+
+### LED configuration
+
+Copper ports use LED SET0, SFP ports use LED SET1.
+
+| SET | LED0 | LED2 |
+|------|--------------------------------------------------|---------------------------------------------------|
+| SET0 | Amber — lights on 2.5G link | Green — lights on 1G / 100M / 10M link |
+| SET1 | All speeds — lights on any link with activity | — |
+
+LED pad to physical port mapping:
+
+| GPIO pads | Port |
+|-----------|-------------------------|
+| GPIO8–11 | Physical port 5 (left SFP) |
+| GPIO12–14 | Physical port 1 (RJ45 1) |
+| GPIO15–17 | Physical port 2 (RJ45 2) |
+| GPIO18–20 | Physical port 3 (RJ45 3) |
+| GPIO21–23 | Physical port 4 (RJ45 4) |
+| GPIO24–27 | Physical port 6 (right SFP) |
+
+### SFP GPIO assignments
+
+| SFP | pin\_detect (ModAbs) | pin\_los | SerDes | I2C SDA | I2C SCL |
+|------------------|-----------------------------|------------------------|--------|----------------------|--------------------------|
+| Left (logical 8) | GPIO30\_ACL\_BIT3\_EN | GPIO37 | SDS1 | GPIO39\_I2C\_SDA4 | GPIO40\_I2C\_SCL3\_MDC1 |
+| Right (logical 3)| GPIO50\_I2C\_SCL2\_UART1\_TX | GPIO51\_I2C\_SDA2\_UART1\_RX | SDS0 | GPIO41\_I2C\_SDA3\_MDIO1 | GPIO40\_I2C\_SCL3\_MDC1 |
+
+GPIO assignments were verified by observing GPIO state changes during SFP module insertion/removal
+and cross-checked against an original firmware register dump.
+`pin_tx_disable` is GPIO\_NA on both ports (original firmware keeps all GPIOs as inputs).
diff --git a/doc/devices/photos/FNS-1200P/PCB-top.jpg b/doc/devices/photos/FNS-1200P/PCB-top.jpg
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diff --git a/doc/devices/photos/FNS-1200P/chassis-front.jpg b/doc/devices/photos/FNS-1200P/chassis-front.jpg
new file mode 100644
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diff --git a/doc/supported_devices.md b/doc/supported_devices.md
index 3170160..59e54d8 100644
--- a/doc/supported_devices.md
+++ b/doc/supported_devices.md
@@ -9,6 +9,7 @@ The following devices have been tested and are fully working:
- No-Name ZX-SWTGW215AS, managed version of kp-9000-6hx-x, ordered on
AliExpress as keepLINK 5+1 port managed
- TrendNet TEG-S562 (RTL8372: 4x 2.5GBit + 2x 10GBit SFP+)
+- FNS-1200P (RTL8372: 4x 2.5GBit + 2x 10GBit SFP+)
Other device based on RTL8272/3 that may work are described here: [Up-N-Atoms 2.5 GBit RTL Switch hacking guide]
(https://github.com/up-n-atom/SWTG118AS)
diff --git a/machine.c b/machine.c
index 300f8aa..8ca73e5 100644
--- a/machine.c
+++ b/machine.c
@@ -666,6 +666,66 @@ __code const struct machine machine = {
void machine_custom_init(void) { }
+#elif defined MACHINE_FNS1200P
+__code const struct machine machine = {
+ .machine_name = "FNS-1200P",
+ .isRTL8373 = 0,
+ .min_port = 3,
+ .max_port = 8,
+ .n_sfp = 2,
+ .log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
+ .phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},
+ .is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
+
+ /* Left SFP (logical 8, SDS1): GPIO30=ModAbs, GPIO37=RX_LOS */
+ .sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
+ .sfp_port[0].pin_los = GPIO37,
+ .sfp_port[0].pin_tx_disable = GPIO_NA,
+ .sfp_port[0].sds = 1,
+ .sfp_port[0].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
+
+ /* Right SFP (logical 3, SDS0): GPIO50=ModAbs, GPIO51=RX_LOS */
+ .sfp_port[1].pin_detect = GPIO50_I2C_SCL2_UART1_TX,
+ .sfp_port[1].pin_los = GPIO51_I2C_SDA2_UART1_RX,
+ .sfp_port[1].pin_tx_disable = GPIO_NA,
+ .sfp_port[1].sds = 0,
+ .sfp_port[1].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 },
+
+ .reset_pin = GPIO_NA,
+
+ .high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
+
+ /* Copper ports use SET0; SFP ports use SET1 */
+ .port_led_set = {0, 0, 0, 1, 0, 0, 0, 0, 1},
+
+ .led_sets = {
+ { /* SET0: copper — LED0=amber (2.5G), LED2=green (1G/100M/10M) */
+ LEDS_2G5 | LEDS_LINK | LEDS_ACT,
+ 0,
+ LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
+ 0
+ },
+ { /* SET1: SFP — all speeds link/act */
+ LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
+ 0,
+ 0, 0
+ },
+ },
+
+ .led_mux_custom = 1,
+ .led_mux = {
+ 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, /* GPIO0-7: unused */
+ 0x0f, 0x0c, 0x0d, 0x0e, 0x10, 0x11, 0x12, /* GPIO8-14 */
+ 0x14, 0x15, 0x16, 0x18, 0x19, 0x1a, /* GPIO15-20 */
+ 0x1c, 0x1d, 0x1e, 0x20, 0x21, 0x22, 0x23 /* GPIO21-27 */
+ },
+};
+
+void machine_custom_init(void)
+{
+ reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 6);
+}
+
#else
#error "Please select a machine type in machine.h"
#endif
diff --git a/machine.h b/machine.h
index 610a757..33f6353 100644
--- a/machine.h
+++ b/machine.h
@@ -23,6 +23,7 @@
// #define MACHINE_ZX310S_4T2XH
// #define MACHINE_DEFAULT_8C_1SFP
// #define MACHINE_HI_K0801WS
+// #define MACHINE_FNS1200P
typedef struct {
// GPIO pins for SDA/SCL