diff --git a/rtl837x_port.c b/rtl837x_port.c index d0e7611..d7cbba9 100644 --- a/rtl837x_port.c +++ b/rtl837x_port.c @@ -429,29 +429,32 @@ void port_eee_enable(__xdata uint8_t port,__xdata uint8_t speed) __banked return; // Enable all speeds up to the specified speed - if (speed == EEE_100) { + if ((speed & (EEE_100 | EEE_1000 | EEE_2G5)) == EEE_100) { REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100); // Enable EEE advertisement for 100BASE-T via EEE Advertisement Reg phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_100M); - phy_reset(port); + if (!(speed & EEE_NORESET)) + phy_reset(port); return; } - if (speed == EEE_1000) { + if ((speed & (EEE_100 | EEE_1000 | EEE_2G5)) == EEE_1000) { REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100 | EEE_1000); // Disable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2 phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, 0); // Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M); - phy_reset(port); + if (!(speed & EEE_NORESET)) + phy_reset(port); return; } - if (speed == EEE_2G5) { + if ((speed & (EEE_100 | EEE_1000 | EEE_2G5)) == EEE_2G5) { REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100 | EEE_1000 | EEE_2G5); // Enable EEE advertisement for 100/1000BASE-T via EEE Advertisement Reg phy_write(port, PHY_MMD_AN, PHY_EEE_ADV, PHY_EEE_BIT_1G | PHY_EEE_BIT_100M); // Enable EEE advertisement for 2.5GBASE-T via EEE Advertisement Reg 2 phy_write(port, PHY_MMD_AN, PHY_EEE_ADV2, PHY_EEE_BIT_2G5); - phy_reset(port); + if (!(speed & EEE_NORESET)) + phy_reset(port); return; } diff --git a/rtl837x_regs.h b/rtl837x_regs.h index cd7a2eb..fcb2928 100644 --- a/rtl837x_regs.h +++ b/rtl837x_regs.h @@ -257,6 +257,7 @@ #define EEE_100 0x01 #define EEE_1000 0x04 #define EEE_2G5 0x10 +#define EEE_NORESET 0x80 /* * RANDOM diff --git a/rtlplayground.c b/rtlplayground.c index b2bc882..a24eaf8 100644 --- a/rtlplayground.c +++ b/rtlplayground.c @@ -1637,6 +1637,9 @@ void rtl8373_init(void) reg_bit_set(RTL837X_REG_HW_CONF, 0); + // enable EEE for all ports at 2.5G and 10G, but don't reset the PHYs + port_eee_enable_all(EEE_2G5 | EEE_NORESET); + // TODO: patch the PHYs // Re-enable PHY after configuration @@ -1700,6 +1703,10 @@ void rtl8372_init(void) reg_bit_set(RTL837X_REG_HW_CONF, 0); + + // enable EEE for all ports at 2.5G and 10G, but don't reset the PHYs + port_eee_enable_all(EEE_2G5 | EEE_NORESET); + // TODO: patch the PHYs // Re-enable PHY after configuration @@ -1954,6 +1961,8 @@ void bootloader(void) REG_SET(RTL837X_PIN_MUX_2, 0x0); // Disable pins for ACL init_smi(); + + rtl8373_revision(); if (machine_detected.isRTL8373) rtl8373_init();