Merge branch 'main' into remove-custom-init

This commit is contained in:
feelfree69 authored and GitHub committed 2026-10-22 21:31:41 +02:00
commit e864c32980
17 files changed
+139 -75

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+25 -5
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@@ -5,6 +5,11 @@ on:
branches: ['**']
pull_request:
permissions:
contents: read
pull-requests: write
issues: write
jobs:
build:
runs-on: ubuntu-latest
@@ -13,18 +18,33 @@ jobs:
steps:
- uses: actions/checkout@v6
with:
path: branch
- uses: actions/checkout@v6
with:
path: main
ref: main
- name: Install dependencies
run: |
apt update
apt install make gcc sdcc xxd python-is-python3 libjson-c-dev zlib1g-dev -y
- name: Run the host-side unit tests
run: make -C test
run: cd branch && make -C test
- name: Check that every machine definition can be compiled
run: make machine_check
run: cd branch && make machine_check
- name: Make project (4x2/RTL8372)
run: make CI=1 MACHINE="KP_9000_6XHML_X2"
run: cd branch && make CI=1 MACHINE="KP_9000_6XHML_X2" && cp output/KP_9000_6XHML_X2/rtlplayground.map /tmp/branch.map
- name: Make project (8x1/RTL8373)
run: make CI=1 MACHINE="KP_9000_9XHML_X_V3_1"
run: cd branch && make CI=1 MACHINE="KP_9000_9XHML_X_V3_1"
- name: Make project with the health instrumentation
run: make clean && make CI=1 MACHINE="KP_9000_6XHML_X2" HEALTH=1
run: cd branch && make clean && make CI=1 MACHINE="KP_9000_6XHML_X2" HEALTH=1
- name: Make main
run: cd main && make CI=1 MACHINE="KP_9000_6XHML_X2" && cp output/KP_9000_6XHML_X2/rtlplayground.map /tmp/main.map
- name: Calculate bank growth
run: |
sed -rn 's/^([XCD]SEG|(BANK[0-9])).*=\s+([0-9]+)\. bytes.*$/MAIN_\1=\3/p' /tmp/main.map | sort -u >> "$GITHUB_ENV"
sed -rn 's/^([XCD]SEG|(BANK[0-9])).*=\s+([0-9]+)\. bytes.*$/BRANCH_\1=\3/p' /tmp/branch.map | sort -u >> "$GITHUB_ENV"
du -sb main/output/KP_9000_6XHML_X2/html_min | awk '{print "MAIN_WEB="$1}' >> "$GITHUB_ENV"
du -sb branch/output/KP_9000_6XHML_X2/html_min | awk '{print "BRANCH_WEB="$1}' >>"$GITHUB_ENV"
+2
View File
@@ -1,6 +1,7 @@
.gitignore
.idea/
output/
output-main/
html_data.c
html_data.h
version.h
@@ -12,3 +13,4 @@ build/
# host-test stand-ins for the two generated headers
!test/stub/html_data.h
!test/stub/version.h
.vscode
+15 -9
View File
@@ -39,7 +39,10 @@ ifeq ($(MACHINE_INIT_SRC),)
MACHINE_INIT_SRC := $(MACHINE_INIT_DEFAULT)
endif
ifndef BUILDDIR
BUILDDIR = output/$(MACHINE)
endif
VERSION_HEADER := version.h
GIT_VERSION := $(shell git rev-parse --short HEAD)
@@ -66,6 +69,9 @@ endif
# is built, including the tools/ subdirectory.
all: create_build_dir $(VERSION_HEADER) $(MACHINE_SRC) $(SUBDIRS) $(BUILDDIR)/rtlplayground-$(FILENAME_EXTENSION).bin
bank_size:
tools/bank_occupancy.sh "$(MACHINE)"
create_build_dir:
mkdir -p "$(BUILDDIR)"
mkdir -p "$(BUILDDIR)/uip"
@@ -138,7 +144,7 @@ HTML := $(shell find html -name '*.js' -or -name '*.html' -or -name '*.svg' -or
# Minified copy of the web UI sources, used as the fileadder input.
# The raw html/ sources stay untouched for development; the minified
# copy is a build artifact under output/.
HTML_MIN := output/html_min
HTML_MIN := $(BUILDDIR)/html_min
.PHONY: html_min
html_min: $(HTML)
rm -rf $(HTML_MIN)
@@ -146,7 +152,7 @@ html_min: $(HTML)
@for f in $(HTML); do python3 tools/minify.py $$f $(HTML_MIN)/$$(basename $$f) || exit 1; done
html_data.c html_data.h &: $(HTML) | tools html_min
tools/output/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -b BANK1 -z -d $(HTML_MIN) -p html_data
tools/$(BUILDDIR)/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -b BANK1 -z -d $(HTML_MIN) -p html_data
$(VERSION_HEADER): FORCE
@printf '%s\n' "#ifndef VERSION_H" "#define VERSION_H" \
@@ -160,7 +166,7 @@ $(VERSION_HEADER): FORCE
httpd: html_data.h
$(SUBDIRS):
$(MAKE) -C $@
$(MAKE) -C $@ BUILDDIR=$(BUILDDIR)
clean: $(SUBDIRSCLEAN)
-rm -f html_data.c html_data.h $(VERSION_HEADER)
@@ -198,12 +204,12 @@ $(BUILDDIR)/rtlplayground.img: $(BUILDDIR)/rtlplayground.ihx
$(BUILDDIR)/rtlplayground-$(FILENAME_EXTENSION).bin: $(BUILDDIR)/rtlplayground.img | tools
if [ -e $@ ]; then rm $@; fi
tools/output/imagebuilder -i $^ $@
tools/output/fileadder -a $(DEFAULT_CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
tools/output/fileadder -a $(CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
tools/output/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -z -d $(HTML_MIN) -b BANK1 $@
tools/output/crc_calculator -u $@
ln -sf $(MACHINE)/rtlplayground-$(FILENAME_EXTENSION).bin output/rtlplayground.bin
tools/$(BUILDDIR)/imagebuilder -i $^ $@
tools/$(BUILDDIR)/fileadder -a $(DEFAULT_CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
tools/$(BUILDDIR)/fileadder -a $(CONFIG_LOCATION) -s $(IMAGESIZE) -d config.txt $@
tools/$(BUILDDIR)/fileadder -a $(HTML_LOCATION) -s $(IMAGESIZE) -z -d $(HTML_MIN) -b BANK1 $@
tools/$(BUILDDIR)/crc_calculator -u $@
ln -sf $(MACHINE)/rtlplayground-$(FILENAME_EXTENSION).bin $(BUILDDIR)/../rtlplayground.bin
.PHONY: clean distclean all $(SUBDIRS) $(SUBDIRSCLEAN) create_build_dir
+4 -4
View File
@@ -266,7 +266,7 @@ uint8_t cmd_parse_port(uint8_t idx) {
return 0;
port = machine.phys_to_log_port[port];
if (port < machine.min_port || port > machine.max_port)
if (!MACHINE_PORT_VALID(port))
return 0;
atoi_results_u8 = port;
@@ -743,7 +743,7 @@ void parse_isolate(void)
}
if (cmd_compare(2, "off")) {
for (uint8_t i = machine.min_port; i <= machine.max_port; i++)
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++)
members |= ((uint16_t)1) << i;
members |= PMASK_CPU; // CPU-port
port_isolate(port_configured, members);
@@ -797,7 +797,7 @@ void parse_ingress(void)
if (!cmd_is_space_or_nul(idx))
goto err;
// Setting mode for all ports at once
for (log_port = machine.min_port; log_port <= machine.max_port; log_port++) {
for (log_port = MACHINE_MIN_PORT; log_port <= MACHINE_MAX_PORT; log_port++) {
if (!port_ingress_filter(log_port, mode)) {
cmd_error("cannot set the ingress filter for port "); print_phys_port(log_port); write_char('\n');
return;
@@ -1019,7 +1019,7 @@ void parse_mtu(void)
uint8_t p;
if (cmd_compare(1, "show")) {
for (p = machine.min_port; p <= machine.max_port; p++) {
for (p = MACHINE_MIN_PORT; p <= MACHINE_MAX_PORT; p++) {
reg_read_m(RTL8373_REG_MAC_L2_PORT_MAX_LEN + ((uint16_t) p << 8));
uint16_t mtu = SFR_DATA_U16 & 0x3fff;
print_string("Port "); print_phys_port(p);
+18 -18
View File
@@ -341,7 +341,7 @@ void send_vlan(uint16_t vlan)
}
slen += strtox(outbuf + slen, "\",\"pvid\":\"0x");
uint16_t pvid_mask = 0;
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (port_pvid_get(i) == vlan)
pvid_mask |= (1 << i);
}
@@ -357,7 +357,7 @@ void send_vlan(uint16_t vlan)
bool send_counters(uint8_t phys_port)
{
uint8_t phys_port_idx = phys_port - 1;
if (phys_port_idx > (machine.max_port - machine.min_port))
if (phys_port_idx > (MACHINE_MAX_PORT - MACHINE_MIN_PORT))
goto err;
uint8_t log_port = machine.phys_to_log_port[phys_port_idx];
@@ -676,7 +676,7 @@ void send_stp(void)
slen += strtox(outbuf + slen, "\",\"ports\":[");
reg_read_m(RTL837X_MSTP_STATES);
for (i = 0; i < STP_ENTITIES; i++) {
if (i < STP_LAG_BASE && (i < machine.min_port || i > machine.max_port))
if (i < STP_LAG_BASE && !MACHINE_PORT_VALID(i))
continue;
if (i < STP_LAG_BASE && stp_ent_of[i] != i)
continue;
@@ -761,7 +761,7 @@ void send_lacp(void)
}
slen -= 1; // remove comma
slen += strtox(outbuf + slen, "],\"ports\":[");
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"p\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"lag\":");
@@ -793,7 +793,7 @@ void send_lldp(void)
bool_to_html(lldp_enabled);
slen += strtox(outbuf + slen, ",\"portStatus\":[");
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
@@ -808,7 +808,7 @@ void send_lldp(void)
bool_to_html(1 & (lldp_logical_port_status >> i));
slen += strtox(outbuf + slen, "}");
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
@@ -825,7 +825,7 @@ void send_eee(void)
uint8_t eee_ablty = sfr_data[3];
char_to_html('[');
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
@@ -857,7 +857,7 @@ void send_eee(void)
bool_to_html(eee_ablty & (1 << i));
}
char_to_html('}');
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
@@ -870,7 +870,7 @@ void send_bandwidth(void)
dbg_string("send_bandwidth called\n");
slen = strtox(outbuf, HTTP_RESPONCE_JSON);
char_to_html('[');
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"iLimited\":");
@@ -900,7 +900,7 @@ void send_bandwidth(void)
byte_to_html(sfr_data[3]);
char_to_html('"');
char_to_html('}');
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
@@ -914,7 +914,7 @@ void send_storm(void)
slen = strtox(outbuf, HTTP_RESPONCE_JSON);
char_to_html('[');
for (i = machine.min_port; i <= machine.max_port; i++) {
for (i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"en\":\"");
@@ -934,7 +934,7 @@ void send_storm(void)
}
char_to_html('"');
char_to_html('}');
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
@@ -949,7 +949,7 @@ void send_isolation(void)
dbg_string("send_isolation called\n");
slen = strtox(outbuf, HTTP_RESPONCE_JSON);
char_to_html('[');
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"allow\":\"");
@@ -958,7 +958,7 @@ void send_isolation(void)
byte_to_html(allow & 0xff);
char_to_html('"');
char_to_html('}');
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
}
char_to_html(']');
@@ -970,7 +970,7 @@ void send_mtu(void)
dbg_string("send_mtu called\n");
slen = strtox(outbuf, HTTP_RESPONCE_JSON);
char_to_html('[');
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"mtu\":\"0x");
@@ -980,7 +980,7 @@ void send_mtu(void)
byte_to_html(mtu & 0xff);
char_to_html('"');
char_to_html('}');
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
@@ -994,7 +994,7 @@ void send_status(void)
dbg_string("sending status\n");
char_to_html('[');
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(machine.log_to_phys_port[i]);
slen += strtox(outbuf + slen, ",\"logPort\":");
@@ -1115,7 +1115,7 @@ void send_status(void)
slen += strtox(outbuf + slen, "\",\"macs\":\"0x");
reg_to_html(RTL837X_L2_LRN_PORT_CONSTRT_CNT + (i << 2));
slen += strtox(outbuf + slen, "\"}");
if (i < machine.max_port)
if (i < MACHINE_MAX_PORT)
char_to_html(',');
else
char_to_html(']');
+3
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@@ -42,6 +42,9 @@
#endif
#endif
#define MACHINE_PORT_VALID(p) \
((uint8_t)((p) - MACHINE_MIN_PORT) <= (MACHINE_MAX_PORT - MACHINE_MIN_PORT))
// auto derive SOC_FAMILY
#define RTL836X 6
#define RTL837X 7
+3 -3
View File
@@ -126,7 +126,7 @@ void igmp_setup(void) __banked
* For now the IGMP protocols are flooded (01), MLD which MAC-based is handled by ASIC
* All messages are allowed and maximum MC group is 0xff
*/
for (i = machine.min_port; i <= machine.max_port; i++)
for (i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++)
REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), IGMP_MAX_GROUP | IGMP_PROTOCOL_ENABLE | IGMP_FLOOD);
/* // Allow all physical ports to be dynamic router ports
@@ -155,7 +155,7 @@ void igmp_enable(void) __banked
// Configure per-port IGMP configuration, bits 0-10 enable MC protocol snooping,
// bits 16-24 configure max MC group used by that port. Trap to CPU (10)
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), IGMP_MAX_GROUP | IGMP_PROTOCOL_ENABLE | IGMP_TRAP);
}
}
@@ -180,7 +180,7 @@ void igmp_router_port_set(uint16_t pmask) __banked
void igmp_show(void) __banked
{
print_string("igmp_show called\n");
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
write_char('0' + i); write_char(':');
reg_read_m(RTL837X_IGMP_PORT_CFG + (i << 2));
print_sfr_data();
+1 -1
View File
@@ -246,7 +246,7 @@ void rtl8372_init(void) __banked
// [...]
///
uint16_t reg = 0x1238 + 0x300; // Port base register for the bits we set
for (char i = machine.min_port; i <= machine.max_port; i++) {
for (char i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
// Bit 7 (0x40) enables replacement of the RTL-VLAN tag with an 802.1Q VLAN tag
REG_SET(reg, 0xe77);
reg += 0x100;
+7 -7
View File
@@ -165,7 +165,7 @@ void lacp_mux_update(void) __banked
if (!lacp_lag_ports[lag])
continue;
lacp_scratch_mask = 0;
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (lacp_port_lag[i] != lag)
continue;
if ((lacp_actor_state[i] & LACP_STATE_FULL) == LACP_STATE_FULL
@@ -248,7 +248,7 @@ void lacp_in(void) __banked
return;
port = ((uint8_t)HTONS(LACP_H->rtl_tag.pmask)) & 0x0f;
if (port < machine.min_port || port > machine.max_port)
if (!MACHINE_PORT_VALID(port))
return;
lag = lacp_port_lag[port];
@@ -298,7 +298,7 @@ void lacp_in(void) __banked
static void lacp_step(void)
{
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (lacp_port_lag[i] == LACP_LAG_NONE)
continue;
@@ -328,7 +328,7 @@ static void lacp_step(void)
if (!lacp_agg_valid[lag])
continue;
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (lacp_port_lag[i] == lag && lacp_rx_state[i] == LACP_RX_CURRENT
&& lacp_sys_eq(lacp_partner_sys[i], lacp_agg_sys[lag])) {
any_current = 1;
@@ -422,7 +422,7 @@ void lacp_lag_set(uint8_t lag, __xdata uint16_t ports) __banked
return;
lacp_scratch_flag = lacp_any_lag();
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (lacp_port_lag[i] == lag && !(ports & PORT_BIT(i))) {
lacp_port_lag[i] = LACP_LAG_NONE;
lacp_port_release(i);
@@ -438,7 +438,7 @@ void lacp_lag_set(uint8_t lag, __xdata uint16_t ports) __banked
if (ports && !lacp_scratch_flag)
lacp_engine_on();
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (!(ports & PORT_BIT(i)))
continue;
lacp_scratch_lag = lacp_port_lag[i];
@@ -490,7 +490,7 @@ void lacp_show(void) __banked
print_string(" members "); print_short(lacp_members_last[l]); write_char('\n');
}
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
print_string("port "); print_byte(machine.log_to_phys_port[i]);
print_string(" actor "); print_byte(lacp_actor_state[i]);
print_string(" partner "); print_byte(lacp_partner_state[i]);
+3 -3
View File
@@ -37,10 +37,10 @@ void leds_setup(void) __banked
// Set up all Port-LEDs to belong to RLDP
sfr_data[3] = sfr_data[2] = sfr_data[1] = sfr_data[0] = 0;
for (uint8_t i = machine.min_port; i <= (machine.max_port > 7 ? 7 : machine.max_port); i++)
for (uint8_t i = MACHINE_MIN_PORT; i <= (MACHINE_MAX_PORT > 7 ? 7 : MACHINE_MAX_PORT); i++)
sfr_data[3 - (i >> 2)] |= i & 1 ? 0xf0 : 0x0f;
reg_write_m(RTL837X_REG_LED_RLDP_2);
if (machine.max_port == 8)
if (MACHINE_MAX_PORT == 8)
REG_SET(RTL837X_REG_LED_RLDP_3, 0x0000000f); // Port 8
// Configure high LEDs 27-29: mux and LED enable
@@ -110,7 +110,7 @@ void leds_setup(void) __banked
// Configure the LED-set of a port
sfr_data[3] = sfr_data[2] = sfr_data[1] = sfr_data[0] = 0;
for (uint8_t i = machine.min_port; i <= machine.max_port; i++)
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++)
sfr_data[3 - (i >> 2)] |= machine.port_led_set[i] << ((i & 3) << 1);
reg_write_m(RTL837X_LED_PORT_SET_SEL);
+1 -1
View File
@@ -87,7 +87,7 @@ void leds_dump(void) __banked
}
write_char('\n');
}
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
reg_read_m(RTL837X_LED_PORT_SET_SEL);
__xdata uint8_t set = sfr_data[3 - (i >> 2)];
set = (set >> ((i & 3) << 1));
+1 -1
View File
@@ -108,7 +108,7 @@ void lldp_send(void) __banked __reentrant
*/
uip_len = MAC_ADDR_LEN + MAC_ADDR_LEN + sizeof(struct rtl_tag) + LLDP_ETHERTYPE_LENGTH + (p - LLDP_O->payload);
for (uint8_t port = machine.min_port; port <= machine.max_port; port++) {
for (uint8_t port = MACHINE_MIN_PORT; port <= MACHINE_MAX_PORT; port++) {
if ((1 << port) & lldp_logical_port_status) {
LLDP_O->payload[port_position] = '0' + machine.log_to_phys_port[port];
+11 -11
View File
@@ -271,7 +271,7 @@ void vlan_setup(void) __banked
wait_table_ready();
// Set PVID 1 for every port. TODO: Skip unused ports!
for (uint8_t i = machine.min_port; i <= machine.max_port + 1; i++) { // Do this also for the CPU port (+1)
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT + 1; i++) { // Do this also for the CPU port (+1)
uint16_t reg = RTL837x_PVID_BASE_REG + ((i >> 1) << 2);
#ifdef DEBUG
print_byte(i); write_char(':'); write_char(' '); print_short(reg); write_char('=');
@@ -459,7 +459,7 @@ void port_l2_setup(void) __banked
port_l2_forget();
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
// Limit the number of automatically learned MAC-Entries per port to 0x1040
uint8_t idx = (i << 2);
REG_SET(RTL837X_L2_LRN_PORT_CONSTRAINT + idx, 0x00001040);
@@ -511,7 +511,7 @@ void port_media_show(uint8_t port) __banked
void port_stats_print(void) __banked
{
print_string("\nPort\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\t\tMACs\n");
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
print_phys_port(i); write_char('\t');
if (!machine.is_sfp[i]) {
@@ -594,14 +594,14 @@ void port_stats_print(void) __banked
void port_isolate(uint8_t port, __xdata uint16_t pmask) __banked
{
if (port <= machine.max_port)
if (port <= MACHINE_MAX_PORT)
REG_SET(RTL837X_PORT_ISOLATION_BASE + (port << 2), pmask);
}
uint16_t port_isolation_get(uint8_t port) __banked
{
if (port > machine.max_port)
if (port > MACHINE_MAX_PORT)
return 0;
reg_read_m(RTL837X_PORT_ISOLATION_BASE + (port << 2));
@@ -775,7 +775,7 @@ void port_eee_status(uint8_t port) __banked
void port_eee_enable_all(__xdata uint8_t speed) __banked
{
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
if (i == 3 && machine.n_10g) {
port_eee_enable(i, speed);
} else if (i == 8 && machine.n_10g == 2) {
@@ -792,7 +792,7 @@ void port_eee_enable_all(__xdata uint8_t speed) __banked
void port_eee_disable_all(void) __banked
{
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
port_eee_disable(i);
}
}
@@ -800,7 +800,7 @@ void port_eee_disable_all(void) __banked
void port_eee_status_all(void) __banked
{
for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
port_eee_status(i);
}
}
@@ -908,7 +908,7 @@ void vlan_dump(void) __banked
{
print_string("Ingress VLAN configuration:\n");
print_string("Port\tPVID\tType\tFiltering\n");
for (uint8_t port = machine.min_port; port <= machine.max_port; port++) {
for (uint8_t port = MACHINE_MIN_PORT; port <= MACHINE_MAX_PORT; port++) {
print_vlan_ingress_port(port);
}
print_vlan_ingress_port(9);
@@ -923,7 +923,7 @@ void vlan_dump(void) __banked
/** Set the ingress VLAN filtering */
bool port_ingress_vlan_filter_set(uint8_t port, __xdata bool enabled) __banked
{
if (port < machine.min_port || (port > machine.max_port && port != CPU_PORT)) {
if (!MACHINE_PORT_VALID(port) && port != CPU_PORT) {
return false;
}
if (enabled)
@@ -937,7 +937,7 @@ bool port_ingress_vlan_filter_set(uint8_t port, __xdata bool enabled) __banked
/** Get the ingress VLAN filtering status */
bool port_ingress_vlan_filter_get(uint8_t port) __banked
{
if (port < machine.min_port || (port > machine.max_port && port != CPU_PORT)) {
if (!MACHINE_PORT_VALID(port) && port != CPU_PORT) {
return false;
}
+1 -1
View File
@@ -67,7 +67,7 @@ void storm_show(void) __banked
{
uint8_t i, t, idx;
for (i = machine.min_port; i <= machine.max_port; i++) {
for (i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++) {
print_string("port ");
write_char('0' + machine.log_to_phys_port[i]);
for (t = 0; t < STORM_TYPES; t++) {
+11 -11
View File
@@ -335,7 +335,7 @@ static uint8_t stp_ent_active(uint8_t e) __reentrant
return 0;
if (e >= STP_LAG_BASE)
return stp_lag_mask[e - STP_LAG_BASE] != 0;
return e >= machine.min_port && e <= machine.max_port && stp_ent_of[e] == e;
return MACHINE_PORT_VALID(e) && stp_ent_of[e] == e;
}
@@ -410,7 +410,7 @@ static void stp_topology_change(uint8_t port) __reentrant
stp_tc_count++;
stp_tc_while = ((uint16_t)stp_maxage_s + stp_fwddelay_s) * STP_HZ;
if (port >= STP_LAG_BASE) {
for (uint8_t i = machine.min_port; i <= machine.max_port; i++)
for (uint8_t i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++)
if (stp_ent_has(port, i))
port_l2_forget_port(i);
} else {
@@ -565,7 +565,7 @@ void stp_in(void) __banked
/* Ingress port: low nibble of the CPU tag's pmask on RX */
stp_scratch = ((uint8_t)HTONS(STP_H->rtl_tag.pmask)) & 0x0f;
if (stp_scratch < machine.min_port || stp_scratch > machine.max_port)
if (!MACHINE_PORT_VALID(stp_scratch))
return;
port = stp_ent_of[stp_scratch];
@@ -658,7 +658,7 @@ void stp_in(void) __banked
if (!stp_tc_while) {
uint8_t i;
stp_tc_count++;
for (i = machine.min_port; i <= machine.max_port; i++)
for (i = MACHINE_MIN_PORT; i <= MACHINE_MAX_PORT; i++)
if (!stp_ent_has(port, i)
&& (stp_pflags[stp_ent_of[i]] & STP_PF_ENABLED)
&& !(stp_pflags[stp_ent_of[i]] & STP_PF_OPEREDGE))
@@ -714,7 +714,7 @@ void stp_timers(void) __banked
if (stp_map_dirty) {
stp_map_dirty = 0;
for (stp_i = 0; stp_i < STP_LAG_BASE; stp_i++) {
if (stp_i < machine.min_port || stp_i > machine.max_port)
if (!MACHINE_PORT_VALID(stp_i))
continue;
if (stp_ent_of[stp_i] != stp_i) {
stp_loop_held[stp_i] = 0;
@@ -747,14 +747,14 @@ void stp_timers(void) __banked
{
__xdata static uint16_t eff;
eff = 0;
for (stp_i = machine.min_port; stp_i <= machine.max_port; stp_i++)
for (stp_i = MACHINE_MIN_PORT; stp_i <= MACHINE_MAX_PORT; stp_i++)
if ((stp_link_now >> stp_i) & 1)
eff |= (uint16_t)1 << stp_ent_of[stp_i];
stp_link_now = eff;
}
if (stp_link_now != stp_link_prev) {
for (stp_i = 0; stp_i < STP_ENTITIES; stp_i++) {
if (stp_i < STP_PORTS && (stp_i < machine.min_port || stp_i > machine.max_port))
if (stp_i < STP_PORTS && !MACHINE_PORT_VALID(stp_i))
continue;
if (stp_i < STP_PORTS && stp_ent_of[stp_i] != stp_i)
continue;
@@ -890,7 +890,7 @@ static void stp_fdb_update(__xdata uint16_t pmask)
continue;
port_l2mc_set(0x00, stp_fdb_vid, pmask);
}
for (stp_fdb_i = machine.min_port; stp_fdb_i <= machine.max_port; stp_fdb_i++) {
for (stp_fdb_i = MACHINE_MIN_PORT; stp_fdb_i <= MACHINE_MAX_PORT; stp_fdb_i++) {
stp_fdb_vid = port_pvid_get(stp_fdb_i);
port_l2mc_set(0x00, stp_fdb_vid, pmask);
}
@@ -910,7 +910,7 @@ void stp_setup(void) __banked
stp_tx_count[stp_i] = 0;
port_timers[stp_i] = 0;
port_hello[stp_i] = (uint16_t)stp_hello_s * STP_HZ;
if (stp_i < STP_PORTS && (stp_i < machine.min_port || stp_i > machine.max_port))
if (stp_i < STP_PORTS && !MACHINE_PORT_VALID(stp_i))
continue;
if (stp_i >= STP_LAG_BASE && !stp_lag_mask[stp_i - STP_LAG_BASE])
continue;
@@ -939,7 +939,7 @@ void stp_setup(void) __banked
reg_read_m(RTL837X_REG_LINKS_STS);
stp_link_now = (uint16_t)sfr_data[1] | ((uint16_t)sfr_data[2] << 8);
stp_link_prev = 0;
for (stp_i = machine.min_port; stp_i <= machine.max_port; stp_i++)
for (stp_i = MACHINE_MIN_PORT; stp_i <= MACHINE_MAX_PORT; stp_i++)
if ((stp_link_now >> stp_i) & 1)
stp_link_prev |= (uint16_t)1 << stp_ent_of[stp_i];
@@ -952,7 +952,7 @@ void stp_setup(void) __banked
void stp_off(void) __banked
{
sfr_data[0] = sfr_data[1] = sfr_data[2] = sfr_data[3] = 0;
for (stp_i = machine.min_port; stp_i <= machine.max_port; stp_i++) {
for (stp_i = MACHINE_MIN_PORT; stp_i <= MACHINE_MAX_PORT; stp_i++) {
// Set STP port state to forwarding
// States are: 00 disable, 01 blocking, 10 learning, 11 forwarding
sfr_data[3 - (stp_i >> 2)] |= (uint8_t)(STP_ST_FORWARDING << ((stp_i << 1) & 0x7));
+2
View File
@@ -1,6 +1,8 @@
CC = gcc
CCFLAGS = -Wall -o
ifndef BUILDDIR
BUILDDIR = output
endif
all: create_build_dir $(BUILDDIR)/injector $(BUILDDIR)/fileadder $(BUILDDIR)/httpd_sim\
$(BUILDDIR)/crc_calculator $(BUILDDIR)/imagebuilder
+31
View File
@@ -0,0 +1,31 @@
#!/bin/bash
MACHINE="$1"
if [[ ! -s output-main/rtlplayground.map ]]; then
original_branch=$(git branch --show-current)
#trap 'git switch "$original_branch"' EXIT
git switch main && make CI=1 MACHINE="$MACHINE" BUILDDIR=output-main
git switch "$original_branch"
fi
source <(sed -rn 's/^([XCD]SEG|(BANK[0-9])).*=\s+([0-9]+)\. bytes.*$/main_\1=\3/p' output-main/rtlplayground.map | sort -u)
main_WEB=$(du -sb output-main/html_min | awk '{print $1}')
if [[ ! -s "output/$MACHINE/rtlplayground.map" ]]; then
make CI=1 MACHINE="$MACHINE"
fi
source <(sed -rn 's/^([XCD]SEG|(BANK[0-9])).*=\s+([0-9]+)\. bytes.*$/branch_\1=\3/p' output/"$MACHINE"/rtlplayground.map | sort -u)
branch_WEB=$(du -sb output/html_min | awk '{print $1}')
print_line() {
local name=$1 main=$2 branch=$3
printf '%-20s %-20s %-20s %-20s\n' "$name" "$main" "$branch" "$((branch - main))"
}
printf '%-20s %-20s %-20s %-20s\n' "segment" "main" "branch" "change"
print_line "BANK1" "$main_BANK1" "$branch_BANK1"
print_line "BANK2" "$main_BANK2" "$branch_BANK2"
print_line "BANK3" "$main_BANK3" "$branch_BANK3"
print_line "CSEG" "$main_CSEG" "$branch_CSEG"
print_line "DSEG" "$main_DSEG" "$branch_DSEG"
print_line "XSEG" "$main_XSEG" "$branch_XSEG"
print_line "WEB" "$main_WEB" "$branch_WEB"