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Merge pull request #393 from bloqaudio/fix/l2-delete-own-mac

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httpd: refuse to delete the switch's own L2 entry
This commit is contained in:
René van Dorst authored and GitHub committed 2026-09-03 21:09:16 +00:00
2 parents be6bd2a5b3 f0e9953081
commit e26693826e
2 files changed
+41 -22
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httpd/page_impl.c
+28 -18
View File
@@ -433,42 +433,52 @@ void l2_delete(uint16_t idx)
__xdata uint8_t entries_left = L2_MAX_TRANSFER;
do {
reg_read_m(RTL837X_TBL_CTRL);
} while (sfr_data[3] & TBL_EXECUTE);
reg_read(RTL837X_TBL_CTRL);
} while (SFR_DATA_0 & TBL_EXECUTE);
slen += strtox(outbuf + slen, "{\"result\":");
// First, search for the entry based on the index
reg_read_m(RTL837x_TBL_DATA_0);
REG_WRITE(RTL837x_TBL_DATA_0, sfr_data[0], sfr_data[1] & 0xfc, sfr_data[2] | (TBL_LUTREAD_NEXT_L2UC << 6), sfr_data[3]);
sfr_data[1] &= 0xfc;
sfr_data[2] |= (TBL_LUTREAD_NEXT_L2UC << 6);
reg_write_m(RTL837x_TBL_DATA_0);
REG_WRITE(RTL837X_TBL_CTRL, (idx >> 8) & 0xf, idx, TBL_L2_UNICAST, TBL_EXECUTE);
do {
reg_read_m(RTL837X_TBL_CTRL);
} while (sfr_data[3] & 0x1);
reg_read(RTL837X_TBL_CTRL);
} while (SFR_DATA_0 & 0x1);
reg_read_m(RTL837x_L2_DATA_OUT_B);
if (!(sfr_data[0] & 0x20)) {
if (!(SFR_DATA_24 & 0x20)) {
char_to_html('0');
} else {
__bit is_our_mac_addr = uip_ethaddr.addr[0] == SFR_DATA_8 && uip_ethaddr.addr[1] == SFR_DATA_0;
sfr_data[0] &= 0x3f; // Clear SPA
reg_write_m(RTL837x_TBL_DATA_IN_B);
// Second half of MAC is copied
reg_read_m(RTL837x_L2_DATA_OUT_A);
reg_write_m(RTL837x_TBL_DATA_IN_A);
if (is_our_mac_addr && uip_ethaddr.addr[2] == SFR_DATA_24 && uip_ethaddr.addr[3] == SFR_DATA_16
&& uip_ethaddr.addr[4] == SFR_DATA_8 && uip_ethaddr.addr[5] == SFR_DATA_0) {
// the switch's own entry keeps management reachable
char_to_html('0');
} else {
reg_write_m(RTL837x_TBL_DATA_IN_A);
reg_read_m(RTL837x_L2_DATA_OUT_C);
sfr_data[3] &= 0xc0; // Clear age, auth and second part of ports
sfr_data[1] &= 0xfe; // Clear nosalearn
reg_write_m(RTL837x_TBL_DATA_IN_C);
reg_read_m(RTL837x_L2_DATA_OUT_C);
sfr_data[3] &= 0xc0; // Clear age, auth and second part of ports
sfr_data[1] &= 0xfe; // Clear nosalearn
reg_write_m(RTL837x_TBL_DATA_IN_C);
reg_read_m(RTL837x_TBL_DATA_0);
REG_WRITE(RTL837x_TBL_DATA_0, sfr_data[0], sfr_data[1], TBL_L2_UNICAST, sfr_data[3]);
reg_read_m(RTL837x_TBL_DATA_0);
sfr_data[2] = TBL_L2_UNICAST;
reg_write_m(RTL837x_TBL_DATA_0);
REG_WRITE(RTL837X_TBL_CTRL, idx >> 8, idx, TBL_L2_UNICAST, TBL_WRITE | TBL_EXECUTE);
do {
reg_read_m(RTL837X_TBL_CTRL);
} while (sfr_data[3] & TBL_EXECUTE);
REG_WRITE(RTL837X_TBL_CTRL, idx >> 8, idx, TBL_L2_UNICAST, TBL_WRITE | TBL_EXECUTE);
do {
reg_read(RTL837X_TBL_CTRL);
} while (SFR_DATA_0 & TBL_EXECUTE);
char_to_html('1');
char_to_html('1');
}
}
char_to_html('}');
}