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Use machine structure

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logicog
2025-12-12 09:06:52 +01:00
parent 06fbf85bce
commit d75ad636f9
9 changed files with 109 additions and 194 deletions
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Makefile
+1 -1
View File
@@ -21,7 +21,7 @@ all: create_build_dir $(VERSION_HEADER) $(SUBDIRS) $(BUILDDIR)rtlplayground.bin
create_build_dir: create_build_dir:
mkdir -p $(BUILDDIR) mkdir -p $(BUILDDIR)
SRCS = rtlplayground.c rtl837x_flash.c rtl837x_phy.c rtl837x_port.c cmd_parser.c html_data.c rtl837x_igmp.c rtl837x_stp.c SRCS = rtlplayground.c rtl837x_flash.c rtl837x_phy.c rtl837x_port.c cmd_parser.c html_data.c rtl837x_igmp.c rtl837x_stp.c machine.c
OBJS = ${SRCS:%.c=$(BUILDDIR)%.rel} OBJS = ${SRCS:%.c=$(BUILDDIR)%.rel}
OBJS += uip/$(BUILDDIR)/timer.rel uip/$(BUILDDIR)/uip-fw.rel uip/$(BUILDDIR)/uip-neighbor.rel uip/$(BUILDDIR)/uip-split.rel uip/$(BUILDDIR)/uip.rel uip/$(BUILDDIR)/uip_arp.rel uip/$(BUILDDIR)/uiplib.rel httpd/$(BUILDDIR)/httpd.rel httpd/$(BUILDDIR)/page_impl.rel OBJS += uip/$(BUILDDIR)/timer.rel uip/$(BUILDDIR)/uip-fw.rel uip/$(BUILDDIR)/uip-neighbor.rel uip/$(BUILDDIR)/uip-split.rel uip/$(BUILDDIR)/uip.rel uip/$(BUILDDIR)/uip_arp.rel uip/$(BUILDDIR)/uiplib.rel httpd/$(BUILDDIR)/httpd.rel httpd/$(BUILDDIR)/page_impl.rel
cmd_parser.c
+14 -33
View File
@@ -15,13 +15,12 @@
#include "uip/uip.h" #include "uip/uip.h"
#include "version.h" #include "version.h"
#include "machine.h"
#pragma codeseg BANK1 #pragma codeseg BANK1
#pragma constseg BANK1 #pragma constseg BANK1
extern __xdata uint8_t minPort; extern __code struct machine machine;
extern __xdata uint8_t maxPort;
extern __xdata uint8_t nSFPPorts;
extern __xdata uint8_t isRTL8373;
extern __xdata uint16_t mpos; extern __xdata uint16_t mpos;
extern __xdata uint8_t stpEnabled; extern __xdata uint8_t stpEnabled;
extern __code uint8_t log_to_phys_port[9]; extern __code uint8_t log_to_phys_port[9];
@@ -63,11 +62,6 @@ __xdata signed char cmd_words_b[N_WORDS];
__xdata uint8_t cmd_history[CMD_HISTORY_SIZE]; __xdata uint8_t cmd_history[CMD_HISTORY_SIZE];
__xdata uint16_t cmd_history_ptr; __xdata uint16_t cmd_history_ptr;
// Maps the physical port (starting from 0) to the logical port
__code uint8_t phys_to_log_port[6] = {
4, 5, 6, 7, 3, 8
};
inline uint8_t isletter(uint8_t l) inline uint8_t isletter(uint8_t l)
{ {
@@ -205,10 +199,7 @@ void parse_lag(void)
print_string(" member ports: "); print_string(" member ports: ");
for (uint8_t j = 0; j < 10; j++) { for (uint8_t j = 0; j < 10; j++) {
if (members & 1) { if (members & 1) {
if (!isRTL8373) write_char('0' + machine.log_to_phys_port[j]);
write_char('0' + log_to_phys_port[j]);
else
write_char('1' + j);
write_char(' '); write_char(' ');
} }
members >>= 1; members >>= 1;
@@ -233,12 +224,11 @@ void parse_lag(void)
port = cmd_buffer[cmd_words_b[w]] - '1'; port = cmd_buffer[cmd_words_b[w]] - '1';
if (isnumber(cmd_buffer[cmd_words_b[w] + 1])) if (isnumber(cmd_buffer[cmd_words_b[w] + 1]))
port = (port + 1) * 10 + cmd_buffer[cmd_words_b[w] + 1] - '1'; port = (port + 1) * 10 + cmd_buffer[cmd_words_b[w] + 1] - '1';
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
} else { } else {
goto err; goto err;
} }
if (port > maxPort) if (port > machine.max_port)
goto err; goto err;
members |= ((uint16_t)1) << port; members |= ((uint16_t)1) << port;
w++; w++;
@@ -321,12 +311,11 @@ void parse_vlan(void)
if (cmd_buffer[cmd_words_b[w] + 2] == 't') if (cmd_buffer[cmd_words_b[w] + 2] == 't')
tagged |= ((uint16_t)1) << port; tagged |= ((uint16_t)1) << port;
} else { } else {
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
if (cmd_buffer[cmd_words_b[w] + 1] == 't') if (cmd_buffer[cmd_words_b[w] + 1] == 't')
tagged |= ((uint16_t)1) << port; tagged |= ((uint16_t)1) << port;
} }
if (port > maxPort) if (port > machine.max_port)
goto err; goto err;
members |= ((uint16_t)1) << port; members |= ((uint16_t)1) << port;
} }
@@ -359,10 +348,7 @@ void parse_mirror(void)
print_string("NOT Enabled: "); print_string("NOT Enabled: ");
} }
print_string("Mirroring port: "); print_string("Mirroring port: ");
if (!isRTL8373) write_char('0' + machine.log_to_phys_port[mPort >> 1]);
write_char('0' + log_to_phys_port[mPort >> 1]);
else
write_char('0' + (mPort >> 1) + 1);
reg_read_m(RTL837x_MIRROR_CONF); reg_read_m(RTL837x_MIRROR_CONF);
uint16_t m = sfr_data[0]; uint16_t m = sfr_data[0];
m = (m << 8) | sfr_data[1]; m = (m << 8) | sfr_data[1];
@@ -387,8 +373,7 @@ void parse_mirror(void)
mirroring_port = cmd_buffer[cmd_words_b[1]] - '1'; mirroring_port = cmd_buffer[cmd_words_b[1]] - '1';
if (isnumber(cmd_buffer[cmd_words_b[1] + 1])) if (isnumber(cmd_buffer[cmd_words_b[1] + 1]))
mirroring_port = (mirroring_port + 1) * 10 + cmd_buffer[cmd_words_b[1] + 1] - '1'; mirroring_port = (mirroring_port + 1) * 10 + cmd_buffer[cmd_words_b[1] + 1] - '1';
if (!isRTL8373) mirroring_port = machine.phys_to_log_port[mirroring_port];
mirroring_port = phys_to_log_port[mirroring_port];
uint8_t w = 2; uint8_t w = 2;
while (cmd_words_b[w] > 0) { while (cmd_words_b[w] > 0) {
@@ -397,8 +382,7 @@ void parse_mirror(void)
port = cmd_buffer[cmd_words_b[w]] - '1'; port = cmd_buffer[cmd_words_b[w]] - '1';
if (isnumber(cmd_buffer[cmd_words_b[w] + 1])) { if (isnumber(cmd_buffer[cmd_words_b[w] + 1])) {
port = (port + 1) * 10 + cmd_buffer[cmd_words_b[w] + 1] - '1'; port = (port + 1) * 10 + cmd_buffer[cmd_words_b[w] + 1] - '1';
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
if (cmd_buffer[cmd_words_b[w] + 2] == 'r') if (cmd_buffer[cmd_words_b[w] + 2] == 'r')
rx_pmask |= ((uint16_t)1) << port; rx_pmask |= ((uint16_t)1) << port;
else if (cmd_buffer[cmd_words_b[w] + 2] == 't') else if (cmd_buffer[cmd_words_b[w] + 2] == 't')
@@ -408,8 +392,7 @@ void parse_mirror(void)
tx_pmask |= ((uint16_t)1) << port; tx_pmask |= ((uint16_t)1) << port;
} }
} else { } else {
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
if (cmd_buffer[cmd_words_b[w] + 1] == 'r') if (cmd_buffer[cmd_words_b[w] + 1] == 'r')
rx_pmask |= ((uint16_t)1) << port; rx_pmask |= ((uint16_t)1) << port;
else if (cmd_buffer[cmd_words_b[w] + 1] == 't') else if (cmd_buffer[cmd_words_b[w] + 1] == 't')
@@ -743,8 +726,7 @@ void cmd_parser(void) __banked
__xdata uint16_t pvid; __xdata uint16_t pvid;
uint8_t port; uint8_t port;
port = cmd_buffer[cmd_words_b[1]] - '1'; port = cmd_buffer[cmd_words_b[1]] - '1';
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
if (!atoi_short(&pvid, cmd_words_b[2])) if (!atoi_short(&pvid, cmd_words_b[2]))
port_pvid_set(port, pvid); port_pvid_set(port, pvid);
} else if (cmd_compare(0, "vlan")) { } else if (cmd_compare(0, "vlan")) {
@@ -771,8 +753,7 @@ void cmd_parser(void) __banked
int8_t port = -1; int8_t port = -1;
if (cmd_words_b[3] > 0) { if (cmd_words_b[3] > 0) {
port = cmd_buffer[cmd_words_b[2]] - '1'; port = cmd_buffer[cmd_words_b[2]] - '1';
if (!isRTL8373) port = machine.phys_to_log_port[port];
port = phys_to_log_port[port];
} }
if (cmd_words_b[1] > 0 && cmd_compare(1, "on")) { if (cmd_words_b[1] > 0 && cmd_compare(1, "on")) {
if (port >= 0) if (port >= 0)
httpd/page_impl.c
+17 -31
View File
@@ -10,11 +10,13 @@
#include <stdint.h> #include <stdint.h>
#include "../phy.h" #include "../phy.h"
#include "../version.h" #include "../version.h"
#include "../machine.h"
#include "page_impl.h" #include "page_impl.h"
#pragma codeseg BANK1 #pragma codeseg BANK1
#pragma constseg BANK1 #pragma constseg BANK1
extern __code const struct machine machine;
extern __xdata uint8_t outbuf[TCP_OUTBUF_SIZE]; extern __xdata uint8_t outbuf[TCP_OUTBUF_SIZE];
extern __xdata uint16_t slen; extern __xdata uint16_t slen;
extern __xdata uint16_t cont_len; extern __xdata uint16_t cont_len;
@@ -22,15 +24,8 @@ extern __xdata uint32_t cont_addr;
extern __code uint8_t * __code hex; extern __code uint8_t * __code hex;
extern __xdata uip_ipaddr_t uip_hostaddr, uip_draddr, uip_netmask; extern __xdata uip_ipaddr_t uip_hostaddr, uip_draddr, uip_netmask;
extern __code struct uip_eth_addr uip_ethaddr; extern __code struct uip_eth_addr uip_ethaddr;
extern __code uint8_t log_to_phys_port[9];
extern __code uint8_t phys_to_log_port[6];
extern __xdata uint8_t minPort;
extern __xdata uint8_t maxPort;
extern __xdata uint8_t nSFPPorts;
extern __xdata uint8_t sfr_data[4]; extern __xdata uint8_t sfr_data[4];
extern __xdata uint8_t cpuPort;
extern __xdata uint8_t isRTL8373;
extern __xdata uint8_t sfp_pins_last; extern __xdata uint8_t sfp_pins_last;
extern __xdata uint8_t vlan_names[VLAN_NAMES_SIZE]; extern __xdata uint8_t vlan_names[VLAN_NAMES_SIZE];
@@ -185,11 +180,11 @@ void send_basic_info(void)
slen += strtox(outbuf + slen, ",\"sfp_slot_0\":\""); slen += strtox(outbuf + slen, ",\"sfp_slot_0\":\"");
send_sfp_info(0); send_sfp_info(0);
char_to_html('"'); char_to_html('"');
#if NSFP == 2 if (machine.n_sfp == 2) {
slen += strtox(outbuf + slen, ",\"sfp_slot_1\":\""); slen += strtox(outbuf + slen, ",\"sfp_slot_1\":\"");
send_sfp_info(1); send_sfp_info(1);
char_to_html('"'); char_to_html('"');
#endif }
char_to_html('}'); char_to_html('}');
} }
@@ -221,7 +216,7 @@ void send_counters(char port)
print_string("sending counters\n"); print_string("sending counters\n");
port--; port--;
uint8_t i = isRTL8373 ? port - 1: phys_to_log_port[port]; uint8_t i = machine.phys_to_log_port[port];
slen += strtox(outbuf + slen, "{\"portNum\":"); slen += strtox(outbuf + slen, "{\"portNum\":");
itoa_html(i + 1); itoa_html(i + 1);
for (uint8_t j = 0; j < 0x3f; j++) { for (uint8_t j = 0; j < 0x3f; j++) {
@@ -249,10 +244,7 @@ void send_mirror(void)
} else { } else {
slen += strtox(outbuf + slen, "{\"enabled\":0,\"mPort\":"); slen += strtox(outbuf + slen, "{\"enabled\":0,\"mPort\":");
} }
if (!isRTL8373) itoa_html(machine.log_to_phys_port[mPort >> 1]);
itoa_html(log_to_phys_port[mPort >> 1]);
else
itoa_html((mPort >> 1) + 1);
reg_read_m(RTL837x_MIRROR_CONF); reg_read_m(RTL837x_MIRROR_CONF);
uint16_t m = sfr_data[0]; uint16_t m = sfr_data[0];
@@ -309,14 +301,11 @@ void send_eee(void)
uint8_t eee_ablty = sfr_data[3]; uint8_t eee_ablty = sfr_data[3];
char_to_html('['); char_to_html('[');
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":"); slen += strtox(outbuf + slen, "{\"portNum\":");
if (!isRTL8373) itoa_html(machine.log_to_phys_port[i]);
itoa_html(log_to_phys_port[i]);
else
itoa_html(i + 1);
if (IS_SFP(i)) { if (machine.is_sfp[i]) {
slen += strtox(outbuf + slen, ",\"isSFP\":1"); slen += strtox(outbuf + slen, ",\"isSFP\":1");
} else { } else {
slen += strtox(outbuf + slen, ",\"isSFP\":0,\"eee\":\""); slen += strtox(outbuf + slen, ",\"isSFP\":0,\"eee\":\"");
@@ -344,7 +333,7 @@ void send_eee(void)
bool_to_html(eee_ablty & (1 << i)); bool_to_html(eee_ablty & (1 << i));
} }
char_to_html('}'); char_to_html('}');
if (i < maxPort) if (i < machine.max_port)
char_to_html(','); char_to_html(',');
else else
char_to_html(']'); char_to_html(']');
@@ -358,14 +347,11 @@ void send_status(void)
print_string("sending status\n"); print_string("sending status\n");
char_to_html('['); char_to_html('[');
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
slen += strtox(outbuf + slen, "{\"portNum\":"); slen += strtox(outbuf + slen, "{\"portNum\":");
if (!isRTL8373) itoa_html(machine.log_to_phys_port[i]);
itoa_html(log_to_phys_port[i]);
else
itoa_html(i + 1);
if (IS_SFP(i)) { if (machine.is_sfp[i]) {
slen += strtox(outbuf + slen, ",\"isSFP\":1,\"enabled\":"); slen += strtox(outbuf + slen, ",\"isSFP\":1,\"enabled\":");
if (i != 3) { if (i != 3) {
reg_read_m(RTL837X_REG_GPIO_00_31_INPUT); reg_read_m(RTL837X_REG_GPIO_00_31_INPUT);
@@ -408,7 +394,7 @@ void send_status(void)
STAT_GET(STAT_COUNTER_ERR_PKTS, i); STAT_GET(STAT_COUNTER_ERR_PKTS, i);
reg_to_html(RTL837X_STAT_V_HIGH); // 32bit RX packet errors reg_to_html(RTL837X_STAT_V_HIGH); // 32bit RX packet errors
slen += strtox(outbuf + slen, "\"}"); slen += strtox(outbuf + slen, "\"}");
if (i < maxPort) if (i < machine.max_port)
char_to_html(','); char_to_html(',');
else else
char_to_html(']'); char_to_html(']');
rtl837x_common.h
+2 -8
View File
@@ -4,13 +4,13 @@
#include "uip/uip-conf.h" #include "uip/uip-conf.h"
#include <stdint.h> #include <stdint.h>
// This has to be set to the number of SFP+ ports, i.e. 1 or 2
#define NSFP 2
// SCL and SDA pin numbers for SFP cage 0 and SFP cage 1 // SCL and SDA pin numbers for SFP cage 0 and SFP cage 1
#define SCL_PIN 3 #define SCL_PIN 3
#define SDA_PIN_0 4 #define SDA_PIN_0 4
#define SDA_PIN_1 3 #define SDA_PIN_1 3
#define CPU_PORT 9
// Define Port-masks for 9-port devices and 6-port devices // Define Port-masks for 9-port devices and 6-port devices
#define PMASK_9 0x1ff #define PMASK_9 0x1ff
#define PMASK_6 0x1f8 #define PMASK_6 0x1f8
@@ -41,12 +41,6 @@
// This is the standard size of an Ethernet frame header // This is the standard size of an Ethernet frame header
#define ETHER_HEADER_SIZE 14 #define ETHER_HEADER_SIZE 14
#if NSFP == 1
#define IS_SFP(port) (i == maxPort)
#else
#define IS_SFP(port) (i == maxPort || i == 3)
#endif
#define CONFIG_START 0x70000 #define CONFIG_START 0x70000
#define CONFIG_LEN 0x1000 #define CONFIG_LEN 0x1000
#define CODE0_SIZE 0x4000 #define CODE0_SIZE 0x4000
rtl837x_flash.c
+1 -1
View File
@@ -283,7 +283,7 @@ void flash_read_bulk(__xdata uint8_t *dst)
} }
void flash_read_security() void flash_read_security(void)
{ {
while (flash_read_status() & 0x1); while (flash_read_status() & 0x1);
rtl837x_igmp.c
+6 -12
View File
@@ -11,12 +11,9 @@
#include "rtl837x_sfr.h" #include "rtl837x_sfr.h"
#include "rtl837x_regs.h" #include "rtl837x_regs.h"
#include "rtl837x_igmp.h" #include "rtl837x_igmp.h"
#include "machine.h"
extern __xdata uint8_t minPort; extern __code struct machine machine;
extern __xdata uint8_t maxPort;
extern __xdata uint8_t nSFPPorts;
extern __xdata uint8_t cpuPort;
extern __xdata uint8_t isRTL8373;
void igmp_setup(void) __banked void igmp_setup(void) __banked
{ {
@@ -24,19 +21,16 @@ void igmp_setup(void) __banked
// For now, forward all unkown MC pkts (2 bits per port. 00: flood via floodmask, 01: drop, 10: trap, 11: to rport) // For now, forward all unkown MC pkts (2 bits per port. 00: flood via floodmask, 01: drop, 10: trap, 11: to rport)
REG_SET(RTL837X_MC_LOOKUPMISS_ACTIONS, 0x00000000); //0x4f78 REG_SET(RTL837X_MC_LOOKUPMISS_ACTIONS, 0x00000000); //0x4f78
// Define ports where unknown MC addresses are flooded to: // Define ports where unknown MC addresses are flooded to:
if (isRTL8373) { REG_SET(RTL837X_MC_FLOODMASK, machine.isRTL8373 ? PMASK_9 : PMASK_6);
REG_SET(RTL837X_MC_FLOODMASK, PMASK_9); // R5368-000001f8
} else {
REG_SET(RTL837X_MC_FLOODMASK, PMASK_6);
}
// Enable lookup of IPv4 MC addresses in table // Enable lookup of IPv4 MC addresses in table
reg_bit_set(RTL837X_L2_CTRL, 3); // 0x5350 reg_bit_set(RTL837X_L2_CTRL, 3); // 0x5350
// Configure per-port IGMP configuration, bits 0-10 enable MC protocol snooping, // Configure per-port IGMP configuration, bits 0-10 enable MC protocol snooping,
// bits 16-24 configure max MC group used by that port. For now all protocols are flooded (01) // bits 16-24 configure max MC group used by that port. For now all protocols are flooded (01)
for (i = minPort; i <= maxPort; i++) for (i = machine.min_port; i <= machine.max_port; i++)
REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), 0x00ff7c15); REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), 0x00ff7c15);
} }
@@ -52,6 +46,6 @@ void igmp_enable(void) __banked
// Configure per-port IGMP configuration, bits 0-10 enable MC protocol snooping, // Configure per-port IGMP configuration, bits 0-10 enable MC protocol snooping,
// bits 16-24 configure max MC group used by that port. Trap to CPU (10) // bits 16-24 configure max MC group used by that port. Trap to CPU (10)
for (i = minPort; i <= maxPort; i++) for (i = machine.min_port; i <= machine.max_port; i++)
REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), 0x00ff7c2a); // 0x00ff7000: Handling by ASIC (00) REG_SET(RTL837X_IGMP_PORT_CFG + (i << 2), 0x00ff7c2a); // 0x00ff7000: Handling by ASIC (00)
} }
rtl837x_port.c
+21 -49
View File
@@ -13,40 +13,20 @@
#include "rtl837x_port.h" #include "rtl837x_port.h"
#include "rtl837x_phy.h" #include "rtl837x_phy.h"
#include "phy.h" #include "phy.h"
#include "machine.h"
#pragma codeseg BANK1 #pragma codeseg BANK1
#pragma constseg BANK1 #pragma constseg BANK1
extern __code uint8_t * __code hex; extern __code uint8_t * __code hex;
extern __code uint16_t bit_mask[16]; extern __code uint16_t bit_mask[16];
extern __xdata uint8_t minPort; extern __code struct machine machine;
extern __xdata uint8_t maxPort;
extern __xdata uint8_t nSFPPorts;
extern __xdata uint8_t sfr_data[4]; extern __xdata uint8_t sfr_data[4];
extern __xdata uint8_t cpuPort;
extern __xdata uint16_t vlan_ptr; extern __xdata uint16_t vlan_ptr;
extern __xdata uint8_t vlan_names[VLAN_NAMES_SIZE]; extern __xdata uint8_t vlan_names[VLAN_NAMES_SIZE];
extern __xdata uint8_t isRTL8373;
__xdata uint32_t l2_head; __xdata uint32_t l2_head;
// The mapping of logical to physical ports on the RTL8372
// Port 6 is always an SFP+ port. Port 5 may be RTL8221 or SFP+
__code uint8_t log_to_phys_port[9] = {
0, 0, 0, 5, 1, 2, 3, 4, 6
};
#if NSFP == 2
__code uint8_t is_sfp[9] = {
0, 0, 0, 1, 0, 0, 0, 0, 1
};
#else
__code uint8_t is_sfp[9] = {
0, 0, 0, 0, 0, 0, 0, 0, 1
};
#endif
void port_mirror_set(register uint8_t port, __xdata uint16_t rx_pmask, __xdata uint16_t tx_pmask) __banked void port_mirror_set(register uint8_t port, __xdata uint16_t rx_pmask, __xdata uint16_t tx_pmask) __banked
{ {
print_string("\nport_mirror_set called \n"); print_string("\nport_mirror_set called \n");
@@ -153,7 +133,7 @@ void vlan_create(register uint16_t vlan, register uint16_t members, register uin
uint16_t a = (~members) ^ tagged ^ members; uint16_t a = (~members) ^ tagged ^ members;
// On RTL8372, port-bits 0-2 must be 0, although they are not members // On RTL8372, port-bits 0-2 must be 0, although they are not members
if (!isRTL8373) { if (!machine.isRTL8373) {
a &= 0x1f8; a &= 0x1f8;
tagged &= 0x3f8; tagged &= 0x3f8;
} }
@@ -184,7 +164,7 @@ void vlan_setup(void) __banked
vlan_names[0] = 0; vlan_names[0] = 0;
// Initialize VLAN table for VLAN 1, by disabling that entry // Initialize VLAN table for VLAN 1, by disabling that entry
if (isRTL8373) { if (machine.isRTL8373) {
REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007ffff); REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007ffff);
} else { } else {
REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007e3f8); REG_SET(RTL837x_TBL_DATA_IN_A, 0x0007e3f8);
@@ -195,7 +175,7 @@ void vlan_setup(void) __banked
} while (sfr_data[3] & TBL_EXECUTE); } while (sfr_data[3] & TBL_EXECUTE);
// Set PVID 1 for every port. TODO: Skip unused ports! // Set PVID 1 for every port. TODO: Skip unused ports!
for (uint8_t i = minPort; i <= maxPort + 1; i++) { // Do this also for the CPU port (+1) for (uint8_t i = machine.min_port; i <= machine.max_port + 1; i++) { // Do this also for the CPU port (+1)
uint16_t reg = RTL837x_PVID_BASE_REG + ((i >> 1) << 2); uint16_t reg = RTL837x_PVID_BASE_REG + ((i >> 1) << 2);
#ifdef DEBUG #ifdef DEBUG
print_byte(i); write_char(':'); write_char(' '); print_short(reg); write_char('='); print_byte(i); write_char(':'); write_char(' '); print_short(reg); write_char('=');
@@ -231,7 +211,7 @@ void vlan_setup(void) __banked
REG_SET(RTL837X_VLAN_L2_LRN_DIS_1, 0); REG_SET(RTL837X_VLAN_L2_LRN_DIS_1, 0);
// Enable VLAN 1: Ports 0-9, i.e. including the CPU port are untagged members // Enable VLAN 1: Ports 0-9, i.e. including the CPU port are untagged members
if (isRTL8373) { if (machine.isRTL8373) {
REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207ffff); // 02: Entry valid, 7ffff: membership REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207ffff); // 02: Entry valid, 7ffff: membership
} else { } else {
REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207e3f8); REG_SET(RTL837x_TBL_DATA_IN_A, 0x0207e3f8);
@@ -266,11 +246,7 @@ uint8_t port_l2_forget(void) __banked
REG_SET(RTL837x_L2_TBL_FLUSH_CNF, 0x0); REG_SET(RTL837x_L2_TBL_FLUSH_CNF, 0x0);
// Flush L2 table for all ports by setting the ports and the flush-exec bit (bit 16) // Flush L2 table for all ports by setting the ports and the flush-exec bit (bit 16)
if (isRTL8373) { REG_SET(RTL837x_L2_TBL_FLUSH_CTRL, machine.isRTL8373 ? L2_TBL_FLUSH_EXEC | PMASK_9 : L2_TBL_FLUSH_EXEC | PMASK_6);
REG_SET(RTL837x_L2_TBL_FLUSH_CTRL, L2_TBL_FLUSH_EXEC | PMASK_9);
} else {
REG_SET(RTL837x_L2_TBL_FLUSH_CTRL, L2_TBL_FLUSH_EXEC | PMASK_6);
}
// Wait for flush completed // Wait for flush completed
do { do {
@@ -358,14 +334,14 @@ void port_l2_setup(void) __banked
port_l2_forget(); port_l2_forget();
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
// Limit the number of automatically learned MAC-Entries per port to 0x1040 // Limit the number of automatically learned MAC-Entries per port to 0x1040
uint16_t reg = RTL837X_L2_LRN_PORT_CONSTRAINT + (i << 2); uint16_t reg = RTL837X_L2_LRN_PORT_CONSTRAINT + (i << 2);
REG_SET(reg, 0x00001040); REG_SET(reg, 0x00001040);
// All ports may communicate with each other and CPU-Port // All ports may communicate with each other and CPU-Port
reg = RTL837X_PORT_ISOLATION_BASE + (i << 2); reg = RTL837X_PORT_ISOLATION_BASE + (i << 2);
if(isRTL8373) { if(machine.isRTL8373) {
REG_SET(reg, PMASK_9 | PMASK_CPU); REG_SET(reg, PMASK_9 | PMASK_CPU);
} else { } else {
REG_SET(reg, PMASK_6 | PMASK_CPU); REG_SET(reg, PMASK_6 | PMASK_CPU);
@@ -381,14 +357,10 @@ void port_l2_setup(void) __banked
void port_stats_print(void) __banked void port_stats_print(void) __banked
{ {
print_string("\n Port\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\n"); print_string("\n Port\tState\tLink\tTxGood\t\tTxBad\t\tRxGood\t\tRxBad\n");
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
if (!isRTL8373) { write_char('0' + machine.log_to_phys_port[i]); write_char('\t');
write_char('0' + log_to_phys_port[i]); write_char('\t');
} else {
write_char('1' + i); write_char('\t');
}
if (!IS_SFP(i)) { if (!machine.is_sfp[i]) {
phy_read(i, 0x1f, 0xa610); phy_read(i, 0x1f, 0xa610);
if (SFR_DATA_8 == 0x20) if (SFR_DATA_8 == 0x20)
print_string("On\t"); print_string("On\t");
@@ -456,14 +428,14 @@ void port_stats_print(void) __banked
void port_isolate(register uint8_t port, __xdata uint16_t pmask) void port_isolate(register uint8_t port, __xdata uint16_t pmask)
{ {
if (port <= maxPort) if (port <= machine.max_port)
REG_SET(RTL837X_PORT_ISOLATION_BASE + (port << 2), pmask); REG_SET(RTL837X_PORT_ISOLATION_BASE + (port << 2), pmask);
} }
uint16_t port_isolation_get(register uint8_t port) uint16_t port_isolation_get(register uint8_t port)
{ {
if (port > maxPort) if (port > machine.max_port)
return 0; return 0;
reg_read_m(RTL837X_PORT_ISOLATION_BASE + (port << 2)); reg_read_m(RTL837X_PORT_ISOLATION_BASE + (port << 2));
@@ -473,7 +445,7 @@ uint16_t port_isolation_get(register uint8_t port)
void port_eee_enable(uint8_t port) __banked void port_eee_enable(uint8_t port) __banked
{ {
if (is_sfp[port]) if (machine.is_sfp[port])
return; return;
REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100 | EEE_1000 | EEE_2G5); REG_SET(RTL8373_EEE_CTRL_BASE + (port << 2), EEE_100 | EEE_1000 | EEE_2G5);
@@ -487,7 +459,7 @@ void port_eee_enable(uint8_t port) __banked
void port_eee_disable(uint8_t port) __banked void port_eee_disable(uint8_t port) __banked
{ {
if (is_sfp[port]) if (machine.is_sfp[port])
return; return;
print_string("EEE off for "); print_byte(port); write_char('\n'); print_string("EEE off for "); print_byte(port); write_char('\n');
@@ -502,9 +474,9 @@ void port_eee_disable(uint8_t port) __banked
void port_eee_status(uint8_t port) __banked void port_eee_status(uint8_t port) __banked
{ {
print_string("Port: "); write_char('0' + log_to_phys_port[port]); print_string("Port: "); write_char('0' + machine.log_to_phys_port[port]);
print_string(": "); print_string(": ");
if (is_sfp[port]) { if (machine.is_sfp[port]) {
print_string("SFP\n"); print_string("SFP\n");
return; return;
} }
@@ -557,7 +529,7 @@ void port_eee_status(uint8_t port) __banked
void port_eee_enable_all(void) __banked void port_eee_enable_all(void) __banked
{ {
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
port_eee_enable(i); port_eee_enable(i);
} }
} }
@@ -565,7 +537,7 @@ void port_eee_enable_all(void) __banked
void port_eee_disable_all(void) __banked void port_eee_disable_all(void) __banked
{ {
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
port_eee_disable(i); port_eee_disable(i);
} }
} }
@@ -573,7 +545,7 @@ void port_eee_disable_all(void) __banked
void port_eee_status_all(void) __banked void port_eee_status_all(void) __banked
{ {
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
port_eee_status(i); port_eee_status(i);
} }
} }
rtl837x_stp.c
+5 -8
View File
@@ -12,12 +12,9 @@
#include "rtl837x_regs.h" #include "rtl837x_regs.h"
#include "rtl837x_stp.h" #include "rtl837x_stp.h"
#include "uip.h" #include "uip.h"
#include "machine.h"
extern __xdata uint8_t minPort; extern __code struct machine machine;
extern __xdata uint8_t maxPort;
extern __xdata uint8_t nSFPPorts;
extern __xdata uint8_t cpuPort;
extern __xdata uint8_t isRTL8373;
extern __xdata uint8_t sfr_data[4]; extern __xdata uint8_t sfr_data[4];
extern __code struct uip_eth_addr uip_ethaddr; extern __code struct uip_eth_addr uip_ethaddr;
@@ -203,7 +200,7 @@ void stp_cnf_send(uint8_t port)
void stp_timers(void) __banked void stp_timers(void) __banked
{ {
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
port_hello[i]--; port_hello[i]--;
if (!port_hello[i]) { if (!port_hello[i]) {
port_hello[i] = TIME_HELLO; port_hello[i] = TIME_HELLO;
@@ -219,7 +216,7 @@ void stp_setup(void) __banked
{ {
print_string("Enabling STP: "); print_string("Enabling STP: ");
sfr_data[0] = sfr_data[1] = sfr_data[2] = sfr_data[3] = 0; sfr_data[0] = sfr_data[1] = sfr_data[2] = sfr_data[3] = 0;
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
// Set STP port state to blocking // Set STP port state to blocking
// States are: 00 disable, 01 blocking, 10 learning, 11 forwarding // States are: 00 disable, 01 blocking, 10 learning, 11 forwarding
uint8_t bit_mask = 0b01 << ( (i << 1) & 0x7); uint8_t bit_mask = 0b01 << ( (i << 1) & 0x7);
@@ -241,7 +238,7 @@ void stp_setup(void) __banked
void stp_off(void) __banked void stp_off(void) __banked
{ {
sfr_data[0] = sfr_data[1] = sfr_data[2] = sfr_data[3] = 0; sfr_data[0] = sfr_data[1] = sfr_data[2] = sfr_data[3] = 0;
for (uint8_t i = minPort; i <= maxPort; i++) { for (uint8_t i = machine.min_port; i <= machine.max_port; i++) {
// Set STP port state to forwarding // Set STP port state to forwarding
// States are: 00 disable, 01 blocking, 10 learning, 11 forwarding // States are: 00 disable, 01 blocking, 10 learning, 11 forwarding
uint8_t bit_mask = 0b11 << ( (i << 1) & 0x7); uint8_t bit_mask = 0b11 << ( (i << 1) & 0x7);
rtlplayground.c
+42 -51
View File
@@ -15,6 +15,9 @@
#include "uip/uipopt.h" #include "uip/uipopt.h"
#include "uip/uip.h" #include "uip/uip.h"
#include "uip/uip_arp.h" #include "uip/uip_arp.h"
#include "machine.h"
extern __code struct machine machine;
extern __xdata uint16_t crc_value; extern __xdata uint16_t crc_value;
__xdata uint8_t crc_testbytes[10]; __xdata uint8_t crc_testbytes[10];
@@ -56,8 +59,6 @@ __code struct uip_eth_addr uip_ethaddr = {{ 0x1c, 0x2a, 0xa3, 0x23, 0x00, 0x02 }
__code uint8_t gatewayIP[] = { 192, 168, 2, 22}; __code uint8_t gatewayIP[] = { 192, 168, 2, 22};
__code uint8_t netmask[] = { 255, 255, 255, 0}; __code uint8_t netmask[] = { 255, 255, 255, 0};
__xdata uint8_t isRTL8373;
volatile __xdata uint32_t ticks; volatile __xdata uint32_t ticks;
volatile __xdata uint8_t sec_counter; volatile __xdata uint8_t sec_counter;
volatile __xdata uint16_t sleep_ticks; volatile __xdata uint16_t sleep_ticks;
@@ -87,10 +88,6 @@ __xdata uint8_t uip_buf[UIP_CONF_BUFFER_SIZE+2];
__xdata uint16_t rx_packet_vlan; __xdata uint16_t rx_packet_vlan;
__xdata uint8_t tx_seq; __xdata uint8_t tx_seq;
__xdata uint8_t minPort;
__xdata uint8_t maxPort;
__xdata uint8_t nSFPPorts;
__xdata uint8_t cpuPort;
__xdata uint8_t stpEnabled; __xdata uint8_t stpEnabled;
__code uint16_t bit_mask[16] = { __code uint16_t bit_mask[16] = {
@@ -633,7 +630,7 @@ void sds_config_mac(uint8_t sds, uint8_t mode)
case 2: case 2:
sfr_mask_data(1, 0xfc, 0x02 << 2); sfr_mask_data(1, 0xfc, 0x02 << 2);
} }
if (isRTL8373) // Set 3rd SERDES Mode to 0x2 for RTL8224 if (machine.isRTL8373) // Set 3rd SERDES Mode to 0x2 for RTL8224
sfr_mask_data(1, 0xfc, 0x02 << 2); sfr_mask_data(1, 0xfc, 0x02 << 2);
else else
sfr_data[2] &= 0x03; sfr_data[2] &= 0x03;
@@ -950,36 +947,36 @@ void handle_sfp(void)
sfp_pins_last |= 0x02; sfp_pins_last |= 0x02;
print_string("\n<SFP-RX LOS>\n"); print_string("\n<SFP-RX LOS>\n");
} }
#if NSFP == 2 if (machine.n_sfp == 2) {
reg_read_m(RTL837X_REG_GPIO_32_63_INPUT); reg_read_m(RTL837X_REG_GPIO_32_63_INPUT);
if ((sfp_pins_last & 0x10) && (!(sfr_data[1] & 0x04))) { if ((sfp_pins_last & 0x10) && (!(sfr_data[1] & 0x04))) {
sfp_pins_last &= ~0x10; sfp_pins_last &= ~0x10;
print_string("\n<MODULE 2 INSERTED> "); print_string("\n<MODULE 2 INSERTED> ");
// Read Reg 11: Encoding, see SFF-8472 and SFF-8024 // Read Reg 11: Encoding, see SFF-8472 and SFF-8024
// Read Reg 12: Signalling rate (including overhead) in 100Mbit: 0xd: 1Gbit, 0x67:10Gbit // Read Reg 12: Signalling rate (including overhead) in 100Mbit: 0xd: 1Gbit, 0x67:10Gbit
delay(100); // Delay, because some modules need time to wake up delay(100); // Delay, because some modules need time to wake up
uint8_t rate = sfp_read_reg(1, 12); uint8_t rate = sfp_read_reg(1, 12);
print_string("Rate: "); print_byte(rate); // Normally 1, but 0 for DAC, can be ignored? print_string("Rate: "); print_byte(rate); // Normally 1, but 0 for DAC, can be ignored?
print_string(" Encoding: "); print_byte(sfp_read_reg(1, 11)); print_string(" Encoding: "); print_byte(sfp_read_reg(1, 11));
print_string("\n"); print_string("\n");
sfp_print_info(1); sfp_print_info(1);
sds_config(0, sfp_rate_to_sds_config(rate)); sds_config(0, sfp_rate_to_sds_config(rate));
} }
if ((!(sfp_pins_last & 0x10)) && (sfr_data[1] & 0x04)) { if ((!(sfp_pins_last & 0x10)) && (sfr_data[1] & 0x04)) {
sfp_pins_last |= 0x10; sfp_pins_last |= 0x10;
print_string("\n<MODULE 2 REMOVED>\n"); print_string("\n<MODULE 2 REMOVED>\n");
} }
reg_read_m(RTL837X_REG_GPIO_00_31_INPUT); reg_read_m(RTL837X_REG_GPIO_00_31_INPUT);
if ((sfp_pins_last & 0x20) && (!(sfr_data[2] & 0x08))) { if ((sfp_pins_last & 0x20) && (!(sfr_data[2] & 0x08))) {
sfp_pins_last &= ~0x20; sfp_pins_last &= ~0x20;
print_string("\n<SFP2-RX OK>\n"); print_string("\n<SFP2-RX OK>\n");
}
if ((!(sfp_pins_last & 0x20)) && (sfr_data[2] & 0x08)) {
sfp_pins_last |= 0x20;
print_string("\n<SFP2-RX LOS>\n");
}
} }
if ((!(sfp_pins_last & 0x20)) && (sfr_data[2] & 0x08)) {
sfp_pins_last |= 0x20;
print_string("\n<SFP2-RX LOS>\n");
}
#endif
} }
@@ -1035,7 +1032,7 @@ void idle(void)
print_byte(linkbits_last[2]); print_byte(linkbits_last[3]); print_byte(linkbits_last[2]); print_byte(linkbits_last[3]);
print_string(">\n"); print_string(">\n");
linkbits_last_p89 = linkbits_p89; linkbits_last_p89 = linkbits_p89;
if (!isRTL8373 && nSFPPorts != 2) { if (!machine.isRTL8373 && machine.n_sfp != 2) {
uint8_t p5 = sfr_data[2] >> 4; uint8_t p5 = sfr_data[2] >> 4;
uint8_t p5_last = linkbits_last[2] >> 4; uint8_t p5_last = linkbits_last[2] >> 4;
cpy_4(linkbits_last, sfr_data); cpy_4(linkbits_last, sfr_data);
@@ -1420,7 +1417,7 @@ void led_config(void)
reg_bit_clear(0x65dc, 0x1b); reg_bit_clear(0x65dc, 0x1b);
// Set bits 1b/1d of 0x7f8c: r7f8c:30000000 R7f8c-30000000 r7f8c:30000000 R7f8c-38000000 // Set bits 1b/1d of 0x7f8c: r7f8c:30000000 R7f8c-30000000 r7f8c:30000000 R7f8c-38000000
if (nSFPPorts == 2) { if (machine.n_sfp == 2) {
reg_bit_set(RTL837X_PIN_MUX_0, 0x1b); // R7f8c-28000000 reg_bit_set(RTL837X_PIN_MUX_0, 0x1b); // R7f8c-28000000
reg_bit_clear(RTL837X_PIN_MUX_0, 0x1c); // R7f8c-28000000 reg_bit_clear(RTL837X_PIN_MUX_0, 0x1c); // R7f8c-28000000
reg_bit_set(RTL837X_PIN_MUX_0, 0x1d); // R7f8c-28000000 reg_bit_set(RTL837X_PIN_MUX_0, 0x1d); // R7f8c-28000000
@@ -1481,10 +1478,6 @@ void rtl8373_revision(void)
void rtl8373_init(void) void rtl8373_init(void)
{ {
print_string("\nrtl8373_init called\n"); print_string("\nrtl8373_init called\n");
minPort = 0;
maxPort = 8;
cpuPort = 9;
nSFPPorts = 1;
// r6330:00015555 R6330-00005555 r6330:00005555 R6330-00005555 // r6330:00015555 R6330-00005555 r6330:00005555 R6330-00005555
REG_SET(0x6330, 0x00005555); REG_SET(0x6330, 0x00005555);
@@ -1584,21 +1577,17 @@ void rtl8373_init(void)
void rtl8372_init(void) void rtl8372_init(void)
{ {
print_string("\nrtl8372_init called\n"); print_string("\nrtl8372_init called\n");
minPort = 3;
maxPort = 8;
cpuPort = 9;
nSFPPorts = NSFP;
// r6330:00015555 R6330-00005555 r6330:00005555 R6330-00005555 // r6330:00015555 R6330-00005555 r6330:00005555 R6330-00005555
REG_SET(0x6330, 0x00005555); REG_SET(0x6330, 0x00005555);
if (nSFPPorts == 2) { if (machine.n_sfp == 2) {
print_string("Configuring 2nd SFP+ port\n"); print_string("Configuring 2nd SFP+ port\n");
REG_SET(0x6330, 0x00005515); REG_SET(0x6330, 0x00005515);
} }
// r6334:00000000 R6334-000001f8 RTL8373: r6334:00000000 R6334-000000ff // r6334:00000000 R6334-000001f8 RTL8373: r6334:00000000 R6334-000000ff
reg_read_m(0x6334); // Also in sdsMode_set reg_read_m(0x6334); // Also in sdsMode_set
if (nSFPPorts == 2) { if (machine.n_sfp == 2) {
sfr_mask_data(0, 0, 0xf0); sfr_mask_data(0, 0, 0xf0);
} else { } else {
sfr_mask_data(1, 0, 0x01); // Set bits 3-8, On RTL8373+8224 set bits 0-7 sfr_mask_data(1, 0, 0x01); // Set bits 3-8, On RTL8373+8224 set bits 0-7
@@ -1643,7 +1632,7 @@ void rtl8372_init(void)
// [...] // [...]
/// ///
uint16_t reg = 0x1238 + 0x300; // Port base register for the bits we set uint16_t reg = 0x1238 + 0x300; // Port base register for the bits we set
for (char i = minPort; i <= maxPort; i++) { for (char i = machine.min_port; i <= machine.max_port; i++) {
// Bit 7 (0x40) enables replacement of the RTL-VLAN tag with an 802.1Q VLAN tag // Bit 7 (0x40) enables replacement of the RTL-VLAN tag with an 802.1Q VLAN tag
REG_SET(reg, 0xe77); REG_SET(reg, 0xe77);
reg += 0x100; reg += 0x100;
@@ -1745,14 +1734,16 @@ void bootloader(void)
linkbits_last[0] = linkbits_last[1] = linkbits_last[2] = linkbits_last[3] = linkbits_last_p89 = 0; linkbits_last[0] = linkbits_last[1] = linkbits_last[2] = linkbits_last[3] = linkbits_last_p89 = 0;
print_string("Detecting CPU: "); print_string("Detecting CPU: ");
isRTL8373 = 0;
reg_read_m(0x4); reg_read_m(0x4);
if (sfr_data[1] == 0x73) { // Register was 0x83730000 if (sfr_data[1] == 0x73) { // Register was 0x83730000
print_string("RTL8373\n"); print_string("RTL8373\n");
isRTL8373 = 1; if (!machine.isRTL8373)
print_string("INCORRECT MACHINE!");
rtl8224_enable(); // Power on the RTL8224 rtl8224_enable(); // Power on the RTL8224
} else { } else {
print_string("RTL8372\n"); print_string("RTL8372\n");
if (machine.isRTL8373)
print_string("INCORRECT MACHINE!");
} }
// Print SW version // Print SW version
@@ -1774,7 +1765,7 @@ void bootloader(void)
uip_ipaddr(&uip_netmask, netmask[0], netmask[1], netmask[2], netmask[3]); uip_ipaddr(&uip_netmask, netmask[0], netmask[1], netmask[2], netmask[3]);
REG_SET(0x7f94, 0x0); REG_SET(0x7f94, 0x0);
if (isRTL8373) if (machine.isRTL8373)
rtl8373_init(); rtl8373_init();
else else
rtl8372_init(); rtl8372_init();