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Add an implementation for IGMP
This adds an implementation for trapping IGMP packets to the CPU which will identify IGMPv1/2/3 packets, but handle only v3. The implementation then inserts/updates/deletes L3 MC entries in the L3 lookup table. The entries consist of an Ipv4 Destination IP (the IPv4 MC address), a Source IP (0.0.0.0) and a Portmask. Note that this implementation is not VLAN aware, as there is no hardware support in the device. An alternative strategy is to control switching of the L2-MC packets in which the IPv4-MC packets are transported (dst-MaC is 01:00:5e:xx:yy:zz, with xx:yy:zz corresponding to bits in the Ipv4-MC address). This will allow to use VLAN-aware packet switching. While code support is there for table insert/update/deletes, some further L2 configuration is missing. There is no support for IPv6 MC, yet.
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@@ -127,6 +127,8 @@
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#define RTL837x_L2_DATA_OUT_B 0x5cd0
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#define RTL837x_L2_DATA_OUT_C 0x5cd4
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#define RTL837x_TBL_DATA_IN_A 0x5cb8
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#define RTL837x_TBL_DATA_IN_B 0x5cbc
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#define RTL837x_TBL_DATA_IN_C 0x5cc0
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#define RTL837x_PVID_BASE_REG 0x4e1c
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#define RTL837x_L2_TBL_FLUSH_CTRL 0x53d4
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@@ -186,6 +188,7 @@
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#define RTL837X_IGMP_PORT_CFG 0x52a0
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#define IGMP_MAX_GROUP 0x00ff0000
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#define IGMP_PROTOCOL_ENABLE 0x00007c00
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#define IGMP_TRAP 0x0000002a
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#define IGMP_FLOOD 0x00000015
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#define IGMP_ASIC 0x00000000
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#define RTL837X_IGMP_ROUTER_PORT 0x529c
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