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Merge pull request #696 from rwalli/fix/uptime-ram-counter
rtl8372_init: set SDS 0 to SGMII as the stock firmware does
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@@ -25,6 +25,12 @@
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## Fixed
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## Fixed
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- Time
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- `rtl8372_init()` sets SDS 0 to SGMII as the stock firmware does. The masks were 0, so on RTL8372
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boards without 10G ports both SerDes stayed off, and with SDS 0 off `RTL837X_REG_SEC_COUNTER`
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does not hold a written value: NTP never retried after a failed first attempt at boot and
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froze the clock after a sync.
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- Web UI
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- Web UI
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- Accept firmware uploads regardless of the file part's MIME type, including
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- Accept firmware uploads regardless of the file part's MIME type, including
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`application/macbinary` sent by Chrome on macOS for `.bin` files.
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`application/macbinary` sent by Chrome on macOS for `.bin` files.
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+4
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@@ -221,9 +221,11 @@ void rtl8372_init(void) __banked
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} else if(machine.n_10g == 2) {
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} else if(machine.n_10g == 2) {
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REG_SET(RTL837X_REG_SDS_MODES, 0x1ad); // Both 10g ports use SDS_QXGMII
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REG_SET(RTL837X_REG_SDS_MODES, 0x1ad); // Both 10g ports use SDS_QXGMII
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} else {
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} else {
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// Replace the reset value 0xbff (both SDS off) instead of ORing into it:
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// RTL837X_REG_SEC_COUNTER only holds a written value while SDS 0 is on
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reg_read_m(RTL837X_REG_SDS_MODES);
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reg_read_m(RTL837X_REG_SDS_MODES);
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sfr_mask_data(1, 0, 0x03);
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sfr_mask_data(1, 0xff, 0x03);
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sfr_mask_data(0, 0, 0xe2);
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sfr_mask_data(0, 0xff, 0xe2);
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reg_write_m(RTL837X_REG_SDS_MODES);
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reg_write_m(RTL837X_REG_SDS_MODES);
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}
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}
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