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Merge pull request #228 from zectaiga/add-fns1200p
Add support for FOXNEO FNS-1200P (RTL8372, 4x2.5G PoE+ + 2x SFP+)
This commit is contained in:
René van Dorst
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# FOXNEO FNS-1200P
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RTL8372-based 4×2.5G PoE+ + 2×SFP+ unmanaged switch.
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Using SPI clamp in-board is the only method for initial installation.
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### Label specifications
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- **Manufacturer**: FOXNEO
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- **Model**: FNS-1200P
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- **Ports**:
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- 4 × RJ45: 10/100/1000/2500 Mbps with PoE+
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- 2 × SFP+: 1G / 2.5G / 10G
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### What works
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- All four 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps (PoE+ is not configurable via RTLPlayground)
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- Both SFP+ ports supporting 1G, 2.5G and 10G modules
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- LEDs: amber (2.5G) and green (1G/100M/10M) per copper port; combined link/act on SFP ports
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### PCB overview
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**Board markings**
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- Top silkscreen: PCB-K0402W-U13-V2.0 / DIP-K0402WB-V2.0
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**Key components**
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- U3: SPI NOR flash, 2 MiB
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- U7: unpopulated SOP8 footprint — I2C bus (RTL8372 slave at 0x5c) is accessible from its pads, useful for register dumps
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- S1: unpopulated slide switch footprint (three through-holes used as serial console)
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Front panel
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<img src="photos/FNS-1200P/chassis-front.jpg" width="400" />
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Top side (PCB)
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<img src="photos/FNS-1200P/PCB-top.jpg" width="300" />
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### Port layout
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| Front panel position | Logical port | Physical port | Type |
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|----------------------|--------------|---------------|---------|
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| SFP left | 8 | 5 | SFP+ |
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| RJ45 1 | 4 | 1 | Copper |
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| RJ45 2 | 5 | 2 | Copper |
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| RJ45 3 | 6 | 3 | Copper |
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| RJ45 4 | 7 | 4 | Copper |
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| SFP right | 3 | 6 | SFP+ |
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### Serial console
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The PCB has three unpopulated through-holes intended for a slide switch, directly connected to UART0.
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Numbered from the left (SFP port side), the pinout is:
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| Position (left→right) | Signal | GPIO |
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|-----------------------|--------|--------------------------|
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| 1 (leftmost) | RX | GPIO32\_UART0\_RX (32) |
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| 2 (middle) | GND | GND |
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| 3 (rightmost) | TX | GPIO31\_UART0\_TX (31) |
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- **Settings**: 115200 baud / 8N1 / 3.3V TTL
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- Connect a USB-TTL adapter: adapter TX → pin 1, GND → pin 2, adapter RX → pin 3
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### LED configuration
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Copper ports use LED SET0, SFP ports use LED SET1.
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| SET | LED0 | LED2 |
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|------|--------------------------------------------------|---------------------------------------------------|
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| SET0 | Amber — lights on 2.5G link | Green — lights on 1G / 100M / 10M link |
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| SET1 | All speeds — lights on any link with activity | — |
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LED pad to physical port mapping:
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| GPIO pads | Port |
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|-----------|-------------------------|
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| GPIO8–11 | Physical port 5 (left SFP) |
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| GPIO12–14 | Physical port 1 (RJ45 1) |
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| GPIO15–17 | Physical port 2 (RJ45 2) |
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| GPIO18–20 | Physical port 3 (RJ45 3) |
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| GPIO21–23 | Physical port 4 (RJ45 4) |
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| GPIO24–27 | Physical port 6 (right SFP) |
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### SFP GPIO assignments
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| SFP | pin\_detect (ModAbs) | pin\_los | SerDes | I2C SDA | I2C SCL |
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|------------------|-----------------------------|------------------------|--------|----------------------|--------------------------|
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| Left (logical 8) | GPIO30\_ACL\_BIT3\_EN | GPIO37 | SDS1 | GPIO39\_I2C\_SDA4 | GPIO40\_I2C\_SCL3\_MDC1 |
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| Right (logical 3)| GPIO50\_I2C\_SCL2\_UART1\_TX | GPIO51\_I2C\_SDA2\_UART1\_RX | SDS0 | GPIO41\_I2C\_SDA3\_MDIO1 | GPIO40\_I2C\_SCL3\_MDC1 |
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GPIO assignments were verified by observing GPIO state changes during SFP module insertion/removal
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and cross-checked against an original firmware register dump.
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`pin_tx_disable` is GPIO\_NA on both ports (original firmware keeps all GPIOs as inputs).
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Binary file not shown.
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After Width: | Height: | Size: 1.3 MiB |
Binary file not shown.
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After Width: | Height: | Size: 531 KiB |
@@ -9,6 +9,7 @@ The following devices have been tested and are fully working:
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- No-Name ZX-SWTGW215AS, managed version of kp-9000-6hx-x, ordered on
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AliExpress as keepLINK 5+1 port managed
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- TrendNet TEG-S562 (RTL8372: 4x 2.5GBit + 2x 10GBit SFP+)
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- FNS-1200P (RTL8372: 4x 2.5GBit + 2x 10GBit SFP+)
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Other device based on RTL8272/3 that may work are described here: [Up-N-Atoms 2.5 GBit RTL Switch hacking guide]
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(https://github.com/up-n-atom/SWTG118AS)
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@@ -718,6 +718,66 @@ __code const struct machine machine = {
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void machine_custom_init(void) { }
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#elif defined MACHINE_FNS1200P
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__code const struct machine machine = {
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.machine_name = "FNS-1200P",
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.isRTL8373 = 0,
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.min_port = 3,
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.max_port = 8,
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.n_sfp = 2,
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.log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
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.phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},
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.is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
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/* Left SFP (logical 8, SDS1): GPIO30=ModAbs, GPIO37=RX_LOS */
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.sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
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.sfp_port[0].pin_los = GPIO37,
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.sfp_port[0].pin_tx_disable = GPIO_NA,
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.sfp_port[0].sds = 1,
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.sfp_port[0].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
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/* Right SFP (logical 3, SDS0): GPIO50=ModAbs, GPIO51=RX_LOS */
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.sfp_port[1].pin_detect = GPIO50_I2C_SCL2_UART1_TX,
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.sfp_port[1].pin_los = GPIO51_I2C_SDA2_UART1_RX,
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.sfp_port[1].pin_tx_disable = GPIO_NA,
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.sfp_port[1].sds = 0,
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.sfp_port[1].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 },
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.reset_pin = GPIO_NA,
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.high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
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/* Copper ports use SET0; SFP ports use SET1 */
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.port_led_set = {0, 0, 0, 1, 0, 0, 0, 0, 1},
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.led_sets = {
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{ /* SET0: copper — LED0=amber (2.5G), LED2=green (1G/100M/10M) */
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LEDS_2G5 | LEDS_LINK | LEDS_ACT,
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0,
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LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
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0
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},
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{ /* SET1: SFP — all speeds link/act */
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LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
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0,
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0, 0
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},
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},
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.led_mux_custom = 1,
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.led_mux = {
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0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, /* GPIO0-7: unused */
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0x0f, 0x0c, 0x0d, 0x0e, 0x10, 0x11, 0x12, /* GPIO8-14 */
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0x14, 0x15, 0x16, 0x18, 0x19, 0x1a, /* GPIO15-20 */
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0x1c, 0x1d, 0x1e, 0x20, 0x21, 0x22, 0x23 /* GPIO21-27 */
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},
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};
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void machine_custom_init(void)
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{
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reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 6);
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}
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#else
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#error "Please select a machine type in machine.h"
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#endif
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