diff --git a/doc/devices/FG-8GT-1SX.md b/doc/devices/FG-8GT-1SX.md
new file mode 100644
index 0000000..11b2369
--- /dev/null
+++ b/doc/devices/FG-8GT-1SX.md
@@ -0,0 +1,79 @@
+# FG-8GT-1SX
+
+Following is documentation for unmanaged switch marked as `FG-8GT-1SX`.
+
+Original software is running UART on 9600 baud rate.
+
+Using SPI clamp in-board is the only method for initial installation.
+
+### Brands
+
+| Brand | Type | Managed | PCB | Flash | Chip RTL |
+|---------|------------|---------|------------|-------------|---------------|
+| Ruiying | RY-8GT-1SX | No | FG-8GT-1SX | GD25Q80ESIG | 8373N + 8224N |
+
+### What works
+
+- All eight 2.5GBASE-T RJ45 ports at 10/100/1000/2500 Mbps
+- SFP port with 1G/2.5G/10G modules
+- LEDs
+
+### PCB overview
+
+**Board markings**
+
+- Top silkscreen: FG-8GT-1SX
+
+Top side:
+
+
+
+Bottom:
+
+
+
+### Serial console
+
+The PCB has five unpopulated through-holes near the SoC, with a white rectangle surrouding them, labeled as `J18` and a triangle points to the square shaped first pin.
+
+This is where the "expected" UART header should be soldered at, with redundant 3V3 VCC, but also with missing 0Ω resistors between TX/RX and SoC, so simply soldering a header would not work. One need also add the missing resistors or solder the pads together, while making sure not connecting unrelated pads.
+
+Numbered from the triangle, the header pinout is:
+
+| Position | Signal | GPIO | Status |
+|----------|--------|--------|-------------|
+| 1 | GND | GND | Internal |
+| 2 | TX | GPIO31 | Unconnected |
+| 3 | RX | GPIO32 | Unconnected |
+| 4 | 3V3 | - | Internal |
+| 5 | 3V3 | - | Internal |
+
+There're four resistor pads near the header.
+
+| Resistor ID | SoC Side | Header Side |
+|-------------|-------------|-------------|
+| R1240 | TX / GPIO31 | Pin 2 |
+| R1243 | 3V3 | - |
+| R1242 | 3V3 | Pin 3 |
+| R1241 | RX / GPIO32 | - |
+
+To get TX working, solder a 0Ω resistor between the pads for R1240 or solder them together.
+
+For RX However, the designer certainly made a mistake, as the SoC-side lines to the resistor expected for Rx (R1242) and 3V3 (R1241) are swapped. For RX to work, the R1241 SoC side and R1242 header side shall be connected, so either:
+
+- Solder: R1241 SoC side -> R1241 header side -> R1242 header side
+- Jump wire: R1241 SoC side -> R1242 header side
+
+Be sure not to bring R1242 SoC side to the connection as that would wire Rx to 3v3.
+
+A complete working serial header should look like following on this PCB:
+
+
+
+- **Settings**: 115200 baud / 8N1 / 3.3V TTL
+- Connect a USB-TTL adapter: adapter GND → pin 1, RX → pin 2, TX → pin 3
+
+### Power supply
+
+Input power is delivered via barell plug, `12V 1A` adapter was provided.
+
diff --git a/doc/devices/photos/FG-8GT-1SX/PCB-bottom.jpg b/doc/devices/photos/FG-8GT-1SX/PCB-bottom.jpg
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diff --git a/doc/devices/photos/FG-8GT-1SX/Serial.png b/doc/devices/photos/FG-8GT-1SX/Serial.png
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diff --git a/doc/supported_devices.md b/doc/supported_devices.md
index 3a8c462..239593d 100644
--- a/doc/supported_devices.md
+++ b/doc/supported_devices.md
@@ -23,6 +23,7 @@ The following devices have been tested and are fully working:
| Mokerlink| 2G040210GSM | Yes | [2M-PCB43-V1.1](devices/2M-PCB43-V1.1.md) | | 4 + 2 |
| Mokerlink| ZX-SWTGW218AS | Yes | [SWTG118AS-V2.0-16029](devices/SWTGW218AS.md) | 2M | 8 + 1 |
| Ruiying | RY-4GT-2SX | No | [FG-4GT-2SX_V2.0](devices/FG-4GT-2SX_V2.0.md) | 4M | 4 + 2 |
+| Ruiying | RY-8GT-1SX | No | [FG-8GT-1SX](devices/FG-8GT-1SX.md) | 1M | 8 + 1 |
| Sodola | SL-SWTG124AS-D | Yes | [SWTG024AS-v2.0-17452](devices/SWTG024AS.md) | 2M | 4 + 2 |
| Steamemo | IG204-V1 | No | [PB-2131](devices/STEAMEMO_IG204_V1.md) | | 4 + 2 |
| TrendNet | TEG-S562 | No | [TEG-S563/EU H/W: V1.0R](devices/TEG-S562.md) | 2M | 4 + 2 |
diff --git a/machine.c b/machine.c
index 7f4a512..e786305 100644
--- a/machine.c
+++ b/machine.c
@@ -1094,6 +1094,51 @@ __code const struct machine machine = {
},
};
+#elif defined MACHINE_FG_8GT_1SX
+__code const struct machine machine = {
+ .machine_name = "FG-8GT-1SX",
+ .isRTL8373 = 1,
+ .min_port = 0,
+ .max_port = 8,
+ .n_sfp = 1,
+ .log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
+ .phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
+ .is_sfp = {0, 0, 0, 0, 0, 0, 0, 0, 1},
+ .sfp_port[0].pin_detect = GPIO38,
+ .sfp_port[0].pin_los = GPIO_NA,
+ .sfp_port[0].pin_tx_disable = GPIO_NA,
+ .sfp_port[0].sds = 1,
+ .sfp_port[0].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
+ .reset_pin = GPIO_NA,
+ .high_leds = { .mux = LED_27 | LED_28_SYS | LED_29, .enable = LED_28_SYS | LED_29 },
+ .port_led_set = {0, 0, 0, 0, 0, 0, 0, 0, 1},
+ .led_sets = {
+ /*
+ Ports 1-8: Left Amber 10/100/1000MBit (Vendor no 10M, but we add it)
+ Right Green 2.5GBit
+ SFP-port: Any speed
+ */
+ {
+ LEDS_2G5 | LEDS_LINK | LEDS_ACT,
+ LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
+ 0,
+ 0,
+ },
+ {
+ LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
+ 0,
+ 0,
+ 0,
+ },
+ },
+ .led_mux_custom = 1,
+ .led_mux = {
+ 0x00, 0x01, 0x04, 0x05, 0x08, 0x09, 0x0c, 0x09, 0x0d, 0x10,
+ 0x11, 0x0e, 0x14, 0x11, 0x12, 0x15, 0x15, 0x16, 0x18, 0x19,
+ 0x1a, 0x19, 0x1d, 0x1e, 0x1c, 0x1d, 0x20, 0x21,
+ },
+};
+
#else
#error "Please select a machine type in machine.h"
#endif
diff --git a/machine.h b/machine.h
index 9efa675..1750af1 100644
--- a/machine.h
+++ b/machine.h
@@ -42,6 +42,7 @@
// #define MACHINE_SWTG024AS_A_2_0_1_5C_1SFP
// #define MACHINE_SWTG024AS_V2_0
// #define MACHINE_FG_4GT_2SX_V2_0
+// #define MACHINE_FG_8GT_1SX
typedef struct {
// GPIO pins for SDA/SCL