flash: add the dummy cycles required by the security register read

Opcode 0x48 outputs 8 dummy clocks between the address and the first data
byte. flash_configure_sio() sets DUMMYCYCLES to 0 and flash_read_security()
never raises it, so the controller captures the dummy slot as the first of
its four data bytes while the address still advances by four. The printed
output therefore shows 0xff in place of every fourth byte and skips one
content byte per transfer. flash_read_uid() already sets DUMMYCYCLES for
opcode 0x4b, which needs the same allowance.

rtl837x_flash.c

@@ -269,6 +269,7 @@ void flash_read_security(void)
 
 	// Set slow read mode
 	SFR_FLASH_CMD_R = CMD_READ_SECURITY_REGS;		// read security register
+	SFR_FLASH_DUMMYCYCLES = 8;
 
 	// Transfer 4 bytes (command + 3byte address)
 	SFR_FLASH_TCONF = 4;