Demagic PHY_MMD31, 0xa432 to PHY_MMD31, PHY_MMD31_PHYCR2

This commit is contained in:
René van Dorst
2026-01-26 22:58:57 +01:00
parent 6495310ba9
commit a134335308
2 changed files with 2 additions and 1 deletions
+1
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@@ -39,6 +39,7 @@
#define PHY_MMD31_FEDCR 0xa400 #define PHY_MMD31_FEDCR 0xa400
#define PHY_MMD31_GBCR 0xa412 #define PHY_MMD31_GBCR 0xa412
#define PHY_MMD31_GANLPAR 0xa414 #define PHY_MMD31_GANLPAR 0xa414
#define PHY_MMD31_PHYCR2 0xa432
#define PHY_MMD31_PHYSR 0xa434 #define PHY_MMD31_PHYSR 0xa434
+1 -1
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@@ -102,7 +102,7 @@ void phy_config(uint8_t phy) __banked
// p031f.a432:0811 P000008.1f00a432:0831 // p031f.a432:0811 P000008.1f00a432:0831
// PHYCR2 PHY Specific Control Register 2, MMD 31. 0xA432), set bit 5: enable EEE // PHYCR2 PHY Specific Control Register 2, MMD 31. 0xA432), set bit 5: enable EEE
phy_modify(phy, PHY_MMD31, 0xa432, 0x0000, 0x0020); phy_modify(phy, PHY_MMD31, PHY_MMD31_PHYCR2, 0x0000, 0x0020);
// p0307.003e:0000 P000008.0700003e:0001 // p0307.003e:0000 P000008.0700003e:0001
// EEE avertisment 2 register MMMD 7.0x003e, set bit 0: 2.5G has EEE capability // EEE avertisment 2 register MMMD 7.0x003e, set bit 0: 2.5G has EEE capability