diff --git a/doc/devices/SWTG024AS-V2.1.0.md b/doc/devices/SWTG024AS-V2.1.0.md new file mode 100644 index 00000000..1ab412c6 --- /dev/null +++ b/doc/devices/SWTG024AS-V2.1.0.md @@ -0,0 +1,35 @@ +### SWTG024AS-V2.1 + +## Brands +|Brand|Type|Managed|PCB|Flash|Chip RTL| +|---|---|---|---|---|---| +| Xikestor | SKS3200-4E2X | Yes | PCB-SWTG024AS-V2.1.0_19023 | 25Q16A | 8272 | +| Solola | SL902-SWTG024AS | Yes | PCB-SWTG024AS-V2.1.0_19023 | | 8272 | + +### Label specifications + +- **Ports**: + - 4 × RJ45: 10/100/1000/2500 Mbps + - 2 × SFP+: 1000/2500/10000 Mbps +- **Power**: 12V DC + +#### Xikestore SKS-3200-4E2X label + + +### What works +- ALL 2.5GBASE-T RJ45 ports work at 10/100/1000/2500 Mbps +- The SFP+ port supports 1G, 2.5G and 10G modules. +- LEDs work with the same indiciations as the OEM firmware. + +### PCB overview + +**Board markings** +- Top silkscreen: PCB-SWTG024AS-V2.1.0 + +Top side + + + +Bottom + + \ No newline at end of file diff --git a/doc/devices/photos/SWTG024AS-V2.1.0/label.jpg b/doc/devices/photos/SWTG024AS-V2.1.0/label.jpg new file mode 100644 index 00000000..5941afd3 Binary files /dev/null and b/doc/devices/photos/SWTG024AS-V2.1.0/label.jpg differ diff --git a/doc/devices/photos/SWTG024AS-V2.1.0/pcb-bottom.jpg b/doc/devices/photos/SWTG024AS-V2.1.0/pcb-bottom.jpg new file mode 100644 index 00000000..88ac88a3 Binary files /dev/null and b/doc/devices/photos/SWTG024AS-V2.1.0/pcb-bottom.jpg differ diff --git a/doc/devices/photos/SWTG024AS-V2.1.0/pcb-top.jpg b/doc/devices/photos/SWTG024AS-V2.1.0/pcb-top.jpg new file mode 100644 index 00000000..89bdf1f3 Binary files /dev/null and b/doc/devices/photos/SWTG024AS-V2.1.0/pcb-top.jpg differ diff --git a/doc/supported_devices.md b/doc/supported_devices.md index 08245ea5..47de607f 100644 --- a/doc/supported_devices.md +++ b/doc/supported_devices.md @@ -44,10 +44,12 @@ The following devices have been tested and are fully working: | Ruiying | RY-8GT-1SX | No | [FG-8GT-1SX](devices/FG-8GT-1SX.md) | 1M | 8 + 1 | | SICSOLINK| SL-G0402F | No | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md) | | 4 + 2 | | Sodola | SL-SWTG124AS-D | Yes | [SWTG024AS-v2.0-17452](devices/SWTG024AS.md) | 2M | 4 + 2 | +| Sodola | SL902-SWTG024AS | Yes | [SWTG024AS-v2.1.0](devices/SWTG024AS-V2.1.0.md) | 2M | 4 + 2 | | Steamemo | IG204-V1 | No | [PB-2131](devices/STEAMEMO_IG204_V1.md) | | 4 + 2 | | TRENDnet | TEG-S562 | No | [TEG-S563/EU H/W: V1.0R](devices/TEG-S562.md) | 2M | 4 + 2 | | XikeStor | SKS3200M-4GPY2XF| Yes | [SWTG024AS-v1.0](devices/SWTG024AS.md) | | 4 + 2 | | XikeStor | SKS3200-8E1X | Yes | [SWTG118AS-V2.1-17462](devices/SWTGW218AS.md) | 2M | 8 + 1 | +| XikeStor | SKS3200-4E2X | Yes | [SWTG024AS-v2.1.0](devices/SWTG024AS-V2.1.0.md) | 2M | 4 + 2 | | YuanLey | YS25-0402 | No | [PCB-K0402WS-V1.0](devices/PCB-K0402WS-V1.0.md) | 2M | 4 + 2 | | YuanLey | YS25-0402 | No | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md) | 2M | 4 + 2 | | YuanLey | YS25-0402M | Yes | [SIRIVISION_S25G2206FP_V1_1](devices/SIRIVISION_S25G2206FP_V1_1.md) | 2M | 4 + 2 | diff --git a/machine/PCB_SWTG024AS_V2_1_0.c b/machine/PCB_SWTG024AS_V2_1_0.c new file mode 100644 index 00000000..203724d3 --- /dev/null +++ b/machine/PCB_SWTG024AS_V2_1_0.c @@ -0,0 +1,54 @@ +#include "machine_defs.h" + +__code const struct machine machine = { + MACHINE_COMMON_SETTING, + .n_sfp = 2, + .log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6}, + .phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0}, + .is_sfp = {0, 0, 0, 1, 0, 0, 0, 0, 2}, + + // SFP port on SDS0 / logical port 3 + .sfp_port[0].pin_detect = GPIO37, + .sfp_port[0].pin_los = GPIO_NA, + .sfp_port[0].pin_tx_disable = GPIO_NA, + .sfp_port[0].sds = 0, + .sfp_port[0].i2c = I2CBUS( GPIO41_I2C_SDA3_MDIO1, GPIO40_I2C_SCL3_MDC1 ), + + // SFP port on SDS1 / logical port 8 + .sfp_port[1].pin_detect = GPIO38, + .sfp_port[1].pin_los = GPIO_NA, + .sfp_port[1].pin_tx_disable = GPIO_NA, + .sfp_port[1].sds = 1, + .sfp_port[1].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ), + + .reset_pin = GPIO_NA, + .high_leds = { .mux = LED_28_SYS | LED_29, .enable = LED_27 | LED_28_SYS | LED_29 }, + .port_led_set = { 0, 0, 0, 1, 0, 0, 0, 0, 1 }, + .led_sets = { + { + LEDS_2G5 | LEDS_LINK | LEDS_ACT, + LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT, + 0, + 0 + }, + { + LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_LINK | LEDS_ACT, + LEDS_10G | LEDS_LINK | LEDS_ACT, + 0, + 0 + }, + }, + + .led_mux_custom = 1, + .led_mux = { + 0x00, 0x01, 0x04, 0x05, 0x08, + 0x09, 0x0c, 0x3f, 0x0d, 0x10, + 0x11, 0x3f, 0x14, 0x3f, 0x3f, + 0x15, 0x3f, 0x3f, 0x18, 0x3f, + 0x3f, 0x19, 0x3f, 0x3f, 0x1c, + 0x1d, 0x20, 0x21 + }, +}; + +// Boot 1-4G 6Y +// 1-4Y 5G 6Y \ No newline at end of file diff --git a/machine/PCB_SWTG024AS_V2_1_0.h b/machine/PCB_SWTG024AS_V2_1_0.h new file mode 100644 index 00000000..4cbd8a99 --- /dev/null +++ b/machine/PCB_SWTG024AS_V2_1_0.h @@ -0,0 +1,7 @@ +#ifndef _MACHINE_SWTG024AS_V2_1_0_H_ +#define _MACHINE_SWTG024AS_V2_1_0_H_ + +#define MACHINE_MODEL "SWTG024AS-V2.1.0" +#define MACHINE_CHIPSET RTL8372 + +#endif \ No newline at end of file diff --git a/machine/PCB_SWTG024AS_V2_1_0_init.c b/machine/PCB_SWTG024AS_V2_1_0_init.c new file mode 100644 index 00000000..fbc6bbe3 --- /dev/null +++ b/machine/PCB_SWTG024AS_V2_1_0_init.c @@ -0,0 +1,22 @@ +#include "machine_init_defs.h" + +void machine_custom_init(void) __banked +{ + // Stock LED_MODE: [8:5]=1, [12:9]=2 (leds_setup hard-codes 5/3); same as clearing bits 7 and 9 + reg_bit_set(RTL837X_REG_LED_MODE, 17); + reg_bit_clear(RTL837X_REG_LED_MODE, 9); + reg_bit_clear(RTL837X_REG_LED_MODE, 7); + + // Stock LED_GLB_IO_EN [27:0] = 0x0f249740: enable LED pins 6, 8, 9, 10, 12, 15, 18, 21, 24-27 + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 6); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 8); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 9); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 10); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 12); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 15); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 18); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 21); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 24); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 25); + reg_bit_set(RTL837X_REG_LED_GLB_IO_EN, 26); +} \ No newline at end of file