mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-10-29 17:54:14 +08:00
nic: Fix incorrect wrap handling of RX circular buffer
nic: move other nic functions into the dedicated nic files uip: alloc buffer multiple of 8 bytes Signed-off-by: João Silva <jgc3silva@gmail.com>
This commit is contained in:
18 files changed
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-117
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@@ -29,6 +29,7 @@ TESTS = $(BUILDDIR)/test_cmd_editor \
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$(BUILDDIR)/test_page_json \
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$(BUILDDIR)/test_httpd_tx \
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$(BUILDDIR)/test_tick_gate \
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$(BUILDDIR)/test_nic_rx \
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$(BUILDDIR)/test_lacp
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# The table tests link the register mock and one environment file; stub/
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@@ -52,6 +53,11 @@ $(BUILDDIR)/test_port_tables: test_port_tables.c $(TABLE_ENV) hw_mock.h | $(BUIL
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$(BUILDDIR)/test_tick_gate: test_tick_gate.c support.c $(SRCROOT)/cmd_editor.c | $(BUILDDIR)
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$(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
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# Exercise the production RX ring reader; only the hardware DMA edge is mocked.
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# Discard unused TX functions so this RX fixture needs no TX register mocks.
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$(BUILDDIR)/test_nic_rx: test_nic_rx.c $(SRCROOT)/rtl837x_nic.c $(SRCROOT)/rtl837x_nic.h | $(BUILDDIR)
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$(CC) $(CFLAGS) -ffunction-sections -fdata-sections $(filter %.c,$^) -o $@ $(LDFLAGS) -Wl,--gc-sections
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$(BUILDDIR)/test_page_json: test_page_json.c $(TABLE_ENV) hw_mock.h | $(BUILDDIR)
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$(CC) $(CFLAGS) $(filter %.c,$^) -o $@ $(LDFLAGS)
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@@ -112,7 +112,7 @@ void read_reg_timer(uint32_t *tmr) { *tmr = 0; }
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/* uip-conf.h asks uIP not to define the packet buffer: on the switch it lives
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* at a fixed XDATA address, so the bench provides the storage itself. */
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u8_t uip_buf[UIP_BUFSIZE + 2];
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u8_t uip_buf[UIP_CONF_BUFFER_ALLOC_SIZE];
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uint16_t strlen_x(const char *s) { return (uint16_t)strlen(s); }
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+1
-1
@@ -11,7 +11,7 @@
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/* ---------- platform mocks ---------- */
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uint8_t uip_buf[UIP_CONF_BUFFER_SIZE + 2];
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uint8_t uip_buf[UIP_CONF_BUFFER_ALLOC_SIZE];
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uint16_t uip_len;
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struct uip_eth_addr uip_ethaddr = { .addr = {0x02,0x11,0x22,0x33,0x44,0x55} };
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const struct machine machine = { .min_port = 0, .max_port = 7,
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@@ -0,0 +1,277 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <string.h>
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#include "rtl837x_common.h"
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#include "rtl837x_regs.h"
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#include "rtl837x_nic.h"
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uint8_t rx_headers[16];
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/* Model the DMA behavior reported on SWTGW218AS: a transfer starting inside
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* the RX ring wraps at its end. An initial address outside the ring instead
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* reads flat ASIC memory, including stale TX bytes at 0x2800. */
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static uint8_t asic[0x8000];
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static struct {
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uint8_t before[16];
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uint8_t data[UIP_CONF_BUFFER_ALLOC_SIZE];
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uint8_t after[16];
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} destination;
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struct dma_request {
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uint8_t *buffer;
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uint16_t ring;
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uint8_t words;
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};
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static struct dma_request requests[8];
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static unsigned request_count, fail_request;
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static int failures;
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static void check(bool condition, const char *what)
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{
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if (!condition) {
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printf(" FAIL: %s\n", what);
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failures++;
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}
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}
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bool nic_rx_dma(uint8_t *buffer, uint16_t ring, uint8_t words)
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{
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size_t bytes = (size_t)words * 8;
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unsigned call = ++request_count;
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if (call <= sizeof(requests) / sizeof(requests[0]))
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requests[call - 1] = (struct dma_request){ buffer, ring, words };
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if (call == fail_request || !words || (size_t)ring + bytes > sizeof(asic))
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return false;
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if (ring < RTL837X_NIC_RX_RING_BYTES) {
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for (size_t i = 0; i < bytes; i++)
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buffer[i] = asic[((size_t)ring + i) % RTL837X_NIC_RX_RING_BYTES];
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} else {
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memcpy(buffer, asic + ring, bytes);
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}
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return true;
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}
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static void fixture_reset(void)
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{
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memset(asic, 0xd7, sizeof(asic));
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memset(&destination, 0xa5, sizeof(destination));
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memset(rx_headers, 0x6c, sizeof(rx_headers));
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memset(requests, 0, sizeof(requests));
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request_count = 0;
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fail_request = 0;
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}
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static bool filled(const uint8_t *data, size_t len, uint8_t value)
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{
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while (len--)
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if (*data++ != value)
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return false;
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return true;
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}
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static bool guards_intact(void)
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{
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return filled(destination.before, sizeof(destination.before), 0xa5)
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&& filled(destination.after, sizeof(destination.after), 0xa5);
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}
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static bool requests_start_in_rx_ring(void)
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{
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for (unsigned i = 0; i < request_count; i++) {
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if (i >= sizeof(requests) / sizeof(requests[0]) || !requests[i].words
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|| (requests[i].ring & 7)
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|| requests[i].ring >= RTL837X_NIC_RX_RING_BYTES)
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return false;
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}
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return true;
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}
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static void ring_write(uint16_t offset, const uint8_t *data, size_t len)
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{
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for (size_t i = 0; i < len; i++)
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asic[((size_t)offset + i) % RTL837X_NIC_RX_RING_BYTES] = data[i];
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}
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static void put_descriptor(uint16_t offset, uint16_t len)
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{
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uint8_t descriptor[8] = { 0x03, 0x00, 0xb0, 0xc8, len, len >> 8, 0, 0 };
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ring_write(offset, descriptor, sizeof(descriptor));
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}
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static void expect_descriptor(uint16_t len)
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{
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uint8_t descriptor[8] = { 0x03, 0x00, 0xb0, 0xc8, len, len >> 8, 0, 0 };
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check(!memcmp(rx_headers, descriptor, sizeof(descriptor)), "the first eight descriptor bytes stay intact");
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}
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static void pattern(uint8_t *data, size_t len)
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{
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for (size_t i = 0; i < len; i++)
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data[i] = (uint8_t)(i * 37 + (i >> 8) + 0x13);
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}
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static void t_last_descriptor(void)
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{
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static const uint8_t root_bpdu[68] = {
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0x01, 0x80, 0xc2, 0, 0, 0, 0xd0, 0xea, 0x11, 0x12, 0x34, 0x56,
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0x88, 0x99, 0x04, 0, 0, 0, 0, 8,
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0, 0x27, 0x42, 0x42, 3, 0, 0, 2, 2, 0x3c,
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0x10, 0, 0xd0, 0xea, 0x11, 0x12, 0x34, 0x56, 0, 0, 0, 0,
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0x10, 0, 0xd0, 0xea, 0x11, 0x12, 0x34, 0x56, 0x80, 0x0a,
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0, 0, 0x14, 0, 2, 0, 0x0f, 0, 0
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};
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uint8_t stale_tx[72] = { 0 };
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uint16_t last = RTL837X_NIC_RX_RING_BYTES - 8;
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printf("[test] the last RX descriptor wraps its BPDU payload before DMA\n");
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fixture_reset();
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put_descriptor(last, sizeof(root_bpdu));
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ring_write(0, root_bpdu, sizeof(root_bpdu));
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memcpy(stale_tx, root_bpdu, sizeof(root_bpdu));
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stale_tx[17] = 0x20;
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stale_tx[19] = 1; /* retained TX destination mask, not ingress port 8 */
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memcpy(asic + RTL837X_NIC_RX_RING_BYTES, stale_tx, sizeof(stale_tx));
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check(nic_rx_header(last), "the final descriptor is readable");
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expect_descriptor(sizeof(root_bpdu));
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check(nic_rx_packet(destination.data, last + 8), "a payload address at the RX ring limit wraps to zero");
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check(!memcmp(destination.data, root_bpdu, sizeof(root_bpdu)), "the complete upstream BPDU is read instead of stale TX bytes");
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check(destination.data[19] == 8, "the upstream ingress tag survives the ring boundary");
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check(request_count == 2 && requests[0].ring == last && requests[0].words == 1
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&& requests[1].ring == 0 && requests[1].words == 9,
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"descriptor and rounded payload DMA both start in the RX ring");
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check(requests_start_in_rx_ring() && guards_intact(), "DMA starts inside the RX ring and preserves destination guards");
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expect_descriptor(sizeof(root_bpdu));
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}
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static void t_payload_layouts(void)
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{
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static const struct {
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uint16_t descriptor, len;
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} cases[] = {
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{ 0x0100, 8 }, { 0x0100, 16 }, { 0x0100, 64 },
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{ 0x0100, 68 }, { 0x0100, 72 },
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{ RTL837X_NIC_RX_RING_BYTES - 16, 8 },
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{ RTL837X_NIC_RX_RING_BYTES - 16, 16 },
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{ RTL837X_NIC_RX_RING_BYTES - 16, 68 },
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{ RTL837X_NIC_RX_RING_BYTES - 72, 64 },
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{ RTL837X_NIC_RX_RING_BYTES - 48, 68 }
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};
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uint8_t frame[80];
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printf("[test] payload DMA handles ordinary, exact-boundary, and crossing frames\n");
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pattern(frame, sizeof(frame));
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for (unsigned i = 0; i < sizeof(cases) / sizeof(cases[0]); i++) {
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size_t rounded = (cases[i].len + 7u) & ~7u;
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fixture_reset();
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put_descriptor(cases[i].descriptor, cases[i].len);
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ring_write(cases[i].descriptor + 8, frame, rounded);
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check(nic_rx_header(cases[i].descriptor), "the descriptor transfer completes");
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check(nic_rx_packet(destination.data, cases[i].descriptor + 8), "the payload transfer completes");
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check(!memcmp(destination.data, frame, rounded), "every payload and permitted padding byte reaches the correct destination offset");
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check(filled(destination.data + rounded, sizeof(destination.data) - rounded, 0xa5), "DMA does not write beyond the rounded frame");
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check(request_count == 2, "the payload uses one DMA request even when crossing the ring end");
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check(requests_start_in_rx_ring() && guards_intact(), "crossing DMA starts inside the RX ring and preserves destination guards");
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expect_descriptor(cases[i].len);
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}
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}
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static void t_maximum_frames(void)
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{
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uint8_t frame[(UIP_CONF_BUFFER_SIZE + 7u) & ~7u];
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static const uint16_t lengths[] = { 1, 7, 1549, 1550, 1551, 1552, 1553, 1554, 1555, 1556 };
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printf("[test] rounded maximum frames fit without overwriting their descriptor\n");
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pattern(frame, sizeof(frame));
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for (unsigned layout = 0; layout < 3; layout++) {
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uint16_t descriptor = layout == 0 ? 0x0100
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: RTL837X_NIC_RX_RING_BYTES - (layout == 1 ? 16 : 8);
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for (unsigned i = 0; i < sizeof(lengths) / sizeof(lengths[0]); i++) {
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uint16_t len = lengths[i];
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size_t rounded = (len + 7u) & ~7u;
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fixture_reset();
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put_descriptor(descriptor, len);
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ring_write(descriptor + 8, frame, rounded);
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check(nic_rx_header(descriptor), "the maximum-frame descriptor transfer completes");
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check(nic_rx_packet(destination.data, descriptor + 8), "all supported frame lengths fit the destination");
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check(!memcmp(destination.data, frame, rounded), "the full rounded frame is preserved");
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check(filled(destination.data + rounded, sizeof(destination.data) - rounded, 0xa5), "rounded DMA writes no bytes beyond the available destination");
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check(request_count == 2, "maximum frames use a single payload DMA request");
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check(requests_start_in_rx_ring() && guards_intact(), "rounded DMA starts inside the RX ring and preserves destination guards");
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expect_descriptor(len);
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}
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}
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}
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static void t_invalid_frames(void)
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{
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static const uint16_t invalid_lengths[] = { 0, UIP_CONF_BUFFER_SIZE + 1, 0xffff };
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static const uint16_t invalid_pointers[] = { 1, 7, RTL837X_NIC_RX_RING_BYTES + 8, 0xfff8 };
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printf("[test] invalid lengths and DMA addresses are rejected before transfer\n");
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for (unsigned i = 0; i < sizeof(invalid_lengths) / sizeof(invalid_lengths[0]); i++) {
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fixture_reset();
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rx_headers[4] = invalid_lengths[i];
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rx_headers[5] = invalid_lengths[i] >> 8;
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check(!nic_rx_packet(destination.data, 0x0100), "unsupported or overflowing lengths are rejected");
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check(!request_count && filled(destination.data, sizeof(destination.data), 0xa5) && guards_intact(),
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"invalid frame lengths cause no DMA or destination changes");
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}
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for (unsigned i = 0; i < sizeof(invalid_pointers) / sizeof(invalid_pointers[0]); i++) {
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fixture_reset();
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rx_headers[4] = 68;
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rx_headers[5] = 0;
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check(!nic_rx_header(invalid_pointers[i]), "an invalid descriptor address is rejected");
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check(!nic_rx_packet(destination.data, invalid_pointers[i]), "an invalid payload address is rejected");
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check(!request_count && guards_intact(), "invalid addresses never reach DMA");
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}
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fixture_reset();
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check(!nic_rx_header(RTL837X_NIC_RX_RING_BYTES) && !request_count,
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"a descriptor at the ring limit is rejected rather than wrapped");
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}
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static void t_dma_failure(void)
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{
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uint8_t frame[UIP_CONF_BUFFER_ALLOC_SIZE];
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static const uint16_t lengths[] = { 68, UIP_CONF_BUFFER_SIZE };
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printf("[test] failed descriptor and single-payload DMA transfers propagate failure\n");
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fixture_reset();
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fail_request = 1;
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check(!nic_rx_header(0x0100) && request_count == 1, "descriptor DMA failure reaches the caller");
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pattern(frame, sizeof(frame));
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for (unsigned layout = 0; layout < 3; layout++) {
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uint16_t descriptor = layout == 0 ? 0x0100
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: RTL837X_NIC_RX_RING_BYTES - (layout == 1 ? 16 : 8);
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for (unsigned i = 0; i < sizeof(lengths) / sizeof(lengths[0]); i++) {
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uint16_t len = lengths[i];
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fixture_reset();
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put_descriptor(descriptor, len);
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ring_write(descriptor + 8, frame, (len + 7u) & ~7u);
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check(nic_rx_header(descriptor), "the descriptor precedes the injected payload failure");
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fail_request = 2;
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check(!nic_rx_packet(destination.data, descriptor + 8), "payload DMA failure reaches the caller");
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check(request_count == fail_request, "a failed payload DMA is not retried or split");
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check(filled(destination.data, sizeof(destination.data), 0xa5) && guards_intact(),
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"an injected failure before DMA preserves the destination and guards");
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expect_descriptor(len);
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}
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}
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}
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int main(void)
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{
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t_last_descriptor();
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t_payload_layouts();
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t_maximum_frames();
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t_invalid_frames();
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t_dma_failure();
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if (failures) {
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printf("%d NIC RX check(s) failed\n", failures);
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return 1;
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}
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puts("all NIC RX checks passed");
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return 0;
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}
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Reference in new issue
Block a user