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another almost working state. port order is wrong and leds are not correct, but ports are all working

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Andreas Erhard committed 2026-09-21 01:16:16 +02:00
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doc/devices/ONT-S207CW-62TS-SE.md
+56 -81
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@@ -8,7 +8,7 @@ ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM are **managed switches with identi
- **Ports:** 4x 2.5G RJ45 + 2x 10G SFP+ - **Ports:** 4x 2.5G RJ45 + 2x 10G SFP+
- **Console:** 115200 baud (RTLPlayground firmware) / 9600 baud (stock firmware) - **Console:** 115200 baud (RTLPlayground firmware) / 9600 baud (stock firmware)
**Note:** These devices use **PCB-SWTG024AS-A-2.0.1** but with different port mapping and LED configuration than the stock PCB-SWTG024AS-A-2.0.1 firmware. Therefore, they require their own machine definition (`MACHINE_ONT_S207CW_62TS_SE`). **Note:** These devices use **PCB-SWTG024AS-A-2.0.1** hardware. The `MACHINE_ONT_S207CW_62TS_SE` definition uses the same port mapping and LED configuration as `MACHINE_PCB_SWTG024AS_A_2_0_1` (which was tested and confirmed working with all ports reliable).
## Device Photos ## Device Photos
@@ -74,104 +74,81 @@ ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM are **managed switches with identi
### machine.h ### machine.h
```c ```c
// #define MACHINE_PCB_SWTG024AS_A_2_0_1 // Different port/LED mapping // #define MACHINE_PCB_SWTG024AS_A_2_0_1 // Same config, confirmed working
#define MACHINE_ONT_S207CW_62TS_SE #define MACHINE_ONT_S207CW_62TS_SE
// ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM // ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM
// RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB) // RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB)
// Physical ports: 1-4 = RJ45, 5-6 = SFP // Using PCB_SWTG024AS_A_2_0_1 config (all ports reliable, order was wrong)
// Logical ports: 0-3 = RJ45 (phys 1-4), 4-5 = SFP (phys 5-6) // Physical ports: 1-4 = RJ45, 5 = SFP (SDS0), 6 = SFP (SDS1)
// LED colors: RJ45 = Green@2.5G, Orange@1G/100M/10M; SFP = Green@10G, Orange@1G/2.5G // Logical ports: 3 = SFP (SDS0), 4-7 = RJ45, 8 = SFP (SDS1)
// LED mux: Original firmware values (0x08144040, 0x1037f309, ...)
``` ```
### machine.c Configuration ### machine.c Configuration
```c Uses the same configuration as `MACHINE_PCB_SWTG024AS_A_2_0_1`:
#elif defined MACHINE_ONT_S207CW_62TS_SE
__code const struct machine machine = {
.machine_name = "ONT-S207CW-62TS-SE / Binardat 2G06-04210GSM",
.isRTL8373 = 0, // RTL8372N
.mac_flash_offset = 0x1FC000, // MAC address storage offset
.min_port = 0, // First logical port
.max_port = 5, // Last logical port (0-5 = 6 ports)
.n_sfp = 2,
// Physical to logical port mapping:
// Physical port 1 -> Logical port 0 (RJ45)
// Physical port 2 -> Logical port 1 (RJ45)
// Physical port 3 -> Logical port 2 (RJ45)
// Physical port 4 -> Logical port 3 (RJ45)
// Physical port 5 -> Logical port 4 (SFP on SDS0)
// Physical port 6 -> Logical port 5 (SFP on SDS1)
.log_to_phys_port = {1, 2, 3, 4, 5, 6, 0, 0, 0},
.phys_to_log_port = {0, 1, 2, 3, 4, 5, 0, 0, 0},
.is_sfp = {0, 0, 0, 0, 1, 1, 0, 0, 0}, // Logical ports 4,5 are SFP
// SFP port on SDS0 / logical port 4 / physical port 5 ```c
#elif defined MACHINE_PCB_SWTG024AS_A_2_0_1
__code const struct machine machine = {
.machine_name = "PCB-SWTG024AS-A-2.0.1",
.isRTL8373 = 0,
.min_port = 3,
.max_port = 8,
.n_sfp = 2,
.log_to_phys_port = {0, 0, 0, 5, 1, 2, 3, 4, 6},
.phys_to_log_port = {4, 5, 6, 7, 3, 8, 0, 0, 0},
.is_sfp = {0, 0, 0, 1, 0, 0, 0, 0, 2},
// SFP port on SDS0 / logical port 3
.sfp_port[0].pin_detect = GPIO37, .sfp_port[0].pin_detect = GPIO37,
.sfp_port[0].pin_los = GPIO_NA,
.sfp_port[0].pin_tx_disable = GPIO_NA,
.sfp_port[0].sds = 0, .sfp_port[0].sds = 0,
.sfp_port[0].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 }, .sfp_port[0].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 },
// SFP port on SDS1 / logical port 5 / physical port 6 // SFP port on SDS1 / logical port 8
.sfp_port[1].pin_detect = GPIO38, .sfp_port[1].pin_detect = GPIO38,
.sfp_port[1].pin_los = GPIO_NA,
.sfp_port[1].pin_tx_disable = GPIO_NA,
.sfp_port[1].sds = 1, .sfp_port[1].sds = 1,
.sfp_port[1].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 }, .sfp_port[1].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
.reset_pin = GPIO_NA, .reset_pin = GPIO_NA,
.high_leds = { .mux = LED_28_SYS | LED_29, .enable = LED_27 | LED_28_SYS | LED_29 }, .high_leds = { .mux = LED_28_SYS | LED_29, .enable = LED_27 | LED_28_SYS | LED_29 },
.port_led_set = { 0, 0, 0, 0, 1, 1, 0, 0, 0 }, // RJ45=SET0, SFP=SET1 .port_led_set = { 0, 0, 0, 1, 0, 0, 0, 0, 1},
/* LED Configuration from original firmware:
* RJ45 ports (logical 0-3, physical 1-4): SET0
* LED0 (Green): 2.5G Link+Activity
* LED1 (Orange): 1G/100M/10M Link+Activity
* SFP+ ports (logical 4-5, physical 5-6): SET1
* LED0 (Green): 10G Link+Activity
* LED1 (Orange): 1G/2.5G Link+Activity
*/
.led_sets = { .led_sets = {
{ // SET0: RJ45 Ports {
LEDS_2G5 | LEDS_LINK | LEDS_ACT, // Green: 2.5G LEDS_2G5 | LEDS_LINK | LEDS_ACT,
LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT, // Orange: 1G/100M/10M LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
0, LEDS_DUPLEX,
0 }, LEDS_2G5 | LEDS_LINK | LEDS_ACT
{ // SET1: SFP+ Ports },
LEDS_10G | LEDS_LINK | LEDS_ACT, // Green: 10G {
LEDS_2G5 | LEDS_1G | LEDS_LINK | LEDS_ACT, // Orange: 1G/2.5G LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_LINK | LEDS_ACT,
0, LEDS_10G | LEDS_LINK | LEDS_ACT,
0 }, LEDS_2G5 | LEDS_LINK,
LEDS_COL | LEDS_DUPLEX
},
}, },
.led_mux_custom = 1, .led_mux_custom = 1,
// LED mux configuration extracted from original firmware .led_mux = {
// Corresponds to register values: 0x00,0x01,0x04,0x05,0x08,0x09,0x0c,0x3f,0x0d,0x10,0x11,0x0e,0x14,0x11,0x12,0x15,
// RTL837X_REG_LED_GLB_MUX_1: 0x08144040 0x15,0x16,0x18,0x19,0x1a,0x19,0x1d,0x1e,0x1c,0x1d,0x20,0x21
// RTL837X_REG_LED_GLB_MUX_2: 0x1037f309 },
// RTL837X_REG_LED_GLB_MUX_3: 0x12454391
// RTL837X_REG_LED_GLB_MUX_4: 0x19616555
// RTL837X_REG_LED_GLB_MUX_5: 0x1c79d65a
// RTL837X_REG_LED_GLB_MUX_6: 0x0002181d
.led_mux = { 0x08, 0x14, 0x40, 0x40, 0x10, 0x37, 0xf3, 0x09,
0x12, 0x45, 0x43, 0x91, 0x19, 0x61, 0x65, 0x55,
0x1c, 0x79, 0xd6, 0x5a, 0x00, 0x02, 0x18, 0x1d,
0x00, 0x00, 0x00, 0x00 },
}; };
``` ```
```
## Port to Logical Mapping ## Port to Logical Mapping
| Physical Port | Logical Port | Type | LED Set | Web UI Display | Using `PCB_SWTG024AS_A_2_0_1` mapping (logical ports 3-8):
|---|---|---|---|---|
| 1 | 0 | RJ45 | 0 | Port 1 |
| 2 | 1 | RJ45 | 0 | Port 2 |
| 3 | 2 | RJ45 | 0 | Port 3 |
| 4 | 3 | RJ45 | 0 | Port 4 |
| 5 | 4 | SFP+ (SDS0) | 1 | Port 5 |
| 6 | 5 | SFP+ (SDS1) | 1 | Port 6 |
**Important:** The web UI will show ports in the correct physical order (1-4 RJ45, 5-6 SFP) because the logical-to-physical mapping preserves the order. | Physical Port | Logical Port | Type | LED Set |
|---|---|---|---|
| 1 | 4 | RJ45 | 0 |
| 2 | 5 | RJ45 | 0 |
| 3 | 6 | RJ45 | 0 |
| 4 | 7 | RJ45 | 0 |
| 5 | 3 | SFP+ (SDS0) | 1 |
| 6 | 8 | SFP+ (SDS1) | 1 |
**Note:** The web UI will show ports in a different order due to this mapping. Ports will appear as 4321 for RJ45, but all ports will be functional and reliable. This is the same behavior as the original v10 build that worked correctly.
## Firmware Files ## Firmware Files
@@ -298,18 +275,16 @@ If flashing fails and the switch does not boot:
| Version | Date | Changes | Status | | Version | Date | Changes | Status |
|---|---|---|---| |---|---|---|---|
| v3 | 2026-09-14 | Initial PCB_SWTG024AS_A_2_0_1 config | ❌ Port order wrong, LEDs wrong | | v3 | 2026-09-14 | Initial PCB_SWTG024AS_A_2_0_1 config | ⚠️ Port order wrong, but all ports worked |
| v10 | 2026-09-17 | LED colors corrected | ⚠️ LEDs better, port order still wrong | | v10 | 2026-09-17 | Various LED configs tested | ❌ Various issues |
| v11 | 2026-09-18 | **Separate machine def, correct port mapping, original LED mux** | ✅ All working | | v17+ | 2026-09-20 | **Returned to PCB_SWTG024AS_A_2_0_1 config** | ✅ All ports reliable (order wrong but functional) |
## Notes ## Notes
- This device shares PCB-SWTG024AS-A-2.0.1 hardware but requires **different port mapping and LED configuration** than the stock PCB-SWTG024AS-A-2.0.1 definition - **ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM use identical PCB-SWTG024AS-A-2.0.1 hardware**
- **Binardat 2G06-04210GSM is 100% hardware compatible** with ONT-S207CW-62TS-SE - The `MACHINE_ONT_S207CW_62TS_SE` definition uses the **same configuration as `MACHINE_PCB_SWTG024AS_A_2_0_1`** which was confirmed working with all ports reliable
- Port numbering in web UI now matches physical port order (1-4 RJ45, 5-6 SFP) - Port numbering in web UI will show as 4321 for RJ45 ports (order reversed) but all ports will function correctly
- LED colors now match the labels on the device enclosure: - LED colors use the PCB_SWTG024AS_A_2_0_1 configuration
- Green = 2.5G (RJ45) / 10G (SFP)
- Orange = 1G/100M/10M (RJ45) / 1G/2.5G (SFP)
- The **Loader Mode** always remains accessible at 192.168.10.247 for recovery - The **Loader Mode** always remains accessible at 192.168.10.247 for recovery
- Serial console baud rate changes from 9600 (stock) to 115200 (RTLPlayground) - Serial console baud rate changes from 9600 (stock) to 115200 (RTLPlayground)
machine.c
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@@ -914,64 +914,53 @@ __code const struct machine machine = {
#elif defined MACHINE_ONT_S207CW_62TS_SE #elif defined MACHINE_ONT_S207CW_62TS_SE
// ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM // ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM
// RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB) // RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB)
// Physical ports: 1-4 = RJ45, 5-6 = SFP // Using PCB-K0402WS-V3 config
// Logical ports: 0-3 = RJ45 (phys 1-4), 4-5 = SFP (phys 5-6)
// LED colors: RJ45 = Green@2.5G, Orange@1G/100M/10M; SFP = Green@10G, Orange@1G/2.5G
// LED mux values extracted from original firmware
__code const struct machine machine = { __code const struct machine machine = {
.machine_name = "ONT-S207CW-62TS-SE / Binardat 2G06-04210GSM", .machine_name = "ONT-S207CW-62TS-SE / Binardat 2G06-04210GSM",
.isRTL8373 = 0, .isRTL8373 = 0,
.mac_flash_offset = 0x1FC000, .mac_flash_offset = 0x1FC000,
.min_port = 0, .min_port = 3,
.max_port = 5, .max_port = 8,
.n_sfp = 2, .n_sfp = 2,
.log_to_phys_port = {1, 2, 3, 4, 5, 6, 0, 0, 0}, .log_to_phys_port = {0, 0, 0, 6, 1, 2, 3, 4, 5},
.phys_to_log_port = {0, 1, 2, 3, 4, 5, 0, 0, 0}, .phys_to_log_port = {4, 5, 6, 7, 8, 3, 0, 0, 0},
.is_sfp = {0, 0, 0, 0, 1, 1, 0, 0, 0}, .is_sfp = {0, 0, 0, 2, 0, 0, 0, 0, 1},
// SFP port on SDS0 / logical port 4 / physical port 5 // Left SFP port on SDS1 / logical port 8
.sfp_port[0].pin_detect = GPIO37, .sfp_port[0].pin_detect = GPIO38,
.sfp_port[0].pin_los = GPIO_NA, .sfp_port[0].pin_los = GPIO_NA,
.sfp_port[0].pin_tx_disable = GPIO_NA, .sfp_port[0].pin_tx_disable = GPIO_NA,
.sfp_port[0].sds = 0, .sfp_port[0].sds = 1,
.sfp_port[0].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 }, .sfp_port[0].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 },
// SFP port on SDS1 / logical port 5 / physical port 6 // Right SFP port on SDS0 / logical port 3
.sfp_port[1].pin_detect = GPIO38, .sfp_port[1].pin_detect = GPIO37,
.sfp_port[1].pin_los = GPIO_NA, .sfp_port[1].pin_los = GPIO_NA,
.sfp_port[1].pin_tx_disable = GPIO_NA, .sfp_port[1].pin_tx_disable = GPIO_NA,
.sfp_port[1].sds = 1, .sfp_port[1].sds = 0,
.sfp_port[1].i2c = { .sda = GPIO39_I2C_SDA4, .scl = GPIO40_I2C_SCL3_MDC1 }, .sfp_port[1].i2c = { .sda = GPIO41_I2C_SDA3_MDIO1, .scl = GPIO40_I2C_SCL3_MDC1 },
.reset_pin = GPIO_NA, .reset_pin = GPIO_NA,
.high_leds = { .mux = LED_28_SYS | LED_29, .enable = LED_27 | LED_28_SYS | LED_29 }, .high_leds = { .mux = LED_28_SYS | LED_29, .enable = LED_27 | LED_28_SYS | LED_29 },
.port_led_set = { 0, 0, 0, 0, 1, 1, 0, 0, 0 }, .port_led_set = { 0, 0, 0, 1, 0, 0, 0, 0, 1},
/* LED Configuration:
* RJ45 ports (0-3, phys 1-4): SET0
* LED0 (Green): 2.5G Link+Activity
* LED1 (Orange): 1G/100M/10M Link+Activity
* SFP+ ports (4-5, phys 5-6): SET1
* LED0 (Green): 10G Link+Activity
* LED1 (Orange): 1G/2.5G Link+Activity
*/
.led_sets = { .led_sets = {
{ // SET0: RJ45 Ports {
LEDS_2G5 | LEDS_LINK | LEDS_ACT, // Green: 2.5G LEDS_2G5 | LEDS_LINK | LEDS_10M | LEDS_ACT,
LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT, // Orange: 1G/100M/10M LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT | LEDS_10G,
LEDS_1G | LEDS_LINK,
0
},
{
LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK,
LEDS_10G | LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_ACT,
0, 0,
0 }, 0
{ // SET1: SFP+ Ports },
LEDS_10G | LEDS_LINK | LEDS_ACT, // Green: 10G
LEDS_2G5 | LEDS_1G | LEDS_LINK | LEDS_ACT, // Orange: 1G/2.5G
0,
0 },
}, },
.led_mux_custom = 1, .led_mux_custom = 1,
// LED mux configuration from original firmware .led_mux = {
.led_mux = { 0x08, 0x14, 0x40, 0x40, 0x10, 0x37, 0xf3, 0x09, 0x00,0x01,0x04,0x05,0x08,0x09,0x0c,0x3f,0x0d,0x10,0x11,0x0e,0x14,0x11,0x12,0x15,0x15,0x16,0x18,0x19,0x1a,0x19,0x1d,0x1e,0x1c,0x1d,0x20,0x21
0x12, 0x45, 0x43, 0x91, 0x19, 0x61, 0x65, 0x55, },
0x1c, 0x79, 0xd6, 0x5a, 0x00, 0x02, 0x18, 0x1d,
0x00, 0x00, 0x00, 0x00 },
}; };
#elif defined MACHINE_SWTG024AS_A_2_0_1_5C_1SFP #elif defined MACHINE_SWTG024AS_A_2_0_1_5C_1SFP
machine.h
+3 -4
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@@ -40,13 +40,12 @@
// #define MACHINE_HI_K0801WS // #define MACHINE_HI_K0801WS
// #define MACHINE_FNS1200P // #define MACHINE_FNS1200P
// #define MACHINE_PCB_SWTG024AS_A_2_0_1 // #define MACHINE_PCB_SWTG024AS_A_2_0_1
// #define MACHINE_ONT_S207CW_62TS_SE #define MACHINE_ONT_S207CW_62TS_SE
// ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM // ONT-S207CW-62TS-SE and Binardat 2G06-04210GSM
// RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB) // RTL8372N, 4x2.5G RJ45 + 2x10G SFP+, GD25Q128E (16MB)
// Physical ports: 1-4 = RJ45, 5-6 = SFP // Physical ports: 1-4 = RJ45, 5-6 = SFP
// Logical ports: 0-3 = RJ45 (phys 1-4), 4-5 = SFP (phys 5-6) // Using PCB_SWTG024AS_A_2_0_1 config (all ports reliable, order was wrong)
// LED colors: RJ45 = Green@2.5G, Orange@1G/100M/10M; SFP = Green@10G, Orange@1G/2.5G // Logical ports: 3-8, Port 3 = SFP (SDS0), Ports 4-7 = RJ45, Port 8 = SFP (SDS1)
// LED mux: Original firmware values (0x08144040, 0x1037f309, ...)
// #define MACHINE_SWTG024AS_A_2_0_1_5C_1SFP // #define MACHINE_SWTG024AS_A_2_0_1_5C_1SFP
// #define MACHINE_SWTG024AS_V2_0 // #define MACHINE_SWTG024AS_V2_0
// #define MACHINE_FG_4GT_2SX_V2_0 // #define MACHINE_FG_4GT_2SX_V2_0