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Merge pull request #671 from gtytup/s25g1109fp
Add Sirivision SR-S25G2109F device (PCB S25G1109FP V1.3)
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# Sirivision SR-S25G2109F (S25G1109FP V1.3)
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RTL8373 (non-N) with an RTL8224 quad 2.5G PHY: 8 × 2.5G RJ45 + 1 × SFP+,
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2 MB flash, no PoE.
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## Label specifications
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| Item | Value |
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|------|-------|
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| Manufacturer | Sirivision |
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| Model | SR-S25G2109F |
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| Ports | 8 × RJ45 10/100/1000/2500 Mbps, 1 × SFP+ 1G/2.5G/10G |
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| Power input | 12 V DC, 1.5 A |
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| Stock firmware | version 1.0.8.0 |
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| Stock defaults | IP 192.168.1.199, user `admin`, password `admin` |
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| Serial number | 001008130002003A000005 (also on the PCB barcode sticker) |
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The label does not carry a MAC address. After a factory initialisation the
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stock firmware uses exactly the values printed on the label.
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## PCB silkscreen and naming
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Top side: `S25G1109FP V1.3 SIRIVISION`. That model name belongs to an unmanaged
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PoE switch; this board omits the PoE section entirely. What is actually shipped
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is the label model `SR-S25G2109F`: a simply managed, non-PoE switch. Its stock
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firmware provides a web interface, but it responds very slowly.
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## CPU, PHY and flash
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| Part | Identification |
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|------|----------------|
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| SoC | RTL8373, non-N: `regget 4` returns `0x83730000` and the boot console prints `Detecting CPU: RTL8373` |
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| PHY | RTL8224, reported as `RTL8224 ID: 0x82240000` |
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| Flash | GigaDevice 25Q16ESIG (U7), 2 MB, JEDEC id `c8 40 15` |
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The two large ICs sit under soldered heatsinks, their markings are not readable.
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## Build
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```
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make MACHINE=S25G1109FP_V1_3 CI=1
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```
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The resulting image can be uploaded through the web interface (`System` page)
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or the stock web UI.
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## Port mapping
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| Front port | ASIC MAC | Interface |
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|------------|----------|-----------|
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| 1–8 | 0–7 | RJ45 2.5G |
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| 9 | 8 | SFP+ (SDS1) |
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## Board signals
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| Function | GPIO |
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|----------|------|
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| SFP detect (ModAbs) | 30, low with a module inserted |
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| SFP LOS | 37, high without light |
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| SFP TX disable | not connected, `GPIO_NA` |
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| SFP I2C | SDA 39 / SCL 40, `I2CBUS(GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1)` |
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| Reset button | 54 |
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ModAbs and LOS are separate signals here: GPIO30 tells whether a module is
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inserted, GPIO37 whether it receives light, so a module is identified even
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before the link comes up and loss of signal is reported. GPIO38 and GPIO48,
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which the 8+1 reference boards use for ModAbs and for the reset button, never
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change on this board; with GPIO38 as ModAbs the firmware believed a module was
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permanently present and retried the I2C read forever.
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Serial console: the stock firmware runs the loader at 57600 baud and the runtime
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at 9600 baud, RTLPlayground uses 115200.
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## Front panel
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Each copper port has two LEDs, labelled `Link/Act` (left, yellow) and `2.5G`
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(right, green). The SFP cage has a single green `Link/Act` LED; next to it are
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a `Power` LED and the `Reset` button.
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## LED configuration
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Copper ports use LED set 0, the SFP port uses LED set 1:
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| Set | Function 0 (left / SFP) | Function 1 (right) |
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|-----|-------------------------|--------------------|
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| SET0 | all speeds, link with activity | 2.5G link |
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| SET1 | all speeds, link with activity | not populated |
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The board is wired in the stock port order — LED pin `3n+m` belongs to port
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`n+1`, LED function `m` — so the mux table is the chip default with a single
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change: the SFP LED sits on pin 25 and is driven by LED function 0, while the
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default table maps pin 25 to function 1, which is unpopulated in SET1. Without
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that change the SFP LED stays dark.
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A speed condition alone leaves an LED dark, `LEDS_LINK` has to be set as well.
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## Reset button
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| Hold time while running | Effect |
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|-------------------------|--------|
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| less than 3 s | no action |
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| 3–10 s | reset the switch chip, the firmware reboots (~20 s of downtime) |
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| more than 10 s | additionally restore the default configuration |
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The system LED blinks slowly while the button is held. Holding the button
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during power-up instead waits for the release and restores the default
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configuration when it is released after 10–30 s.
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## MAC address
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The factory MAC sits at `0x1FC000`, six bytes followed by `0xFF` padding. The
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stock value is a locally administered address (`1A:5D:23:47:4D:EB`), which the
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firmware rejects, so the device runs with a UUID-derived MAC (`06:…`). A valid
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globally administered address stored there is used instead.
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## What works
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- all eight 2.5GBASE-T ports at 10/100/1000/2500 Mbps
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- SFP+ with 10G and 1G modules, including DDM data where the module provides it
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- 10G: Finisar FCBG110SD1C05 AOC (no DDM), rate `0x67`, SerDes mode `1a`
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- 1G: ETU ESB5312-3SCD20 (DDM), rate `0x0d`, SerDes mode `04`
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- LEDs, module insert/remove detection, loss of signal reporting, reset button
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## Unverified
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- 2.5G SFP modules, none was available for testing
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## Photos
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Front panel:
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Label:
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PCB top side:
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PCB bottom side:
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Flash chip, GigaDevice 25Q16ESIG:
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Binary file not shown.
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After Width: | Height: | Size: 88 KiB |
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After Width: | Height: | Size: 75 KiB |
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After Width: | Height: | Size: 282 KiB |
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After Width: | Height: | Size: 253 KiB |
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After Width: | Height: | Size: 270 KiB |
@@ -43,6 +43,7 @@ The following devices have been tested and are fully working:
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| Ruiying | RY-4GT-2SX | No | [FG-4GT-2SX_V2.0](devices/FG-4GT-2SX_V2.0.md) | 4M | 4 + 2 |
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| Ruiying | RY-8GT-1SX | No | [FG-8GT-1SX](devices/FG-8GT-1SX.md) | 1M | 8 + 1 |
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| SICSOLINK| SL-G0402F | No | [PCB-K0402WS-V3.0](devices/PCB-K0402WS-V3.0.md) | | 4 + 2 |
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| Sirivision | SR-S25G2109F | Yes | [S25G1109FP V1.3](devices/S25G1109FP_V1_3.md) | 2M | 8 + 1 |
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| Sodola | SL-SWTG124AS-D | Yes | [SWTG024AS-v2.0-17452](devices/SWTG024AS.md) | 2M | 4 + 2 |
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| Steamemo | IG204-V1 | No | [PB-2131](devices/STEAMEMO_IG204_V1.md) | | 4 + 2 |
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| TRENDnet | TEG-S562 | No | [TEG-S563/EU H/W: V1.0R](devices/TEG-S562.md) | 2M | 4 + 2 |
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@@ -0,0 +1,53 @@
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#include "machine_defs.h"
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// Sirivision S25G1109FP V1.3 (label: SR-S25G2109F): 8x2.5G RJ45 + 1x10G SFP+,
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// 2 MB flash, RTL8373 (non-N) + RTL8224. Derived from the KP-9000-9XHML-X V3.1
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// definition; every value below was confirmed on hardware, see the device doc
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// in doc/devices/S25G1109FP_V1_3.md.
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__code const struct machine machine = {
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MACHINE_COMMON_SETTING,
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.n_sfp = 1,
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.log_to_phys_port = {1, 2, 3, 4, 5, 6, 7, 8, 9},
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.phys_to_log_port = {0, 1, 2, 3, 4, 5, 6, 7, 8},
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.is_sfp = {0, 0, 0, 0, 0, 0, 0, 0, 1},
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/* ModAbs is GPIO30 (low with a module inserted, high with an empty cage),
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* LOS is GPIO37 (high without light). GPIO38, the ModAbs pin of the
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* KP-9000 8+1 reference, is tied low here and never changes, which made the
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* firmware believe a module was always present. */
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.sfp_port[0].pin_detect = GPIO30_ACL_BIT3_EN,
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.sfp_port[0].pin_los = GPIO37,
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.sfp_port[0].pin_tx_disable = GPIO_NA,
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.sfp_port[0].sds = 1,
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.sfp_port[0].i2c = I2CBUS( GPIO39_I2C_SDA4, GPIO40_I2C_SCL3_MDC1 ),
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/* Reset button: GPIO54 reads high when idle and low while pressed.
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* GPIO48, used by the KP-9000 reference, never changes on this board. */
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.reset_pin = GPIO54_ACL_BIT2_EN,
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.high_leds = { .mux = LED_27 | LED_29, .enable = LED_28_SYS | LED_29 },
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.port_led_set = { 0, 0, 0, 0, 0, 0, 0, 0, 1},
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.led_sets = {
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{ /* RJ45: left LED = link/activity, right LED = 2.5G */
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LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT,
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/* speed-only conditions leave the LED dark: the LINK bit has to be
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* set as well, otherwise the LED controller stays off */
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LEDS_2G5 | LEDS_LINK,
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0,
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0,
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}, { /* SFP PORT, SINGLE GREEN LED */
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LEDS_2G5 | LEDS_1G | LEDS_100M | LEDS_10M | LEDS_LINK | LEDS_ACT | LEDS_10G,
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0,
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0,
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0,
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}},
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/* 6 bits per LED pin, encoded as (port << 2) | led. This is the chip
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* default for port-ordered wiring (pin 3n+m = port n+1, function m) with
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* one change: pin 25 drives the SFP LED with function 0, the only function
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* populated in led_sets[1]. See the device doc for the details. */
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.led_mux_custom = 1,
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.led_mux = {0x00, 0x01, 0x02, 0x04, 0x05, 0x06, 0x08, 0x09, 0x0a, 0x0c,
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0x0d, 0x0e, 0x10, 0x11, 0x12, 0x14, 0x15, 0x16, 0x18, 0x19,
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0x1a, 0x1c, 0x1d, 0x1e, 0x20, 0x20, 0x22, 0x23},
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/* Factory MAC at flash 0x1FC000, verified in the stock dump. The stock
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* value is a locally administered address, which is rejected, so a
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* UUID-derived MAC is used unless a valid one is stored here. */
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.mac_flash_offset = 0x1FC000,
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};
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#ifndef _MACHINE_S25G1109FP_V1_3_H_
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#define _MACHINE_S25G1109FP_V1_3_H_
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/* machine_name[] in struct machine is 30 bytes -> keep this <= 29 chars */
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/* The product is sold as SR-S25G2109F; S25G1109FP is the PCB silkscreen and
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* belongs to a different (unmanaged PoE) model that shares this PCB. */
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#define MACHINE_MODEL "Sirivision SR-S25G2109F"
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#define MACHINE_CHIPSET RTL8373
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#endif
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