Merge branch 'logicog:main' into fix-link-speed

This commit is contained in:
TylerDurden-23
2026-02-11 12:30:26 +01:00
committed by GitHub
9 changed files with 484 additions and 103 deletions
+14
View File
@@ -22,10 +22,24 @@
// BIT 17 set: LED solid on
// Bytes 0/1 hold the LED mode, e.g. serial, RTL8231?
// Blink rate is defined by setAsicRegBits(0x6520,0xe00000,rate);
#define RTL837X_REG_LED_GLB_MUX_1 0x65E0
#define RTL837X_REG_LED_GLB_MUX_2 0x65E4
#define RTL837X_REG_LED_GLB_MUX_3 0x65E8
#define RTL837X_REG_LED_GLB_MUX_4 0x65EC
#define RTL837X_REG_LED_GLB_MUX_5 0x65F0
#define RTL837X_REG_LED_GLB_MUX_6 0x65F4
#define RTL837X_REG_LED_GLB_ACTIVE 0x65D8
#define RTL837X_REG_LED_GLB_IO_EN 0x65DC
#define RTL837X_REG_LED3_0_SET3 0x6524
#define RTL837X_REG_LED3_0_SET1 0x6528
#define RTL837X_REG_LED1_0_SET3 0x6530
#define RTL837X_REG_LED3_2_SET2 0x6534
#define RTL837X_REG_LED1_0_SET2 0x6538
#define RTL837X_REG_LED3_2_SET1 0x653C
#define RTL837X_REG_LED1_0_SET1 0x6540
#define RTL837X_REG_LED3_2_SET0 0x6544
#define RTL837X_REG_LED1_0_SET0 0x6548
#define RTL837X_LED_PORT_SET_SEL 0x654c
// SMI control
#define RTL837X_REG_SMI_PORT0_5_ADDR 0x644C