mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
Add retrieval of VLAN config and cleanup statisics counters
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+38
-20
@@ -10,10 +10,10 @@
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#include "rtl837x_common.h"
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#include "rtl837x_sfr.h"
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#include "rtl837x_regs.h"
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#include "rtl837x_port.h"
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#pragma codeseg BANK1
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extern __code uint16_t bit_mask[16];
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extern __xdata uint8_t minPort;
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extern __xdata uint8_t maxPort;
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@@ -31,6 +31,16 @@ __code uint8_t log_to_phys_port[9] = {
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0, 0, 0, 5, 1, 2, 3, 4, 6
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};
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#if NSFP == 2
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__code uint8_t is_sfp[9] = {
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0, 0, 0, 1, 0, 0, 0, 0, 1
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};
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#else
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__code uint8_t is_sfp[9] = {
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0, 0, 0, 0, 0, 0, 0, 0, 1
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};
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#endif
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void port_mirror_set(register uint8_t port, __xdata uint16_t rx_pmask, __xdata uint16_t tx_pmask) __banked
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{
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print_string("\nport_mirror_set called \n");
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@@ -88,6 +98,25 @@ void vlan_delete(uint16_t vlan) __banked
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}
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/*
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* Reads VLAN information from VLAN table
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* Returns data in sfr_data
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*/
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int8_t vlan_get(register uint16_t vlan) __banked
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{
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if (vlan >= 2048)
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return -1;
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REG_WRITE(RTL837X_TBL_CTRL, vlan >> 8, vlan, TBL_VLAN, TBL_EXECUTE);
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do {
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reg_read_m(RTL837X_TBL_CTRL);
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} while (sfr_data[3] & TBL_EXECUTE);
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reg_read_m(RTL837x_L2_DATA_OUT_A);
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return 0;
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}
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/*
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* A member that is not tagged, is untagged
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*/
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@@ -392,27 +421,16 @@ void port_stats_print(void) __banked
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print_string("Up\t");
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}
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}
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STAT_GET(0x2f, i);
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print_reg(RTL837X_STAT_V_LOW); write_char('\t');
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REG_WRITE(RTL837X_STAT_GET, 0x00, 0x00, 0x05, 0xe0 | (i << 1) | 1);
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do {
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reg_read_m(RTL837X_STAT_GET);
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} while (sfr_data[3] & 0x1);
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// FIXME: Ignore HIGHER part of 64 bit value for now
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STAT_GET(0x30, i);
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print_reg(RTL837X_STAT_V_HIGH); write_char('\t');
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STAT_GET(0x2e, i);
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print_reg(RTL837X_STAT_V_LOW); write_char('\t');
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REG_WRITE(RTL837X_STAT_GET, 0x00, 0x00, 0x06, (i << 1) | 1);
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do {
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reg_read_m(RTL837X_STAT_GET);
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} while (sfr_data[3] & 0x1);
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print_reg(RTL837X_STAT_V_LOW); write_char('\t');
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REG_WRITE(RTL837X_STAT_GET, 0x00, 0x00, 0x05, 0xc0 | (i << 1) | 1);
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do {
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reg_read_m(RTL837X_STAT_GET);
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} while (sfr_data[3] & 0x1);
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print_reg(RTL837X_STAT_V_LOW); write_char('\t');
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REG_WRITE(RTL837X_STAT_GET, 0x00, 0x00, 0x06, (i << 1) | 1);
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do {
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reg_read_m(RTL837X_STAT_GET);
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} while (sfr_data[3] & 0x1);
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STAT_GET(0x30, i);
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print_reg(RTL837X_STAT_V_LOW); write_char('\t');
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print_string("\n");
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}
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