Fix parsing of mirror command, fix parsing of serial buffer beyond wrap arond, add bulk reading of flash and start of config file parser

cmd_parser.c

@@ -21,7 +21,7 @@ extern __xdata uint8_t nSFPPorts;
 extern __xdata uint8_t isRTL8373;
 
 extern volatile __xdata uint32_t ticks;
-extern volatile __xdata char sbuf_ptr;
+extern volatile __xdata uint8_t sbuf_ptr;
 extern __xdata uint8_t sbuf[SBUF_SIZE];
 
 extern __code uint8_t * __code greeting;
@@ -29,9 +29,13 @@ extern __code uint8_t * __code hex;
 
 extern __xdata uint8_t flash_buf[256];
 
+// Buffer for writing to flash 0x1fd000, copy to 0x1fe000
+#define CMD_BUFFER_SIZE 1024
+__xdata uint8_t cmd_buffer[CMD_BUFFER_SIZE];
+__xdata uint16_t cmdptr;
 
-__xdata	char l;
+__xdata	uint8_t l;
-__xdata char line_ptr;
+__xdata uint8_t line_ptr;
 __xdata	char is_white;
 
 #define N_WORDS 16
@@ -47,7 +51,8 @@ uint8_t cmd_compare(uint8_t start, uint8_t * __code cmd)
 	signed char i;
 	signed char j = 0;
 
-	for (i = cmd_words_b[start]; i < cmd_words_b[start + 1] && sbuf[i] != ' '; i++) {
+	for (i = cmd_words_b[start]; i != cmd_words_b[start + 1] && sbuf[i] != ' '; i++) {
+		i &= SBUF_SIZE - 1;
 //		print_short(i); write_char(':'); print_short(j); write_char('#'); print_string("\n");
 //		write_char('>'); write_char(cmd[j]); write_char('-'); write_char(sbuf[i]); print_string("\n");
 		if (!cmd[j])
@@ -56,7 +61,7 @@ uint8_t cmd_compare(uint8_t start, uint8_t * __code cmd)
 			break;
 	}
 //	write_char('.'); print_short(i); write_char(':'); print_short(i);
-	if (i >= cmd_words_b[start + 1] || sbuf[i] == ' ')
+	if (i == cmd_words_b[start + 1] || sbuf[i] == ' ')
 		return 1;
 	return 0;
 }
@@ -145,17 +150,19 @@ void parse_mirror(void)
 	__xdata uint8_t mirroring_port;
 	__xdata uint16_t rx_pmask = 0;
 	__xdata uint16_t tx_pmask = 0;
-	uint8_t w = 2;
 
 	if (sbuf[cmd_words_b[1]] < '0' || sbuf[cmd_words_b[1]] > '9') {
 		print_string("Port missing: port <mirroring port> [port][t/r]...");
 		return;
 	}
-		
-	mirroring_port = sbuf[cmd_words_b[w]] - '1';
-	if (sbuf[cmd_words_b[1] + 1] >= '0' && sbuf[cmd_words_b[1] + 1] <= '9')
-		mirroring_port = (mirroring_port + 1) * 10 + sbuf[cmd_words_b[1] + 1] - '1';
 
+	mirroring_port = sbuf[cmd_words_b[1]] - '1';
+	if (sbuf[cmd_words_b[1] + 1] >= '0' && sbuf[cmd_words_b[1] + 1] <= '9')
+	mirroring_port = (mirroring_port + 1) * 10 + sbuf[cmd_words_b[1] + 1] - '1';
+	if (!isRTL8373)
+		mirroring_port = phys_to_log_port[mirroring_port];
+
+	uint8_t w = 2;
 	while (cmd_words_b[w] > 0) {
 		uint8_t port;
 		if (sbuf[cmd_words_b[w]] >= '0' && sbuf[cmd_words_b[w]] <= '9') {
@@ -173,6 +180,8 @@ void parse_mirror(void)
 					tx_pmask |= ((uint16_t)1) << port;
 				}
 			} else {
+				if (!isRTL8373)
+					port = phys_to_log_port[port];
 				if (sbuf[cmd_words_b[w] + 1] == 'r')
 					rx_pmask |= ((uint16_t)1) << port;
 				else if (sbuf[cmd_words_b[w] + 1] == 't')
@@ -301,7 +310,10 @@ void cmd_parser(void) __banked
 					}
 				}
 				if (cmd_compare(0, "l2")) {
-					port_l2_learned();
+					if (cmd_words_b[1] > 0 && cmd_compare(1, "forget"))
+						port_l2_forget();
+					else
+						port_l2_learned();
 				}
 				if (cmd_compare(0, "pvid") && cmd_words_b[1] > 0 && cmd_words_b[2] > 0) {
 					__xdata uint16_t pvid;
@@ -333,10 +345,21 @@ void cmd_parser(void) __banked
 }
 
 
+void execute_config() __banked
+{
+	flash_read _bulk(&cmd_buffer[0], 0x1fd000, CMD_BUFFER_SIZE);
+	// Checks for empty flash
+	if (cmd_buffer[0] == 0xff)
+		return;
+	print_string_x(&cmd_buffer[0]);
+}
+
+
 void cmd_parser_setup(void) __banked
 {
 	l = sbuf_ptr;
 	line_ptr = l;
 	is_white = 1;
+	cmdptr = 0;
 }
 

cmd_parser.h

@@ -3,5 +3,5 @@
 
 void cmd_parser(void) __banked;
 void cmd_parser_setup(void) __banked;
-
+void execute_config() __banked;
 #endif

rtl837x_flash.c

@@ -34,7 +34,7 @@ void flash_configure_mmio(void)
  * Initializes the flash controller for programmed control
  * The configuration options are not really understood, the SPI speed
  * seems to be directly linked to the CPU frequency
- * This configures uses fast single IO at 20.8 MHz when the CPU clock is at 20.8MHz
+ * This configures fast single IO at 20.8 MHz when the CPU clock is at 20.8MHz
  * and 62.5MHz when the CPU clock is configured at 125MHz
  */
 void flash_init(uint8_t enable_dio) __banked
@@ -215,6 +215,53 @@ void flash_dump(register uint32_t addr, register uint8_t len) __banked
 	}
 }
 
+/*
+ * Reads bulk data of length len from the flash memory starging at address src
+ * and writes the data into a buffer pointed to by dst in XMEM
+ */
+void flash_read_bulk(register __xdata uint8_t *dst, __xdata uint32_t src, register uint16_t len) __banked
+{
+	short status;
+	do {
+		status = flash_read_status();
+	} while (status & 0x1);
+
+	// Set fast read mode
+	if (dio_enabled) {
+		SFR_FLASH_MODEB = 0x18;
+		SFR_FLASH_CMD_R = 0xbb;
+		SFR_FLASH_DUMMYCICLES = 4;
+	} else {
+		SFR_FLASH_MODEB = 0x0;
+		SFR_FLASH_CMD_R = 0xb;	// Fast read
+		SFR_FLASH_DUMMYCICLES = 8;	// Add 8 dummy clocks after read?
+	}
+	// Read 4 bytes
+	SFR_FLASH_TCONF = 4;
+	while (len) {
+		SFR_FLASH_ADDR16 = src >> 16;
+		SFR_FLASH_ADDR8 = src >> 8;
+		SFR_FLASH_ADDR0 = src;
+		src += 4;
+
+		SFR_FLASH_EXEC_GO = 1;
+		while(SFR_FLASH_EXEC_BUSY);
+
+		*dst++ = SFR_FLASH_DATA0;
+		if (len == 1)
+			return;
+		*dst++ = SFR_FLASH_DATA8;
+		if (len == 2)
+			return;
+		*dst++ = SFR_FLASH_DATA16;
+		if (len == 3)
+			return;
+		*dst++ = SFR_FLASH_DATA24;
+
+		len -= 4;
+	}
+}
+
 
 void flash_read_security(uint32_t addr, uint8_t len) __banked
 {
@@ -270,9 +317,9 @@ void flash_block_erase(uint32_t addr) __banked
 }
 
 
-void flash_write_bytes(uint32_t addr, __xdata uint8_t *ptr, uint8_t len) __banked
+void flash_write_bytes(__xdata uint32_t addr, __xdata uint8_t *ptr, uint16_t len) __banked
 {
-	uint8_t exit_loop = 0;
+	static __xdata uint8_t exit_loop = 0;
 
 	while(1) {
 		flash_write_enable();

rtl837x_flash.h

@@ -8,5 +8,6 @@ void flash_dump(register uint32_t addr, register uint8_t len) __banked;
 void flash_read_jedecid(void) __banked;
 void flash_read_security(uint32_t addr, uint8_t len)__banked ;
 void flash_block_erase(uint32_t addr) __banked;
-void flash_write_bytes(uint32_t addr, __xdata uint8_t *ptr, uint8_t len)__banked ;
+void flash_read_bulk(register __xdata uint8_t *dst, __xdata uint32_t src, register uint16_t len) __banked;
+void flash_write_bytes(__xdata uint32_t addr, register __xdata uint8_t *ptr, register uint16_t len)__banked;
 #endif

rtlplayground.c

@@ -59,7 +59,7 @@ volatile __xdata uint8_t sec_counter;
 volatile __xdata uint16_t sleep_ticks;
 
 // Buffer for serial input, SBUF_SIZE must be power of 2 < 256
-__xdata volatile char sbuf_ptr;
+__xdata volatile uint8_t sbuf_ptr;
 __xdata uint8_t sbuf[SBUF_SIZE];
 __xdata uint8_t sfr_data[4];
 
@@ -760,7 +760,7 @@ void tcpip_output(void)
 	// Move data over from xmem buffer to ASIC side using DMA
 	nic_tx_packet(ring_ptr);
 
-	reg_read_m(0x7884);
+	reg_read_m(0x7884);  // actual bytes sent, for now we assume everything worked
 
 	// Do actual TX of data on ASIC side
 	sfr_data[0] = sfr_data[1] = sfr_data[2] = 0;
@@ -1683,6 +1683,7 @@ void bootloader(void)
 //	p031f.a610:2058 p041f.a610:2058  p051f.a610:2058  r4f3c:00000000 p061f.a610:2058 p071f.a610:2058 
 	port_stats_print();
 
+	execute_config();
 	print_string("\n> ");
 	cmd_parser_setup();
 	idle_ready = 1;