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Add rtl837x_regs.h register header

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logicog
2025-06-12 20:31:53 +02:00
parent c7965d048e
commit 86aebcbf08
2 changed files with 27 additions and 7 deletions
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Makefile
+4 -1
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@@ -5,7 +5,7 @@ CC_FLAGS = -mmcs51
ASM = sdas8051 ASM = sdas8051
AFLAGS= -plosgff AFLAGS= -plosgff
all: rtlplayground.bin all: rtlplayground.bin injector
SRCS= rtlplayground.c rtl837x_flash.c SRCS= rtlplayground.c rtl837x_flash.c
OBJS= ${SRCS:.c=.rel} OBJS= ${SRCS:.c=.rel}
@@ -33,5 +33,8 @@ rtlplayground.ihx: crtstart.rel $(OBJS)
echo "0000000: 00 40" | xxd -r - $@ echo "0000000: 00 40" | xxd -r - $@
cat $< >> $@ cat $< >> $@
injector: injector.c
gcc $^ -o $@
.PHONY: clean all .PHONY: clean all
.PRECIOUS: %.rel %.ihx .PRECIOUS: %.rel %.ihx
rtl837x_regs.h
+23 -6
View File
@@ -8,12 +8,29 @@
// Defines the LED Mode for steering the Port LEDS and the System LED // Defines the LED Mode for steering the Port LEDS and the System LED
// BIT 17 set: LED solid on // BIT 17 set: LED solid on
// Bytes 0/1 hold the LED mode, e.g. serial, RTL8231? // Bytes 0/1 hold the LED mode, e.g. serial, RTL8231?
#define RTL837X_REG_SMI_CTRL 0x6454
#define RTL837X_REG_RESET 0x0024
#define RTL837X_REG_SEC_COUNTER 0x06f4
#define RTL837X_REG_SDS_MODES 0x7b20
#define RTL837X_REG_LINKS 0x63f0
// Blink rate is defined by setAsicRegBits(0x6520,0xe00000,rate); // Blink rate is defined by setAsicRegBits(0x6520,0xe00000,rate);
#define RTL837X_REG_SMI_CTRL 0x6454
#define RTL837X_REG_RESET 0x0024
// Writing 0x01 into this register causes a reset of the entire SoC
#define RTL837X_REG_SEC_COUNTER 0x06f4
// Used for counting seconds
#define RTL837X_REG_SDS_MODES 0x7b20
/*
* 5 Bits each give the state of the 2 SerDes of the RTL8372
* Values are:
* 0x1A: 10GBit USXGMII?
* 0x5: 2.5GBit: HISGMII ???
* 0x4: 1GBit: SGMII
*/
#define RTL837X_REG_LINKS 0x63f0
/* Each nibble encodes the link state of a port.
Port 0 appears to be the CPU port
The RTL8372 serves ports 4-7, port 3 is the RTL8221
2: 1Gbit
5: 2.5Gbit
*/
#endif #endif