mirror of
https://github.com/logicog/RTLPlayground.git
synced 2026-08-30 14:52:51 +08:00
Emable RTL8224 PHY. Better implementation of sleep/delay timer
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+12
-7
@@ -35,7 +35,7 @@ __xdata uint8_t isRTL8373;
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volatile __xdata uint32_t ticks;
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volatile __xdata uint32_t ticks;
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volatile __xdata uint8_t sec_counter;
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volatile __xdata uint8_t sec_counter;
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__xdata uint32_t sleep_until;
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volatile __xdata uint16_t sleep_ticks;
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#define N_WORDS 10
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#define N_WORDS 10
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__xdata signed char cmd_words_b[N_WORDS];
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__xdata signed char cmd_words_b[N_WORDS];
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@@ -73,6 +73,8 @@ void isr_timer0(void) __interrupt(1)
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TL0 = (0x10000 - (CLOCK_HZ / SYS_TICK_HZ / 32)) % 0xff;
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TL0 = (0x10000 - (CLOCK_HZ / SYS_TICK_HZ / 32)) % 0xff;
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ticks++;
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ticks++;
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if (sleep_ticks > 0)
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sleep_ticks--;
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sec_counter++;
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sec_counter++;
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TR0 = 1; // Re-start timer 0
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TR0 = 1; // Re-start timer 0
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@@ -532,11 +534,11 @@ uint8_t sfp_read_reg(uint8_t reg)
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return sfr_data[3];
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return sfr_data[3];
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}
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}
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// Sleep the given number of ticks without doing housekeeping
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// Delay for given number of ticks without doing housekeeping
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void delay(uint16_t t)
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void delay(uint16_t t)
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{
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{
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sleep_until = ticks + t;
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sleep_ticks = t;
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while (sleep_until >= ticks)
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while (sleep_ticks > 0)
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PCON |= 1;
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PCON |= 1;
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}
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}
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@@ -634,8 +636,8 @@ void idle(void)
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// Sleep the given number of ticks
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// Sleep the given number of ticks
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void sleep(uint16_t t)
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void sleep(uint16_t t)
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{
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{
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sleep_until = ticks + t;
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sleep_ticks = t;
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while (sleep_until >= ticks)
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while (sleep_ticks > 0)
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idle();
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idle();
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}
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}
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@@ -1305,7 +1307,10 @@ void rtl8372_init(void)
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// TODO: patch the PHYs
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// TODO: patch the PHYs
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// Re-enable PHY after configuration
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// Re-enable PHY after configuration
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phy_write(0xf0,0x1f,0xa610,0x2058);;
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if (isRTL8373)
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phy_write(0xff,0x1f,0xa610,0x2058);
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else
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phy_write(0xf0,0x1f,0xa610,0x2058);
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// Set bits 0xc-0x14 of 0x632c to 0x1f8, see rtl8372_init
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// Set bits 0xc-0x14 of 0x632c to 0x1f8, see rtl8372_init
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// r632c:00000540 R632c-001f8540
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// r632c:00000540 R632c-001f8540
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